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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 7713 publication records. Showing 7713 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
65 | Kenichiro Noguchi, Isao Ohnishi, Hiroshi Morita |
Design considerations for a heterogeneous tightly-coupled multiprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1975 National Computer Conference, 19-22 May 1975, Anaheim, CA, USA, pp. 561-565, 1975, AFIPS Press, 978-1-4503-7919-9. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
|
60 | Jingzhao Ou, Viktor K. Prasanna |
Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(2), pp. 355-382, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA, design space exploration, processor, cosimulation |
50 | Rob Aitken, Krisztián Flautner, John Goodacre |
High-Performance Multiprocessor System on Chip: Trends in Chip Architecture for the Mass Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 223-239, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
50 | Diana Göhringer, Michael Hübner 0001, Jürgen Becker 0001 |
Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 127-151, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
49 | Abhishek Chandra, Prashant J. Shenoy |
Hierarchical Scheduling for Symmetric Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 19(3), pp. 418-431, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Scheduling, Multiprocessor Systems, Hierarchical design |
49 | Xinyu Li, Omar Hammami |
Small scale multiprocessor soft IP (SSM IP): single FPGA chip area and performance evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 278, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
fpga, multiprocessor, network on chip |
49 | Tei-Wei Kuo, Jun Wu 0010, Hsin-Chia Hsih |
Real-Time Concurrency Control in a Multiprocessor Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 13(6), pp. 659-671, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Real-time concurrency control, two-version database, multiprocessor architecture, priority inversion |
49 | Xiaodong Zhang 0001 |
Performance Measurement and Modeling to Evaluate Various Effects on a Shared Memory Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(1), pp. 87-93, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
sequential code, virtual memory paging, modified Ware model, Encore Multimax, performance evaluation, architecture, performance modelling, performance measurement, multiprocessing systems, shared memory multiprocessor, cache coherence, multiprogramming, barriers, resource scheduling, timing models |
48 | José María López, José Luis Díaz, Daniel F. García |
Utilization Bounds for EDF Scheduling on Real-Time Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 28(1), pp. 39-68, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multiprocessor utilization bounds, partitioning, multiprocessor scheduling, earliest deadline first scheduling, bin-packing problem |
45 | José María López, José Luis Díaz, Daniel F. García |
Minimum and Maximum Utilization Bounds for Multiprocessor Rate Monotonic Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 15(7), pp. 642-653, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Chiara Francalanci, Paolo Giacomazzi |
High-Performance Self-Routing Algorithm for Multiprocessor Systems with Shuffle Interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 17(1), pp. 38-50, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
shuffle interconnection, Multiprocessor systems, self routing |
44 | Makoto Sugihara |
SEU Vulnerability of Multiprocessor Systems and Task Scheduling for Heterogeneous Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 757-762, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Heterogeneous Multiprocessor Systems, Reliability, Task Scheduling, Soft Error, Single Event Upset |
43 | Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada |
RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 336-341, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
codesign toolkit, embedded multiprocessor systems, system-level design toolkit, real-time operating systems, RTOS, multiprocessor systems-on-chip |
43 | G. N. Srinivasa Prasanna, Bruce R. Musicus |
Generalized Multiprocessor Scheduling and Applications to Matrix Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(6), pp. 650-664, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
multiprocessor compilation, parallel processing, task scheduling, multiprocessor scheduling, distributed-memory multiprocessors, DAG scheduling, communication locality |
42 | Qiang Li, David B. Gustavson |
Fat-tree for local area multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 32-36, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
local area multiprocessors, LAMP, high-performance low-cost parallel computing, LAN-size area, remote data cache, high performance multiprocessor, point-to-point physical connections, high system throughput, fat-tree topology, cable length, link clock speeds, biCMOS chips, performance evaluation, parallel architectures, parallel architecture, multiprocessor interconnection networks, local area networks, latency, packet switching, packet switch, CMOS, shared memory systems, distributed memory systems, simulation results, cache storage, system buses, SCI, buffer requirements, distributed-shared-memory multiprocessor, scalable coherent interface |
41 | Lennart Lindh, Johan Stärner, John Furunäs |
From single to multiprocessor real-time kernels in hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 1st IEEE Real-Time Technology and Applications Symposium, Chicago, Illinois, USA, May 15-17, 1995, pp. 42-43, 1995, IEEE Computer Society, 0-8186-6980-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiprocessor real-time kernels, single processor real-time kernels, improved performance, improved determinism, integrated deterministic CPU, deterministic multitasking real time kernel, high performance multitasking real time kernel, high performance standalone multitasking real time kernel, deterministic standalone multitasking real time kernel, heterogeneous multiprocessor real-time systems, homogeneous multiprocessor real-time systems, scheduling, performance evaluation, real-time systems, multiprocessing systems, hardware, reconfigurable architectures, processor scheduling, multiprogramming, operating system kernels, firmware |
41 | Byoung-Joon Min, Sang-Seok Shin, Kee-Wook Rim |
Design and analysis of a multiprocessor system with extended fault tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTDCS ![In: 5th IEEE Workshop on Future Trends of Distributed Computing Systems (FTDCS 1995), August 28-30, 1995, Chenju, Korea, Proceedings, pp. 301-307, 1995, IEEE Computer Society, 0-8186-7125-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
extended fault tolerance, scalable multiprocessor system, tree-type interconnection networks, computational complexity, reliability, fault tolerant computing, multiprocessor interconnection networks, latency, multiprocessing systems, multiprocessor system, performance penalty, implementation complexity |
40 | Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere |
Systematic and Automated Multiprocessor System Design, Programming, and Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3), pp. 542-555, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
40 | Ankit Mathur, Mayank Agarwal, Soumyadeb Mitra, Anup Gangwar, M. Balakrishnan, Subhashis Banerjee |
SMPS: an FPGA-based prototyping environment for multiprocessor embedded systems (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 273, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
40 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 551-556, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
40 | Jack B. Dennis |
Fresh Breeze: a multiprocessor chip architecture guided by modular programming principles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 31(1), pp. 7-15, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
40 | Michael J. Anderson, Bryan Catanzaro, Jike Chong, Ekaterina Gonina, Kurt Keutzer, Chao-Yue Lai, Mark Murphy, Bor-Yiing Su, Narayanan Sundaram |
PALLAS: Mapping Applications onto Manycore. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 89-113, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Ricardo Reis 0001 |
Design Tools and Methods for Chip Physical Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 155-166, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini |
An Introduction to Multi-Core System on Chip - Trends and Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 1-21, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting |
Invasive Computing: An Overview. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 241-268, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Benny Akesson, Anca Mariana Molnos, Andreas Hansson 0001, Jude Angelo Ambrose, Kees Goossens |
Composability and Predictability for Independent Application Development, Verification, and Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 25-56, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Dac Pham, Jim Holt, Sanjay Deshpande |
Embedded Multicore Systems: Design Challenges and Opportunities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 197-222, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Miltos D. Grammatikakis, George Kornaros, Marcello Coppola |
Power-Aware Multicore SoC and NoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 167-193, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Rakesh Kumar 0002, Timothy G. Mattson, Gilles Pokam, Rob F. Van der Wijngaart |
The Case for Message Passing on Many-Core Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 115-123, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld |
Hardware Support for Efficient Resource Utilization in Manycore Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multiprocessor System-on-Chip ![In: Multiprocessor System-on-Chip - Hardware Design and Tool Integration., pp. 57-87, 2011, Springer, 978-1-4419-6459-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Fan Dongrui, Hao Zhang 0009 |
The MULTICUBE Design Flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 3-17, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Enrico Rigoni, Carlos Kavka, Alessandro Turco, Giovanni Mariani |
Response Surface Modeling for Design Space Exploration of Embedded System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 75-92, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Patrick Bellasi, Simone Corbetta, William Fornaciari |
Run-Time Resource Management at the Operating System level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 109-141, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Hector Posadas, Sara Real, Eugenio Villar |
M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 19-50, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Cristina Silvano |
Conclusions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 205-206, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Prabhat Avasare, Chantal Ykman-Couvreur, Geert Vanmeerbeeck, Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Design Space Exploration Supporting Run-Time Resource Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 93-107, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Carlos Kavka, Luka Onesti, Enrico Rigoni, Alessandro Turco, Sara Bocchio, Fabrizio Castro, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Giovanni Mariani, Dongrui Fan, Hao Zhang 0009, Shibin Tang |
Design Space Exploration of Parallel Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 171-188, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Marcos Martínez, David Ferruz, Hector Posadas, Eugenio Villar |
High-level modeling and exploration of a powerline communication network based on System-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 145-170, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Giovanni Mariani, Chantal Ykman-Couvreur, Prabhat Avasare, Geert Vanmeerbeeck, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Design Space Exploration for Run-Time Management of a Reconfigurable System for Video Streaming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 189-204, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
40 | Enrico Rigoni, Carlos Kavka, Alessandro Turco, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Giovanni Mariani |
Optimization Algorithms for Design Space Exploration of Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ![In: Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, The MULTICUBE Approach., pp. 51-74, 2011, Springer, 978-1-4419-8836-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
39 | Jason Cong, Guoling Han, Wei Jiang |
Synthesis of an application-specific soft multiprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007, pp. 99-107, 2007, ACM, 978-1-59593-600-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
clustering, multiprocessor, pipeline, labeling, design space |
39 | Maode Ma, Babak Hamidzadeh |
A Fault-tolerant Strategy for Real-time Task Scheduling on Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), June 12-14, 1996, Beijing, China, pp. 544-546, 1996, IEEE Computer Society, 0-8186-7460-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Multiprocessor computer, Chunk Self-Scheduling, Simulation, Fault tolerance, Real-time system |
39 | Xiaodong Zhang 0001, Xiaohan Qin |
Performance Prediction and Evaluation of Parallel Processing on a NUMA Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(10), pp. 1059-1068, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
nonuniform memory access, parallel processing performance, BBN GP1000, NUMA shared-memory multiprocessor, scheduling, performance evaluation, parallel processing, programming environment, multiprocessing systems, analytical models, interprocessor communication, process scheduling, network contention, process synchronization, memory contention, optimal strategies, remote memory access |
39 | Norihisa Suzuki |
TOP-1 Multiprocessor Workstation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Parallel Lisp ![In: Parallel Lisp: Languages and Systems, US/Japan Workshop on Parallel Lisp, Sendai, Japan, June 5-8, 1989, Proceedings, pp. 353-363, 1989, Springer, 3-540-52782-6. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
Snoop cache, Queuing model simulation, Cache coherency, Interprocessor communication, Shared-bus multiprocessor |
38 | Chris J. Scheiman, Peter R. Cappello |
A Period-Processor-Time-Minimal Schedule for Cubical Mesh Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(3), pp. 274-280, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
period-processor-time-minimal schedule, cubical mesh algorithms, precedence-constrained multiprocessor schedules, toroidally connected mesh, scheduling, parallel algorithms, computational complexity, multiprocessor interconnection networks, directed graphs, systolic arrays, systolic array, directed acyclic graph, matrix algebra, matrix product, computationalcomplexity |
38 | Yun Jiang, Akifumi Makinouchi |
A parallel hash-based join algorithm for a networked cluster of multiprocessor nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPSAC ![In: 21st International Computer Software and Applications Conference (COMPSAC '97), 11-15 August 1997, Washington, DC, USA, pp. 678-683, 1997, IEEE Computer Society, 0-8186-8105-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
parallel hash-based join algorithm, multiprocessor nodes, distributed shared virtual space, message model, performance, design, parallel algorithms, parallel processing, shared-memory multiprocessor, distributed environments, high speed, low-cost, skew, ease of use, relational database systems, networked cluster |
38 | Guan-Joe Lai, Cheng Chen |
A new scheduling strategy for NUMA multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 222-229, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
non-uniform memory access, Longest Extended Critical Path First, multiprocessor systems, shared-memory multiprocessor, shared memory systems, processor scheduling, NUMA, scheduling strategies |
38 | Keying Wu, P. K. H. Ng, Xing Dong Jia, Richard M. M. Chen, A. M. Layfield |
Performance tuning of a multiprocessor sparse matrix equation solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 4-13, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiprocessor sparse matrix equation solver, sparse matrix equation, linear simultaneous equations, electrical circuit, multiprocessor implementation, parallel direct method, parallel algorithms, circuit analysis computing, SPICE, SPICE, circuit simulation, sparse matrices, performance tuning |
38 | Wonyong Sung, Sanjit K. Mitra, Branko Jeren |
Multiprocessor Implementation of Digital Filtering Algorithms Using a Parallel Block Processing Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(1), pp. 110-120, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
recursive filtering algorithms, digital filtering algorithms, parallel block processing, digital signal processingalgorithms, precedence graph, dependencyrelation, adaptive filtering algorithms, parallel algorithms, interconnection network, multiprocessor interconnection networks, multiprocessor system, data dependency, filtering theory, digital filters, ring network, prediction theory, FIR, computerised signal processing, scheduling method |
38 | Jang-Ping Sheu, Tsu-Huei Thai |
Partitioning and Mapping Nested Loops on Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 2(4), pp. 430-439, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
constant loop-carried dependencies, message-passing multiprocessor systems, interblock communication, execution ordering, time function, hyperplanemethod, fixed-size multiprocessor system, heuristic mapping algorithm, hypercubemachines, parallel algorithms, parallel programming, parallel, partitioning, mapping, iterations, data exchange, blocks, multiprogramming, communication overhead, nested loops |
35 | Nguyen Duc Thai |
Real-Time Scheduling in Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 165-170, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
35 | Benjamin C. Lee, Jamison D. Collins, Hong Wang 0003, David M. Brooks |
CPR: Composable performance regression for scalable multiprocessor models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), November 8-12, 2008, Lake Como, Italy, pp. 270-281, 2008, IEEE Computer Society, 978-1-4244-2836-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Yujia Jin, William Plishker, Kaushik Ravindran, Nadathur Satish, Kurt Keutzer |
Soft multiprocessor systems for network applications (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 271, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | James H. Anderson, Sanjoy K. Baruah |
Energy-Efficient Synthesis of Periodic Task Systems upon Identical Multiprocessor Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 24th International Conference on Distributed Computing Systems (ICDCS 2004), 24-26 March 2004, Hachioji, Tokyo, Japan, pp. 428-435, 2004, IEEE Computer Society, 0-7695-2086-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Dilip Sarkar |
Cost and Time-Cost Effectiveness of Multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(6), pp. 704-712, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
time-cost effectiveness, performance evaluation, performance, parallel algorithms, parallel algorithms, efficiency, multiprocessing systems, multiprocessor systems, cost effectiveness, pipelined computers |
34 | Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi |
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 2(2), pp. 15:1-15:32, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
34 | Evgeny V. Shchepin, Nodari Vakhania |
On the geometry, preemptions and complexity of multiprocessor and shop scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 159(1), pp. 183-213, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Shop scheduling, Algorithm, Time complexity, Multiprocessor scheduling, Preemption |
34 | Muhammet Fikret Ercan |
A performance comparison of PSO and GA in scheduling hybrid flow-shops with multiprocessor tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), Fortaleza, Ceara, Brazil, March 16-20, 2008, pp. 1767-1771, 2008, ACM, 978-1-59593-753-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multiprocessor task scheduling, flow shops, hybrid particle swarm optimization |
34 | Lars Lundberg, Håkan Lennerstad |
Guaranteeing Response Times for Aperiodic Tasks in Global Multiprocessor Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 35(2), pp. 135-151, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Aperiodic, Dhalls effect, Optimal threshold, Synthetic utilization, Scheduling, Multiprocessor |
34 | Naser Sedaghati-Mokhtari, Mahdi Nazm Bojnordi, Sied Mehdi Fakhraie |
MDST: Multiprocessor DSP Simulation Toolkit for Voice Processing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 15th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2007), October 24-26, 2007, Istanbul, Turkey, pp. 173-178, 2007, IEEE Computer Society, 978-1-4244-1854-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
MDST, Multiprocessor DSP Simulation toolkit, Voice processing applications |
34 | Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo, Shau-Yin Tseng |
Real-Time Task Replication for Fault Tolerance in Identical Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real-Time and Embedded Technology and Applications Symposium ![In: Proceedings of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2007, April 3-6, 2007, Bellevue, Washington, USA, pp. 249-258, 2007, IEEE Computer Society, 978-0-7695-2800-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Fault Tolerance, Multiprocessor Systems, Real-Time Task Scheduling, Task Replication |
34 | Guolong Lin, Rajmohan Rajaraman |
Approximation algorithms for multiprocessor scheduling under uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, San Diego, California, USA, June 9-11, 2007, pp. 25-34, 2007, ACM, 978-1-59593-667-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
approximation algorithms, multiprocessor scheduling |
34 | Dakai Zhu 0001, Rami G. Melhem, Bruce R. Childers |
Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multiprocessor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 14(7), pp. 686-700, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
slack sharing, scheduling, Real-time systems, multiprocessor |
34 | Aleksei V. Fishkin, Klaus Jansen, Lorant Porkolab |
On Minimizing Average Weighted Completion Time: A PTAS for Scheduling General Multiprocessor Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCT ![In: Fundamentals of Computation Theory, 13th International Symposium, FCT 2001, Riga, Latvia, August 22-24, 2001, Proceedings, pp. 495-507, 2001, Springer, 3-540-42487-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
scheduling, Parallel processing, multiprocessor tasks |
34 | Sivarama P. Dandamudi, Samir Ayachi |
Performance of Hierarchical Processor Scheduling in Shared-Memory Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(11), pp. 1202-1213, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
performance evaluation, multiprocessor systems, processor scheduling, time-sharing, Hierarchical scheduling, space-sharing |
34 | Cosimo Antonio Prete, Gianpaolo Prina, Luigi M. Ricciardi |
A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 6(9), pp. 915-929, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiple cache consistency, performance analysis, multiprocessor, Cache memory, trace-driven simulation, coherence protocol |
34 | Edwin S. H. Hou, Nirwan Ansari, Hong Ren |
A Genetic Algorithm for Multiprocessor Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(2), pp. 113-120, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
robust stochastic search algorithms, random task graphs, robot inverse dynamics computational task graph, genetic algorithms, genetic algorithm, simulation, scheduling, performance evaluation, optimization, computational complexity, optimisation, multiprocessing systems, NP-hard, heuristic search, multiprocessor scheduling, list scheduling |
34 | Khaled M. F. Elsayed |
Parallel algorithms for the orthogonal multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 30th Annual Southeast Regional Conference, 1992, Raleigh, North Carolina, USA, April 8-10, 1992, pp. 292-299, 1992, ACM, 0-89791-506-2. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
Jacobi's method, Orthogonal multiprocessor, image component labeling, parallel algorithms |
33 | David Parry 0001 |
Scalability in computing for today and tomorrow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 17th Conference on Advanced Research in VLSI (ARVLSI '97), September 15-16, 1997, Ann Arbor, MI, USA, pp. 12-31, 1997, IEEE Computer Society, 0-8186-7913-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
synergistic combination, performance growth, current multiprocessor alternatives, scalable SMP, Silicon Graphics Origin multiprocessor, S/sup 2/MP memory architecture, core technologies, scalability, system architecture, shared-memory multiprocessors, shared memory systems |
33 | Chris J. Scheiman, Peter R. Cappello |
A Processor-Time-Minimal Systolic Array for Transitive Closure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(3), pp. 257-269, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
processor-time-minimal multiprocessor schedules, 2-D mesh, parallel algorithms, systolic array, systolic arrays, directed acyclic graph, multiprocessor schedule, transitive closure |
33 | X. Zhao, Nigel J. Martin 0001, Roger G. Johnson |
PPS - A Parallel Partition Sort Algorithm for Multiprocessor Database Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA Workshops ![In: 11th International Workshop on Database and Expert Systems Applications (DEXA'00), 6-8 September 2000, Greenwich, London, UK, pp. 635-646, 2000, IEEE Computer Society, 0-7695-0680-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
parallel partition sort algorithm, multiprocessor database systems, workload imbalance, partition imbalance, heterogeneous imbalance, shared-nothing multiprocessor database environment, range intervals, fast internal sorting method, dynamic mechanism, interval sizes, dynamic mathematical model approach, data distribution estimation, parallel algorithms, skew, PPS |
33 | Björn Andersson, Jan Jonsson |
Fixed-priority preemptive multiprocessor scheduling: to partition or not to partition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 12-14 December 2000, Cheju Island, South Korea, pp. 337-346, 2000, IEEE Computer Society, 0-7695-0930-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
fixed-priority preemptive multiprocessor scheduling, multiprocessor real-time scheduling, task set partitioning, uniprocessor scheduling, periodically arriving tasks, preemption costs, migration costs, real-time systems, processor scheduling, software performance evaluation, algorithm performance |
33 | John Heinlein, Kourosh Gharachorloo, Robert P. Bosch Jr., Mendel Rosenblum, Anoop Gupta |
Coherent Block Data Transfer in the FLASH Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 18-27, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
FLASH multiprocessor, block data transfer, multiple communication protocols, embedded protocol processor, protocol, shared memory, prefetching, cache storage, FLASH, cache coherence protocol, multiprocessor architecture, MAGIC |
33 | Gyung-Leen Park, Behrooz A. Shirazi, Jeff Marquis |
DFRN: A New Approach for Duplication Based Scheduling for Distributed Memory Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 157-166, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
DFRN, duplication based scheduling, distributed memory multiprocessor systems, parallel execution time minimization, DBS algorithms, task duplication method, worst case behavior, tree structured input directed acyclic graph, time complexity, distributed memory systems, performance improvement, optimal schedule, boundary condition, multiprocessor scheduling problems |
33 | Anthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas |
The Augmint multiprocessor simulation toolkit for Intel x86 architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 486-490, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Augmint multiprocessor simulation toolkit, Intel x86 architectures, publicly available simulation tools, instruction mix, memory reference patterns, CISC architectures, execution driven multiprocessor simulation toolkit, m4 macro extended C, C++ applications, SPLASH-2 benchmark suites, thread based programming model, shared global address space, private stack space, simulator interface, MINT simulation toolkit, x8d based uniprocessor systems, multiprocessing systems, trace driven simulation, architecture simulators, uniprocessors |
33 | Tatsuhiro Tsuchiya, Yoshiaki Kakuda, Tohru Kikuno |
A new fault-tolerant scheduling technique for real-time multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 2nd International Workshop on Real-Time Computing Systems and Applications, October 25 - 27, 1995, Tokyo, Japan, pp. 197-202, 1995, IEEE Computer Society, 0-8186-7106-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
real-time multiprocessor systems, task laxity, scheduling, fault-tolerant, fault-tolerance, real-time systems, fault tolerant computing, multiprocessing systems, multiprocessor systems, task scheduling, processor scheduling, aperiodic tasks |
33 | Stephen Lucci, Izidor Gertner, Anil Gupta, Uday Hegde |
Reflective-memory multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 85-94, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
reflective-memory multiprocessor, hardware-supported data replication, multiple computers, memory semantics, reflective memory implementation, Encore Infinity, spinlocks, cache coherency problems, massive replication, recovery procedure, crashed nodes, reliability, fault tolerant computing, shared memory systems, distributed memory systems, system recovery, cache storage, cached architectures, distributed shared memory multiprocessor |
33 | Stefan Ronngren, Behrooz A. Shirazi |
Static multiprocessor scheduling of periodic real-time tasks with precedence constraints and communication costs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (2) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 143-152, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
static multiprocessor scheduling, periodic real-time tasks, large task sets, exclusion relation, heuristic scheduling algorithms, clustering, real-time systems, resource allocation, NP-complete, multiprocessing systems, communication complexity, mutual exclusion, processor scheduling, timing constraints, task allocation, communication costs, precedence constraints, multiprocessor architecture, precedence relations, scheduling methods |
33 | Sunggu Lee, Kang G. Shin |
On Probabilistic Diagnosis of Multiprocessor Systems Using Multiple Syndromes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(6), pp. 630-638, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
probabilistic diagnosis, multiple syndromes, distributedself-diagnosis, comparison testing, diagnostic accuracy, sparseinterconnection networks, interprocessor tests, low fault coverage, system-leveldiagnosis, performance evaluation, fault tolerant computing, probability, multiprocessor, multiprocessing systems, multiprocessor systems, multicomputer, self-test, intermittent fault, diagnosis algorithms, fault-tolerantcomputing |
33 | Chunming Qiao, Rami G. Melhem |
Reconfiguration with Time Division Multiplexed MIN's for Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(4), pp. 337-352, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
MIN's, multiprocessor communications, TDM-MIN's, N time slots, n-dimensional hypercubes, Markov analysis, partition of connection requests, partitioning, mappings, reconfiguration, multiprocessor interconnection networks, embedding, meshes, NP-hard, multistage interconnection networks, optical interconnects, rings, binary trees, shift registers, time division multiplexing, time division multiplexed, round-robin, cube-connected-cycles |
33 | Eva Ma, Dennis G. Shea |
E-Kernel: An Embedding Kernel on the IBM Victor V256 Multiprocessor for Program Mapping and Network Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(9), pp. 977-994, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
E-kernel, embedding kernel, IBM victor V256 multiprocessor, program mapping, message-passing partitionable multiprocessor, new network topology, 2D mesh network, task graph topologies, communication network topology, real-time systems, parallel programming, graph theory, message passing, multiprocessing systems, parallel system, task graph, program diagnostics, communication model, asymptotically optimal, reconfigured network, network reconfiguration |
33 | Rajiv Gupta 0001 |
Synchronization and Communication Costs of Loop Partitioning on Shared-Memory Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(4), pp. 505-512, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
static loop scheduling, staticloop decomposition, computer-assisted run-time scheduling, multidimensional loops, operation execution costs, synchronization costs, programexecution, synchronization instruction, Encore multiprocessor system, scheduling, parallel algorithms, parallel programming, program compilers, programming theory, communication costs, nested loops, self-scheduling, shared-memory multiprocessor systems, loop partitioning, program decomposition |
33 | Ben A. Blake, Karsten Schwan |
Experimental Evaluation of a Real-Time Scheduler for a Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(1), pp. 34-44, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
processor deadlines, process execution times, earliest possible start times, scheduling, real-time systems, real-time scheduler, multiprocessor system, multiprocessor scheduler, multiprogramming, assignment, robotics applications |
30 | Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere |
Multi-processor system design with ESPAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 211-216, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
system-level design, Kahn process networks, heterogeneous MPSoCs |
30 | Shelby H. Funk, Sanjoy K. Baruah |
Characteristics of EDF Schedulability on Uniform Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 15th Euromicro Conference on Real-Time Systems (ECRTS 2003), 2-4 July 2003, Porto, Portugal, Proceedings, pp. 211-, 2003, IEEE Computer Society, 0-7695-1936-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Manhee Lee, Minseon Ahn, Eun Jung Kim 0001 |
I2SEMS: Interconnects-Independent Security Enhanced Shared Memory Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 94-103, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Benfano Soewito, Ning Weng |
Methodology for Evaluating DNA Pattern Searching Algorithms on Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BIBE ![In: Proceedings of the 7th IEEE International Conference on Bioinformatics and Bioengineering, BIBE 2007, October 14-17, 2007, Harvard Medical School, Boston, MA, USA, pp. 570-577, 2007, IEEE Computer Society, 978-1-4244-1509-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
30 | Olivier Muller, Amer Baghdadi, Michel Jézéquel |
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1330-1335, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Malcolm Mandviwalla, Nian-Feng Tzeng |
Energy-Efficient Scheme for Multiprocessor-Based Router Linecards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAINT ![In: 2006 International Symposium on Applications and the Internet (SAINT 2006), 23-27 January 2006, Phoenix, Arizona, USA, pp. 156-163, 2006, IEEE Computer Society, 0-7695-2508-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
linecards, multiprocessors, Dynamic voltage scaling, energy consumption, routers |
30 | Byung-Joo Hong, Koon-Shik Cho, Seung-Hyun Kang, Suk-Yoon Lee, Jun Dong Cho |
On the Configurable Multiprocessor SoC Platform with Crossbar Switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1087-1090, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Lars Lundberg, Håkan Lennerstad |
Global Multiprocessor Scheduling of Aperiodic Tasks using Time-Independent Priorities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), May 27-30, 2003, Toronto, Canada, pp. 170-180, 2003, IEEE Computer Society, 0-7695-1956-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Sanjoy K. Baruah, Joël Goossens |
Rate-monotonic scheduling on uniform multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 23rd International Conference on Distributed Computing Systems (ICDCS 2003), 19-22 May 2003, Providence, RI, USA, pp. 360-366, 2003, IEEE Computer Society, 0-7695-1920-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Uniform multiprocessors, periodic tasks, global scheduling, rate-monotonic algorithm, static priorities |
30 | Naraig Manjikian |
Multiprocessor enhancements of the SimpleScalar tool set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 29(1), pp. 8-15, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Tei-Wei Kuo, Hsin-Chia Hsih |
Concurrency control in a multiprocessor real-time database system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 12th Euromicro Conference on Real-Time Systems (ECRTS 2000), 19-21 June 2000, Stockholm, Sweden, Proceedings, pp. 55-62, 2000, IEEE Computer Society, 0-7695-0734-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | Pao-Ann Hsiung, Sao-Jie Chen, Tsung-Chien Hu, Shih-Chiang Wang |
PSM: an object-oriented synthesis approach to multiprocessor system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(1), pp. 83-97, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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30 | Masafumi Takahashi, Hiroyuki Takano, Emi Kaneko, Seigo Suzuki |
A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 314-322, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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30 | Xinmin Tian, Shashank S. Nemawarkar, Guang R. Gao, Herbert H. J. Hum |
Data locality sensitivity of multithreaded computations on a distributed-memory multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Proceedings of the 1996 conference of the Centre for Advanced Studies on Collaborative Research, November 12-14, 1996, Toronto, Ontario, Canada, pp. 37, 1996, IBM. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP BibTeX RDF |
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30 | Gerardus Johannes Wichardus van Dijk, A. J. van der Wal |
Partial Ordering of Synchronization Events for Distributed Debugging in Tightly-coupled Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDMCC ![In: Distributed Memory Computing, 2nd European Conference, EDMCC2, Munich, FRG, April 22-24, 1991, Proceedings, pp. 100-109, 1991, Springer, 3-540-53951-4. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
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29 | Amer Baghdadi |
Exploration et conception systématique d'architectures multiprocesseurs monopuces dédiées à des applications spécifiques = methods and tools for multiprocessor systems on chip, hardware/software co-designExploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC. (Exploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC). ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2002 |
RDF |
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29 | Grant Martin |
Multi-Processor SoC-Based Design Methodologies Using Configurable and Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 53(1-2), pp. 113-127, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
MPSoC, programming models, dataflow, instruction-set extension, multiprocessor system-on-chip, configurable processor, electronic system-level design |
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