Search results for "speed-independent"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
51	N. M. Goubareni	Simulation of Chaotic Iterative Processes in Speed-Independent Computing Networks.	PDP	1996	DBLP DOI BibTeX RDF	chaotic iterative process simulation, speed-independent computing, mathematical simulation, self organizing chaotic processes, asynchronous method, chaotic relaxations, chaotic computing processes, time parameters, Dirichlet problem, rectangular domain, virtual machines, delay, convergence, convergence, multiprocessor interconnection networks, iterative methods, error analysis, errors, Monte Carlo methods, Monte-Carlo method, computer simulation, normal distribution, normal distribution, boundary-value problems, Laplace transforms, random variable, Laplace equation
45	Nozar Tabrizi, Michael J. Liebelt, Kamran Eshraghian	Delay Hazards in Complex Gate Based Speed Independent VLSI Circuits.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF	isochronic forks, speed independent circuits (SICs), Asynchronous circuits, signal transition graphs (STGs), hazards
43	Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev	Decomposition and technology mapping of speed-independent circuits using Boolean relations.	ICCAD	1997	DBLP DOI BibTeX RDF	Boolean decomposition, decomposed logic sharing, design library, library matching, logic decomposition, logic resynthesis, signal insertion, two-input combinational gate, two-input sequential gate, optimization, technology mapping, circuit CAD, speed-independent circuits, netlist, complex gates, Boolean relations
41	Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev	Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis.	ASYNC	1997	DBLP DOI BibTeX RDF	combinational decomposition, sequential decomposition, monotonous cover, signal insertion, factorization, hazards, resynthesis, Speed-independent circuit
40	Ravishankar Rao, Sarma B. K. Vrudhula	Energy-Optimal Speed Control of a Generic Device.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
39	Enric Pastor, Jordi Cortadella, Oriol Roig	A new look at the conditions for the synthesis of speed-independent circuits.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	gate-level synthesis, gate library constraint, fan-in reduction, VLSI, logic design, logic CAD, integrated circuit design, circuit CAD, integrated logic circuits, circuit optimisation, optimization techniques, speed-independent circuits
37	Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers	Synthesis of Speed Independent Circuits Based on Decomposition.	ASYNC	2004	DBLP DOI BibTeX RDF	abstraction, synthesis, Decomposition, STGs, speed-independent circuits
37	Feng Shi 0010, Yiorgos Makris	Fault simulation and random test generation for speed-independent circuits.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	random test pattern generation, fault simulation, asynchronous circuits, speed-independent circuits
37	Sung-Bum Park, Takashi Nanya	Automatic Synthesis of Speed-Independent Circuits from Signal Transition Graph Specifications.	VLSI Design	1996	DBLP DOI BibTeX RDF	astnchronous design, logic synthesis, signal transition graph, speed-independent circuits
37	Oriol Roig, Jordi Cortadella, Enric Pastor	Hierarchical gate-level verification of speed-independent circuits.	ASYNC	1995	DBLP DOI BibTeX RDF	hierarchical gate-level verification, state signals, computational complexity, logic testing, time complexity, asynchronous circuits, speed-independent circuits, complex gates
32	Duarte Lopes de Oliveira, Marius Strum, Jiang Chau Wang	Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers.	SBCCI	2005	DBLP DOI BibTeX RDF	burst-mode, automatic synthesis, hazard, asynchronous logic, speed-independent
32	Giacomo Cioffi	Autotesting Speed-Independent Sequential Circuits.	IEEE Trans. Computers	1978	DBLP DOI BibTeX RDF	speed-independent network, Autotesting, sequential network, modular, machine, self-synchronizing, fail safe
26	Radu Negulescu, Ad M. G. Peeters	Verification of Speed-Dependences in Single-Rail Handshake Circuits.	ASYNC	1998	DBLP DOI BibTeX RDF	single-rail, isochronic forks, verification, timing, asynchronous circuits, progress, speed-independent circuits, process spaces, handshake circuits
25	William B. Toms, David A. Edwards	Efficient synthesis of speed-independent combinational logic circuits.	ASP-DAC	2005	DBLP DOI BibTeX RDF
25	Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev	Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis.	ED&TC	1997	DBLP DOI BibTeX RDF
24	Juha Plosila, Kaisa Sere	Action Systems in Pipelined Processor Design.	ASYNC	1997	DBLP DOI BibTeX RDF	pipelined processor design, asynchronous pipelined microprocessors, hazard situations, verifying refinement steps, circuit implementation, speed-independent techniques, refinement calculus, refinement calculus, action systems
24	Alexandre Yakovlev, Victor Varshavsky, Vyacheslav Marakhovsky, Alexei L. Semenov	Designing an asynchronous pipeline token ring interface.	ASYNC	1995	DBLP DOI BibTeX RDF	asynchronous pipeline token ring interface, speed-independent interface, reliable communication medium, on-board multicomputer, asynchronous buses, point-to-point interconnections, syntax-driven implementation, channel protocol controller, protocols, fairness, multiprocessor interconnection networks, local area networks, pipeline processing, deadlock-freedom, token networks
23	Peter A. Beerel, Cheng-Ta Hsieh, Suhrid A. Wadekar	Estimation of energy consumption in speed-independent control circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
23	Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev	Decomposition and technology mapping of speed-independent circuits using Boolean relations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
21	Feng Shi 0010, Yiorgos Makris	SPIN-TEST: automatic test pattern generation for speed-independent circuits.	ICCAD	2004	DBLP DOI BibTeX RDF
21	Alexander Katkov, Janusz Szopa	Chaotic Processing in Parallel Speed Independent Architectures.	PARELEC	2002	DBLP DOI BibTeX RDF
21	Hüsnü Yenigün, Vladimir Levin, Doron A. Peled, Peter A. Beerel	Hazard-Freedom Checking in Speed-Independent Systems.	CHARME	1999	DBLP DOI BibTeX RDF
21	Peter A. Beerel, Chris J. Myers, Teresa H. Meng	Covering conditions and algorithms for the synthesis of speed-independent circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
21	Alex Kondratyev, Michael Kishinevsky, Alexandre Yakovlev	Hazard-free implementation of speed-independent circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
20	Dominic Wist, Mark Schäfer, Walter Vogler, Ralf Wollowski	STG Decomposition: Internal Communication for SI Implementability.	ACSD	2010	DBLP DOI BibTeX RDF	CSC, decomposition, STG, resynthesis, speed independent
20	Andrey Mokhov, Victor Khomenko, Alexandre Yakovlev	Flat Arbiters.	ACSD	2009	DBLP DOI BibTeX RDF	Asynchronous circuits, Signal Transition Graph (STG), Arbiters, Speed-independent circuits
20	Mark Schäfer, Walter Vogler, Ralf Wollowski, Victor Khomenko	Strategies for Optimised STG Decomposition.	ACSD	2006	DBLP DOI BibTeX RDF	Petri net, decomposition, Asynchronous circuit, STG, speed-independent
20	Mohamed Kawokgy, C. André T. Salama	Low-power asynchronous viterbi decoder for wireless applications.	ISLPED	2004	DBLP DOI BibTeX RDF	bundled-data, four-phase, low-power, synchronous, wireless, VHDL, digital signal processing, asynchronous, register transfer level, viterbi algorithm, speed-independent, handshaking protocol
20	Nozar Tabrizi, Michael J. Liebelt, Kamran Eshraghian	A Tabular Method for Guard Strengthening, Symmetrization, and Operator Reduction for Martin's Asynchronous Design Methodology.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF	formal program transformation, self-timed logic, signal transition graphs (STG), speed independent circuits, guarded commands, delay insensitive circuits, Asynchronous sequential circuits
19	Feng Shi 0010, Yiorgos Makris	SPIN-PAC: test compaction for speed-independent circuits.	ASP-DAC	2005	DBLP DOI BibTeX RDF
18	Shaohua Chen, Gang Liu 0017, Lianqing Zhu	Sensorless Control Strategy of a 315 kW High-Speed BLDC Motor Based on a Speed-Independent Flux Linkage Function.	IEEE Trans. Ind. Electron.	2017	DBLP DOI BibTeX RDF
17	Feng Shi 0010, Yiorgos Makris	SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits.	ITC	2004	DBLP DOI BibTeX RDF
17	Artur Pereira, Antonio Rui Borges, Antonio B. Ferrari	Exclusion Relation of k Out of n and the Synthesis of Speed-Independent Circuits.	SBCCI	2003	DBLP DOI BibTeX RDF
17	Enric Pastor, Jordi Cortadella, Alex Kondratyev, Oriol Roig	Structural methods for the synthesis of speed-independent circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
17	Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev	A region-based theory for state assignment in speed-independent circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
17	Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno	Partial order based approach to synthesis of speed-independent circuits.	ASYNC	1997	DBLP DOI BibTeX RDF	approximation, synthesis, asynchronous circuits, unfolding, Signal Transition Graph
17	Polly Siegel, Giovanni De Micheli	Decomposition methods for library binding of speed-independent asynchronous designs.	ICCAD	1994	DBLP DOI BibTeX RDF
13	Jerry R. Burch	Combining CTL, Trace Theory and Timing Models.	Automatic Verification Methods for Finite State Systems	1989	DBLP DOI BibTeX RDF
12	Alex Chan, Danil Sokolov, Victor Khomenko, David Lloyd, Alex Yakovlev	Burst Automaton: Framework for Speed-Independent Synthesis Using Burst-Mode Specifications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
12	Florian Huemer, Robert Najvirt, Andreas Steininger	On SAT-Based Model Checking of Speed-Independent Circuits.	DDECS	2022	DBLP DOI BibTeX RDF
12	Xiao-Gang Wang 0003, Qing Kang, Xiaohong Chen, Qinghua Fu, Peng Wang	A Temperature-Domain SEBAL Model Based on a Wind Speed-Independent Theoretical Trapezoidal Space Between Fractional Vegetation Coverage and Land Surface Temperature.	IEEE Geosci. Remote. Sens. Lett.	2021	DBLP DOI BibTeX RDF
12	Mriganka Ghosh Majumder, Rakesh R, Mohammed Imthias, K. Gopakumar 0001, Loganathan Umanand, Wojciech Jarzyna	Extending the Linear Modulation Range to Full Base Speed Independent of Load Power Factor for a Multilevel Inverter Fed IM Drive.	IEEE Trans. Ind. Electron.	2020	DBLP DOI BibTeX RDF
12	Danil Sokolov, Victor Khomenko, Alex Yakovlev, David Lloyd	Design and Verification of Speed-Independent Circuits with Arbitration in Workcraft.	ASYNC	2018	DBLP DOI BibTeX RDF
12	Fengtian Lv, Haibo Gao, Yumeng Bai, Nan Li, Liang Ding 0001, Ruyi Zhou, Zongquan Deng, Guangjun Liu	Extraction of Speed-Independent Vibration Features for Terrain Classification in Lugged-Wheel Rovers.	ROBIO	2018	DBLP DOI BibTeX RDF
12	Rob van Glabbeek	Is Speed-Independent Mutual Exclusion Implementable? (Invited Talk).	CONCUR	2018	DBLP DOI BibTeX RDF
12	Ru Ma, Junqiang Li, Shanhai Jin, Shijie Guo, Kazunobu Hashimoto, Shijie Dai	A speed-independent feedback index for walking pattern recognition for a walking assistive robotic suit.	CIS/RAM	2017	DBLP DOI BibTeX RDF
12	Aparna S. Raghunath, K. T. Sreekumar, C. Santhosh Kumar, K. I. Ramachandran	Improving Speed Independent Performance of Fault Diagnosis Systems through Feature Mapping and Normalization.	ICMLA	2016	DBLP DOI BibTeX RDF
12	Yuri Stepchenkov, Victor N. Zakharov, Yuri Rogdestvenski, Yuri Diachenko, Nickolaj Morozov, Dmitri Stepchenkov	Speed-independent fused multiply add and subtract unit.	EWDTS	2016	DBLP DOI BibTeX RDF
12	Pradeep Kumar Biswal, K. Mishra, Santosh Biswas, Hemangee K. Kapoor	A Discrete Event System Approach to Online Testing of Speed Independent Circuits.	VLSI Design	2015	DBLP DOI BibTeX RDF
12	Y. A. Stepchenkov, Victor N. Zakharov, Y. G. Diachenko, N. V. Morozov, D. Y. Stepchenkov	Cell library for speed-independent VLSI.	EWDTS	2015	DBLP DOI BibTeX RDF
12	Y. A. Stepchenkov, Victor N. Zakharov, Y. V. Rogdestvenski, Y. G. Diachenko, N. V. Morozov, D. Y. Stepchenkov	Speed-independent floating point coprocessor.	EWDTS	2015	DBLP DOI BibTeX RDF
12	Danil Sokolov, Victor Khomenko, Andrey Mokhov, Alex Yakovlev, David Lloyd	Design and Verification of Speed-Independent Multiphase Buck Controller.	ASYNC	2015	DBLP DOI BibTeX RDF
12	Gonzalo Bailador del Pozo, Carmen Sánchez Ávila, Alberto de Santos Sierra, Javier Guerra Casanova	Speed-Independent Gait Identification for Mobile Devices.	Int. J. Pattern Recognit. Artif. Intell.	2012	DBLP DOI BibTeX RDF
12	Shifeng Wang, Rami N. Khushaba, Sarath Kodagoda	Towards speed-independent road-type classification.	ICARCV	2012	DBLP DOI BibTeX RDF
12	Dominic Wist, M. Schaefer, Walter Vogler, Ralf Wollowski	Signal transition graph decomposition: internal communication for speed independent circuit implementation.	IET Comput. Digit. Tech.	2011	DBLP DOI BibTeX RDF
12	Eric Coyle, Emmanuel G. Collins Jr., Rodney G. Roberts	Speed independent terrain classification using Singular Value Decomposition Interpolation.	ICRA	2011	DBLP DOI BibTeX RDF
12	Yu Li, Terrence S. T. Mak, Alex Yakovlev	Redressing timing issues for speed-independent circuits in deep submicron age.	DATE	2011	DBLP DOI BibTeX RDF
12	Aleksandr Katkow, Agnieszka Ulfik	Nature Inspired Arithmetic in Speed Independent Circuit.	FCS	2010	DBLP BibTeX RDF
12	Ondrej Gallo, Tomás Necas, Fedor Lehocki	A Tool for the Synthesis of Asynchronous Speed-Independent Circuits.	ACSD/Petri Nets Workshops	2010	DBLP BibTeX RDF
12	Sean Keller, Michael Katelman, Alain J. Martin	A Necessary and Sufficient Timing Assumption for Speed-Independent Circuits.	ASYNC	2009	DBLP DOI BibTeX RDF
12	Igor Lemberski	Avoiding Hazards for Speed-Independent Logic Design.	World Congress on Engineering	2007	DBLP BibTeX RDF
12	Hiroshi Saito, Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya	Logic optimization for asynchronous speed independent controllers using transduction method.	ASP-DAC	2003	DBLP DOI BibTeX RDF
12	Alexander Katkov, Janusz Szopa	Distributed Computing in Simulation System with Speed Independent Cooperation.	PDPTA	2000	DBLP BibTeX RDF
12	Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev	Logic decomposition of speed-independent circuits.	Proc. IEEE	1999	DBLP DOI BibTeX RDF
12	Ren-Der Chen, Jer-Min Jou, Yeu-Horng Shiau	An efficient method for the decomposition and resynthesis of speed-independent circuits.	ICECS	1999	DBLP DOI BibTeX RDF
12	Peter A. Beerel, Jerry R. Burch, Teresa H. Meng	Checking Combinational Equivalence of Speed-Independent Circuits.	Formal Methods Syst. Des.	1998	DBLP DOI BibTeX RDF
12	Uisok Kim, Dong-Ik Lee	Practical Synthesis of Speed-Independent Circuits Using Unfoldings.	ASP-DAC	1998	DBLP DOI BibTeX RDF
12	Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella	Synthesis of Speed-Independent Circuits from STG-Unfolding Segment.	DAC	1997	DBLP DOI BibTeX RDF
12	Enric Pastor, Oriol Roig, Jordi Cortadella, Alex Kondratyev	Structural Methods for the Synthesis of Speed-Independent Circuits.	ED&TC	1996	DBLP DOI BibTeX RDF
12	Nozar Tabrizi, Michael J. Liebelt, Kamran Eshraghian	Dynamic hazards and speed independent delay model.	ASYNC	1996	DBLP DOI BibTeX RDF
12	A. Katkov, N. Goubareni	Self-Organizing Computational Processes in Networks with Speed Independent Functional Elements.	ESM	1996	DBLP BibTeX RDF
12	Alex Kondratyev, Michael Kishinevsky, Alexandre Yakovlev	On hazard-free implementation of speed-independent circuits.	ASP-DAC	1995	DBLP DOI BibTeX RDF
12	Peter A. Beerel, Cheng-Ta Hsieh, Suhrid A. Wadekar	Estimation of energy consumption in speed-independent control circuits.	ISLPD	1995	DBLP DOI BibTeX RDF
12	Sung Tae Jung, Eun Sei Park, Jung Sik Kim, Chu Shik Jhon	Automatic Synthesis of Gate-Level Speed-Independent Control Circuits from Signal Transition Graphs.	ISCAS	1995	DBLP DOI BibTeX RDF
12	Michael Kishinevsky, Alex Kondratyev, Alexander Taubin, Victor Varshavsky	Analysis and Identification of Speed-Independent Circuits on an Event Model.	Formal Methods Syst. Des.	1994	DBLP DOI BibTeX RDF
12	Alex Kondratyev, Alexander Taubin	Verification of the speed-independent circuits by STG unfoldings.	ASYNC	1994	DBLP DOI BibTeX RDF
12	Peter A. Beerel, Jerry R. Burch, Teresa H.-Y. Meng	Sufficient conditions for correct gate-level speed-independent circuits.	ASYNC	1994	DBLP DOI BibTeX RDF
12	Sung Tae Jung, Chu Shik Jhon	Direct Synthesis of Efficient Speed-Independent Circuits from Deterministic Signal Transition Graphs.	ISCAS	1994	DBLP DOI BibTeX RDF
12	Alex Kondratyev, Michael Kishinevsky, Bill Lin 0001, Peter Vanbekbergen, Alexandre Yakovlev	Basic Gate Implementation of Speed-Independent Circuits.	DAC	1994	DBLP DOI BibTeX RDF
12	Andrew M. Bailey	Automatic Verification of Speed-Independent Circuit Designs Using the Circal System.	CHARME	1993	DBLP DOI BibTeX RDF
12	Peter A. Beerel, Jerry R. Burch, Teresa H.-Y. Meng	Efficient verification of determinate speed-independent circuits.	ICCAD	1993	DBLP DOI BibTeX RDF
12	Ruchir Puri, Jun Gu	Signal Transition Graph Constraints for Speed-independent Ciruit Synthesis.	ISCAS	1993	DBLP BibTeX RDF
12	Peter A. Beerel, Teresa H.-Y. Meng	Semi-modularity and testability of speed-independent circuits.	Integr.	1992	DBLP DOI BibTeX RDF
12	Yogesh Mishra, Sunil D. Sherlekar, G. Venkatesh 0001	Path breaker: a tool for the optimal design of speed independent asynchronous controllers.	EURO-DAC	1992	DBLP DOI BibTeX RDF
12	Peter A. Beerel, Teresa H.-Y. Meng	Automatic gate-level synthesis of speed-independent circuits.	ICCAD	1992	DBLP DOI BibTeX RDF
12	Carl-Johan H. Seger	On the Existence of Speed-Independent Circuits.	Theor. Comput. Sci.	1991	DBLP DOI BibTeX RDF
12	David L. Dill	Trace theory for automatic hierarchical verification of speed-independent circuits.		1989	RDF
12	Steven M. Nowick, David L. Dill	Practicality of state-machine verification of speed-independent circuits.	ICCAD	1989	DBLP DOI BibTeX RDF
12	David L. Dill, Steven M. Nowick, Robert F. Sproull	Automatic verification of speed-independent circuits with Petri net specifications.	ICCD	1989	DBLP DOI BibTeX RDF
12	H. Sechovsky, S. Jura	Asynchronous speed-independent arbiter in a form of a hardware control module.	AFIPS National Computer Conference	1976	DBLP DOI BibTeX RDF
12	Paolo Corsini	Asynchronous Interlock Units for Speed-Independent Multiprocessor Systems.	GI Jahrestagung	1976	DBLP DOI BibTeX RDF
12	Robert M. Keller	Towards a Theory of Universal Speed-Independent Modules.	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
12	David Misunas	Petri Nets and Speed Independent Design.	Commun. ACM	1973	DBLP DOI BibTeX RDF
12	Izumi Kimura	Space-Continuous Time-Semicontinuous Theory of Speed-Independent Asynchronous Circuits	Inf. Control.	1973	DBLP DOI BibTeX RDF
12	Robert E. Swartwout	New techniques for designing speed independent control logic	SWCT	1964	DBLP DOI BibTeX RDF
12	Kenneth E. Batcher	Speed-Independent Nor Realizations		1964	RDF
12	Robert E. Swartwout	Further Studies in Speed-Independent Logic for a Control		1963	RDF
12	Robert E. Swartwout	One method for designing speed independent logic for a control	SWCT	1961	DBLP DOI BibTeX RDF
12	Raymond E. Miller	An introduction to speed independent circuit theory	SWCT	1961	DBLP DOI BibTeX RDF
12	D. B. Gillies	A flow chart notation for the description of a speed-independent control	SWCT	1961	DBLP DOI BibTeX RDF