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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 270 occurrences of 127 keywords
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Results
Found 161 publication records. Showing 161 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
13 | François Arnault, Thierry P. Berger, Cédric Lauradoux, Marine Minier |
X-FCSR - A New Software Oriented Stream Cipher Based Upon FCSRs. |
INDOCRYPT |
2007 |
DBLP DOI BibTeX RDF |
cryptanalysis, stream cipher, software design, FCSRs |
13 | Martin Straka, Jiri Tobola, Zdenek Kotásek |
Checker Design for On-line Testing of Xilinx FPGA Communication Protocols. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Subir K. Roy, Rubin A. Parekhji |
Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Suresh Kumar Devanathan, Michael L. Bushnell |
Test Pattern Generation Using Modulation by Haar Wavelets and Correlation for Sequential BIST. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Hong-Sik Kim, Sungho Kang 0001 |
Increasing encoding efficiency of LFSR reseeding-based test compression. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Hani Rizk, Christos A. Papachristou, Francis G. Wolff |
A Self Test Program Design Technique for Embedded DSP Cores. |
J. Electron. Test. |
2006 |
DBLP DOI BibTeX RDF |
self test programs, pseudorandom BIST, LSFR, DSP, ATPG |
13 | Xuexian Hu, Yongtao Ming, Wenfen Liu, Shiqu Li |
On the Rate of Coincidence of Two Clock-Controlled Combiners. |
Inscrypt |
2006 |
DBLP DOI BibTeX RDF |
Rate of Coincidence, Probabilistic Model, Combiner, Clock-Controlled |
13 | Matthias Krause 0001, Dirk Stegemann |
Reducing the Space Complexity of BDD-Based Attacks on Keystream Generators. |
FSE |
2006 |
DBLP DOI BibTeX RDF |
Bluetooth E0, GSM A5/1, cryptanalysis, Stream cipher, BDD, self-shrinking generator |
13 | Jing-Shiun Lin, Chung-Kung Lee, Ming-Der Shieh, Jun-Hong Chen |
High-speed CRC design for 10 Gbps applications. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Avijit Dutta, Nur A. Touba |
Synthesis of Efficient Linear Test Pattern Generators. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Dhiraj K. Pradhan, Chunsheng Liu |
EBIST: a novel test generator with built-in fault detection capability. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Frederik Armknecht, Gwénolé Ars |
Introducing a New Variant of Fast Algebraic Attacks and Minimizing Their Successive Data Complexity. |
Mycrypt |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Peter Filter, Hana Kubátová |
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST. |
DSD |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Antoine Joux, Frédéric Muller |
Two Attacks Against the HBB Stream Cipher. |
FSE |
2005 |
DBLP DOI BibTeX RDF |
|
13 | C. V. Krishna, Abhijit Jas, Nur A. Touba |
Achieving high encoding efficiency with partial dynamic LFSR reseeding. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
linear finite shift register, compression, Built-in self-test, reseeding |
13 | Hani Rizk, Christos A. Papachristou, Francis G. Wolff |
Designing Self Test Programs for Embedded DSP Cores. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Frederik Armknecht, Stefan Lucks |
Linearity of the AES Key Schedule. |
AES Conference |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Nicolas T. Courtois |
Algebraic Attacks on Combiners with Memory and Several Outputs. |
ICISC |
2004 |
DBLP DOI BibTeX RDF |
|
13 | P. Karpodinis, Dimitri Kagaris, Dimitris Nikolos |
Accumulator based Test-per-Scan BIST. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Slobodan Petrovic, Amparo Fúster-Sabater |
Clock Control Sequence Reconstruction in the Ciphertext Only Attack Scenario. |
ICICS |
2004 |
DBLP DOI BibTeX RDF |
Irregular clocking, Cryptanalysis, Edit distance, Correlation attack, Directed search |
13 | Krishna Sekar, Sujit Dey |
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects. |
J. Electron. Test. |
2003 |
DBLP DOI BibTeX RDF |
LI-BIST, crosstalk test, BIST, SoC test, low-power test |
13 | Grzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski |
2D Test Sequence Generators. |
IEEE Des. Test Comput. |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Maciej Bellos, Dimitri Kagaris, Dimitris Nikolos |
Low Power Test Set Embedding Based on Phase Shifters. |
ISVLSI |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakrabarty |
EBIST: A Novel Test Generator with Built-In Fault Detection Capability. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Sarbani Palit, Bimal K. Roy, Arindom De |
A Fast Correlation Attack for LFSR-Based Stream Ciphers. |
ACNS |
2003 |
DBLP DOI BibTeX RDF |
LFSR polynomial, Correlation immune function, Stream cipher, Correlation attack |
13 | Nicolas T. Courtois, Willi Meier |
Algebraic Attacks on Stream Ciphers with Linear Feedback. |
EUROCRYPT |
2003 |
DBLP DOI BibTeX RDF |
Algebraic attacks on stream ciphers, factoring multivariate polynomials, overdefined problems, ciphertext-only attacks, Toyocrypt, Cryptrec, LILI-128, Boolean functions, nonlinear filtering, pseudo-random generators, Nessie, XL algorithm, multivariate equations |
13 | Frederik Armknecht, Matthias Krause 0001 |
Algebraic Attacks on Combiners with Memory. |
CRYPTO |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos |
On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST. |
J. Electron. Test. |
2002 |
DBLP DOI BibTeX RDF |
test-per-clock schemes, accumulator-based test pattern generators, built-in self-test, linear feedback shift registers, reseeding |
13 | Wei-Lun Wang, Kuen-Jong Lee |
An Efficient Deterministic Test Pattern Generator for Scan-Based BIST Environment. |
J. Electron. Test. |
2002 |
DBLP DOI BibTeX RDF |
mixed-mode pattern generation, built-in self-test, power consumption, test application time, scan chain |
13 | Subhamoy Maitra, Kishan Chand Gupta, Ayineedi Venkateswarlu |
Multiples of Primitive Polynomials and Their Products over GF(2). |
Selected Areas in Cryptography |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Matthias Krause 0001 |
BDD-Based Cryptanalysis of Keystream Generators. |
EUROCRYPT |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Se Ah Choi, Kyeongcheol Yang |
Balanced Shrinking Generators. |
ICISC |
2002 |
DBLP DOI BibTeX RDF |
Period, Linear Complexity, Balancedness, Statistical Properties, Shrinking Generator, Self-Shrinking Generator |
13 | Krishna Sekar, Sujit Dey |
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Palash Sarkar 0001 |
The Filter-Combiner Model for Memoryless Synchronous Stream Ciphers. |
CRYPTO |
2002 |
DBLP DOI BibTeX RDF |
synchronous stream ciphers, nonlinear filter model, nonlinear combiner model, filter-combiner model, cellular automata, linear feedback shift registers |
13 | Ayineedi Venkateswarlu, Subhamoy Maitra |
Further Results on Multiples of Primitive Polynomials and Their Products over GF(2). |
ICICS |
2002 |
DBLP DOI BibTeX RDF |
Nonlinear Combiner Model, Primitive Polynomials & Their Products, Cryptanalysis, Stream Cipher, Galois Field, Polynomial Multiples |
13 | Sybille Hellebrand, Huaguo Liang, Hans-Joachim Wunderlich |
A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. |
J. Electron. Test. |
2001 |
DBLP DOI BibTeX RDF |
store and generate schemes, BIST, deterministic BIST |
13 | Kishan Chand Gupta, Subhamoy Maitra |
Primitive Polynomials over GF(2) - A Cryptologic Approach. |
ICICS |
2001 |
DBLP DOI BibTeX RDF |
Cyclotomic Cosets, Stream Cipher, Galois field, Primitive Polynomials |
13 | Wei-Lun Wang, Kuen-Jong Lee |
Accelerated test pattern generators for mixed-mode BIST environments. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
accelerated test pattern generators, mixed-mode BIST, pseudorandom patterns, deterministic patterns, scan-based built-in self-test, multiple sub-chains, multiple sequence generator, fault diagnosis, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, fault coverage, linear feedback shift registers, cost, test pattern generator, shift registers, test application time, scan chain, mixed analogue-digital integrated circuits, clock cycle, integrated circuit economics |
13 | Ming-Der Shieh, Hsin-Fu Lo, Ming-Hwa Sheu |
High-speed generation of LFSR signatures. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
high-speed generation, LFSR signatures, compaction simulation, single-input signature register, equivalent multiple-input implementation, finite field theory, high-speed signature computations, lookahead technique, internal-XOR LFSR, external-XOR LFSR, performance evaluation, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, BIST, linear feedback shift register, binary sequences, subsequences |
13 | Anne Canteaut, Michaël Trabbia |
Improved Fast Correlation Attacks Using Parity-Check Equations of Weight 4 and 5. |
EUROCRYPT |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Dimitrios Kagaris, Spyros Tragoudas |
Pseudoexhaustive TPG with a Provably Low Number of LFSR Seeds. |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Eric Filiol |
Decimation Attack of Stream Ciphers. |
INDOCRYPT |
2000 |
DBLP DOI BibTeX RDF |
sequence decimation, multiple clocking, Stream cipher, linear feedback shift register, correlation attack, fast correlation attack |
13 | Abhijit Jas, Bahram Pouya, Nur A. Touba |
Virtual Scan Chains: A Means for Reducing Scan Length in Cores. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
Compression/Decompression, Virtual Scan, Built-In Self-Test, Mapping, Design-for-Testability, LFSR, System Integrator, Integrated Circuits, Integrated Circuits, Scan Chains, Embedded Cores, Digital Testing, Reseeding |
13 | Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis |
An Accumulator-Based BIST Approach for Two-Pattern Testing. |
J. Electron. Test. |
1999 |
DBLP DOI BibTeX RDF |
stuck-open fault testing, built-in self test, delay fault testing, two-pattern testing |
13 | Tomasz Garbolino, Andrzej Hlawiczka |
A New LFSR with D and T Flip-Flops as an Effective Test Pattern Generator for VLSI Circuits. |
EDCC |
1999 |
DBLP DOI BibTeX RDF |
|
13 | Jan Otterstedt, Dirk Niggemeyer, T. W. Williams |
Detection of CMOS address decoder open faults with March and pseudo random memory tests. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
13 | Rodrigue Byrne |
Determining Aliasing Probabilities in BIST by Counting Strings. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
response analysis architectures, compression techniques, aliasing probabilities, deterministic finite automata |
13 | Jovan Dj. Golic |
Cryptanalysis of Alleged A5 Stream Cipher. |
EUROCRYPT |
1997 |
DBLP DOI BibTeX RDF |
|
13 | Dimitrios Kagaris, Spyros Tragoudas |
A multiseed counter TPG with performance guarantee. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
built-in test pattern generators, multiseed counter test pattern generator, low hardware overhead, fast CAD tool, ISCAS'85 benchmarks, hardware/time overhead, built-in self test, performance guarantee, test set generation |
13 | Shujian Zhang, Rod Byrne, Jon C. Muzio, D. Michael Miller |
Quantitative analysis for linear hybrid cellular automata and LFSR as built-in self-test generators for sequential faults. |
J. Electron. Test. |
1995 |
DBLP DOI BibTeX RDF |
linear hybrid cellular automata, sequential fault, transition capability, built-in self-test, linear feedback shift register, linear finite state machine |
13 | Chen-Yang Pan, Kwang-Ting Cheng |
Pseudo-random testing and signature analysis for mixed-signal circuits. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
Signature Analysis, Random Process, Pseudo-Random Testing, Impulse Response |
13 | Mitrajit Chatterjee, Dhiraj K. Pradhan |
A novel pattern generator for near-perfect fault-coverage. |
VTS |
1995 |
DBLP DOI BibTeX RDF |
near-perfect fault-coverage, onchip BIST, GLFSR, logic mapping technique, weighted pattern technique, logic testing, built-in self test, integrated circuit testing, design methodology, combinational circuits, automatic testing, integrated logic circuits, shift registers, combinational logic, digital integrated circuits, pattern generator, single stuck-at fault |
13 | Dimitrios Kagaris, Fillia Makedon, Spyros Tragoudas |
A method for pseudo-exhaustive test pattern generation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1994 |
DBLP DOI BibTeX RDF |
|
13 | Don Coppersmith, Hugo Krawczyk, Yishay Mansour |
The Shrinking Generator. |
CRYPTO |
1993 |
DBLP DOI BibTeX RDF |
|
13 | Slawomir Pilarski, Kevin James Wiebe |
Counter-based compaction: An analysis for BIST. |
J. Electron. Test. |
1992 |
DBLP DOI BibTeX RDF |
compaction by counter, edge counting, one's counting, transition counting, built-in self-test, linear feedback shift register, signature analysis, Aliasing probability, test response compaction |
13 | Paul H. Bardell |
Discrete logarithms a parallel pseudorandom pattern generator analysis method. |
J. Electron. Test. |
1992 |
DBLP DOI BibTeX RDF |
phaseshift, pseudorandom pattern generator, Cellular automata, LFSR, discrete logarithms |
13 | Kewal K. Saluja, Chin-Foo See |
An Efficient Signature Computation Method. |
IEEE Des. Test Comput. |
1992 |
DBLP DOI BibTeX RDF |
|
13 | Paul H. Bardell |
Design considerations for Parallel pseudoRandom Pattern Generators. |
J. Electron. Test. |
1990 |
DBLP DOI BibTeX RDF |
|
13 | Peizhong Lu, Song Guowen |
Feasible Calculation of the Generator for Combined LFSR Sequences. |
AAECC |
1990 |
DBLP DOI BibTeX RDF |
|
13 | Laung-Terng Wang, Edward J. McCluskey |
Circuits for pseudoexhaustive test pattern generation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1988 |
DBLP DOI BibTeX RDF |
|
13 | S. B. Tan, K. Totton, Keith Baker, Prab Varma, R. Porter |
A Fast Signature Simulation Tool for Built-In Self-Testing Circuits. |
DAC |
1987 |
DBLP DOI BibTeX RDF |
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