Search results for "interconnects"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
34	Cemal Basaran, Minghui Lin, Shidong Li	Computational simulation of electromigration induced damage in copper interconnects.	SCSC	2007	DBLP BibTeX RDF	copper interconnects, damage mechanics, electronics packaging reliability, thin film, electromigration
34	Charbel J. Akl, Magdy A. Bayoumi	Transition Skew Coding: A Power and Area Efficient Encoding Technique for Global On-Chip Interconnects.	ASP-DAC	2007	DBLP DOI BibTeX RDF	transition skew coding, global on-chip interconnects, bus encoding technique, encoding latencies, decoding latencies, 90 nm
34	K. S. Sainarayanan, Chittarsu Raghunandan, M. B. Srinivas	Bus encoding schemes for minimizing delay in VLSI interconnects.	SBCCI	2007	DBLP DOI BibTeX RDF	bus encoding technique, crosstalk class, delay, encoder, decoder, VLSI interconnects
34	Zhenghao Zhang, Yuanyuan Yang 0001	Optimal Scheduling in Buffered WDM Interconnects with Limited Range Wavelength Conversion Capability.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	packet scheduling, optical interconnects, Wavelength-division-multiplexing (WDM), wavelength conversion, optical packet switching, limited range wavelength conversion, packet loss probability, optical buffering, optical switching networks
34	Zhenghao Zhang, Yuanyuan Yang 0001	WDM Optical Interconnects with Recirculating Buffering and Limited Range Wavelength Conversion.	IEEE Trans. Parallel Distributed Syst.	2006	DBLP DOI BibTeX RDF	recirculating buffers, scheduling, parallel algorithms, matching, bipartite graphs, optical interconnects, Wavelength-division-multiplexing (WDM), concentrators, optical packet switching, limited range wavelength conversion
34	Roshan Weerasekera, Dinesh Pamunuwa, Li-Rong Zheng 0001, Hannu Tenhunen	Minimal-power, delay-balanced smart repeaters for interconnects in the nanometer regime.	SLIP	2006	DBLP DOI BibTeX RDF	delay-balanced, minimal-power, interconnects, repeaters
34	Zhenghao Zhang, Yuanyuan Yang 0001	Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF	scheduling, bipartite graphs, optical interconnects, Wavelength-division-multiplexing (WDM), matroid, wavelength conversion, bipartite matching, limited range wavelength conversion
34	Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis	Accurate capture of timing parameters in inductively-coupled on-chip interconnects.	SBCCI	2004	DBLP DOI BibTeX RDF	signal delay, crosstalk, on-chip interconnects, interconnect models, inductive coupling
34	Hui Zhang 0014, Yuanyuan Yang	Cost-Effective Unique-Path WDM Optical Interconnects.	IPDPS	2004	DBLP DOI BibTeX RDF	unique-path networks, permutation, multistage interconnection networks (MINs), optical interconnects, Wavelength-division-multiplexing (WDM)
34	Bipin Rajendran, Pawan Kapur, Krishna Saraswat, R. Fabian W. Pease	Self-consistent power/performance/reliability analysis for copper interconnects.	SLIP	2004	DBLP DOI BibTeX RDF	Joule heating, copper interconnects, rent's rule, electromigration, duty cycle, current density
34	Liang Zhang 0038, Wentai Liu, Rizwan Bashirullah, John M. Wilson 0002, Paul D. Franzon	Simplified delay design guidelines for on-chip global interconnects.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	effective attenuation constant, first incident switching, lossy transmission line, delay, global interconnects, RLC
34	Zhenghao Zhang, Yuanyuan Yang	Distributed QoS-Aware Scheduling Algorithm for WDM Optical Interconnects with Arbitrary Wavelength Conversion Capability.	ICPP	2004	DBLP DOI BibTeX RDF	weighted bipartite graphs, scheduling, matching, optical interconnects, Wavelength-division-multiplexing (WDM), wavelength conversion, limited range wavelength conversion
34	Yuichi Tanji, Hideki Asai	Closed-form expressions of distributed RLC interconnects for analysis of on-chip inductance effects.	DAC	2004	DBLP DOI BibTeX RDF	RLC distributed interconnects, inductance effects
34	Xiaoning Qi, Goetz Leonhardt, Daniel Flees, Xiaodong Yang, Sangwoo Kim, Stephan Mueller, Hendrik T. Mau, Lawrence T. Pileggi	A fast simulation approach for inductive effects of VLSI interconnects.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	inductance, circuit simulation, VLSI interconnects
34	Raguraman Venkatesan, Jeffrey A. Davis, James D. Meindl	A physical model for the transient response of capacitively loaded distributed rlc interconnects.	DAC	2002	DBLP DOI BibTeX RDF	distributed rlc lines, overshoot, interconnects, crosstalk, time delay, repeaters, transient response
34	Jeegar Tilak Shah, Madhav P. Desai, Sugata Sanyal	Inductance Characterization of Small Interconnects Using Test-Signal Method.	VLSI Design	2000	DBLP DOI BibTeX RDF	Test-Signal Injection Method, Differential Circuit, Short Interconnects, Self and Mutual-Inductance, High Frequency Test Signal, Displacement Current, Lumped Package Models, Inductance, Characterization, Transmission Lines, Capacitance, Substrate
34	Vikram Pasham, Wilfrido Alejandro Moreno, Fernando J. Falquez	Field Programmable Multi Chip Modules Using Programmable Laser Interconnects.	IEEE International Workshop on Rapid System Prototyping	1999	DBLP DOI BibTeX RDF	Multi-FPGAs, Laser Vertical Links, LPIC, MCM, Programmable interconnects
34	Anirudh Devgan	Efficient coupled noise estimation for on-chip interconnects.	ICCAD	1997	DBLP DOI BibTeX RDF	coupled noise estimation, dynamic logic circuit families, noise criticality pruning, physical design based noise avoidance, circuit simulation, on-chip interconnects, Elmore delay, noise analysis, timing simulation, integrated circuit noise, deep submicron design
34	Chauchin Su, Shyh-Shen Hwang, Shyh-Jye Jou, Yuan-Tzu Ting	Syndrome Simulation And Syndrome Test For Unscanned Interconnects.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	unscanned interconnects, syndrome test methodology, event driven syndrome simulation, boundary scan environment, faulty syndromes, fault-free syndromes, tolerable error rate, partially scanned PCB, board level testing, test pattern generation, boundary scan testing, test length, MCM, set covering problem, simulation algorithm, weighted random patterns, test cost reduction
34	Wei Hong II, Weikai Sun, Zhenhai Zhu, Hao Ji, Ben Song, Wayne Wei-Ming Dai	A novel dimension reduction technique for the capacitance extraction of 3D VLSI interconnects.	ICCAD	1996	DBLP DOI BibTeX RDF	3D VLSI interconnects, DRT, Dimension Reduction Technique, FastCap, SPICELINK, dielectric layers, parallel signal lines, VLSI, capacitance extraction
34	Tong Liu 0007, Fabrizio Lombardi, José Salinas	Diagnosis of interconnects and FPICs using a structured walking-1 approach.	VTS	1995	DBLP DOI BibTeX RDF	field programmable interconnect chips, structured walking-1 approach, boundary scan architectures, one-step test generation, two-step test generation, fault diagnosis, integrated circuit testing, diagnosis, automatic testing, boundary scan testing, interconnects testing, integrated circuit interconnections
33	Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha	In-Network Snoop Ordering (INSO): Snoopy coherence on unordered interconnects.	HPCA	2009	DBLP DOI BibTeX RDF
33	Saroj K. Nayak	Carbon nanotube, graphene and atomic wires as next generation interconnects: current status and future promise.	SLIP	2009	DBLP DOI BibTeX RDF	quantum simulation, performance, design, reliability
33	Rohit Singhal, Gwan Choi, Rabi N. Mahapatra	Data Handling Limits of On-Chip Interconnects.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
33	Matthew J. Koop, Rahul Kumar, Dhabaleswar K. Panda 0001	Can software reliability outperform hardware reliability on high performance interconnects?: a case study with MPI over infiniband.	ICS	2008	DBLP DOI BibTeX RDF	reliability, MPI, infiniband
33	Krishna Saraswat, Hoyeol Cho, Pawan Kapur, Kyung-Hoae Koo	Performance comparison between copper, carbon nanotube, and optical interconnects.	ISCAS	2008	DBLP DOI BibTeX RDF
33	Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta	Optimal Positions of Twists in Global On-Chip Differential Interconnects.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
33	Jae Young Hur, Stephan Wong, Stamatis Vassiliadis	Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs.	ARC	2007	DBLP DOI BibTeX RDF
33	Byungsub Kim, Vladimir Stojanovic	Equalized interconnects for on-chip networks: modeling and optimization framework.	ICCAD	2007	DBLP DOI BibTeX RDF
33	Tudor Murgan, Oliver Mitea, Sujan Pandey, Petru Bogdan Bacinschi, Manfred Glesner	Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
33	Weikuan Yu, Ranjit Noronha, Shuang Liang, Dhabaleswar K. Panda 0001	Benefits of high speed interconnects to cluster file systems: a case study with Lustre.	IPDPS	2006	DBLP DOI BibTeX RDF
33	Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra	Information theoretic approach to address delay and reliability in long on-chip interconnects.	ICCAD	2006	DBLP DOI BibTeX RDF
33	Keith A. Bowman, James W. Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De	Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance.	ISLPED	2006	DBLP DOI BibTeX RDF	intra-die variations, multi-cycle interconnect, parameter fluctuations, time borrowing, interconnect, parameter variations, within-die variations, variation tolerant
33	H. J. Kadim, Lacina M. Coulibaly	Wave propagation based analytical model for distributed on-chip RLC interconnects.	ISCAS	2006	DBLP DOI BibTeX RDF
33	Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Emre Tuncer	SACI: statistical static timing analysis of coupled interconnects.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	coupled interconnect, sources of variation, crosstalk noise, statistical timing analysis
33	Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra	Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk.	ISQED	2006	DBLP DOI BibTeX RDF
33	Amir H. Ajami, Kaustav Banerjee, Massoud Pedram	Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnects.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
33	Mingcui Zhou, Wentai Liu, Mohanasankar Sivaprakasam	A closed-form delay formula for on-chip RLC interconnects in current-mode signaling.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
33	Vishak Venkatraman, Wayne P. Burleson	Impact of Process Variations on Multi-Level Signaling for On-Chip Interconnects.	VLSI Design	2005	DBLP DOI BibTeX RDF
33	Wichian Sirisaengtaksin, Sandeep K. Gupta 0001	Modeling and Testing Crosstalk Faults in Inter-Core Interconnects that Include Tri-State and Bi-Directional Nets.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
33	Krishna Sekar, Sujit Dey	LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	LI-BIST, crosstalk test, BIST, SoC test, low-power test
33	Ferran Martorell, Diego Mateo, Xavier Aragonès	Modeling and Evaluation of Substrate Noise Induced by Interconnects.	DATE	2003	DBLP DOI BibTeX RDF
33	Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani	Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity.	ICCD	2003	DBLP DOI BibTeX RDF
33	Dimitri Kagaris, Spyros Tragoudas	InTeRail: Using Existing and Extra Interconnects to Test Core-Based SOCs.	IOLTS	2003	DBLP DOI BibTeX RDF
33	Youngsoo Shin, Takayasu Sakurai	Power distribution analysis of VLSI interconnects using model orderreduction.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
33	Mohammad H. Tehranipour, Mehrdad Nourani	Signal Integrity Loss in SoC's Interconnects: A Diagnosis Approach Using Embedded Microprocessor.	ITC	2002	DBLP DOI BibTeX RDF	Embedded Microprocessor, Integrity Loss, System-on-Chip, Diagnosis, Test Pattern Generation, Signal Integrity, Interconnect Testing, Noise Detection
33	Qinwei Xu, Pinaki Mazumder	Efficient Macromodeling for On-Chip Interconnects.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
33	James W. Joyner, Raguraman Venkatesan, Payman Zarkesh-Ha, Jeffrey A. Davis, James D. Meindl	Impact of three-dimensional architectures on interconnects in gigascale integration.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
33	Angelo Brambilla, Paolo Maffezzoni	Statistical method for the analysis of interconnects delay insubmicrometer layouts.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
33	Xiaoliang Bai, Sujit Dey, Janusz Rajski	Self-test methodology for at-speed test of crosstalk in chip interconnects.	DAC	2000	DBLP DOI BibTeX RDF
33	Ninglong Lu, Ibrahim N. Hajj	An Exact Analytical Time-Domain Model Of Distributed RC Interconnects for High Speed Nonlinear Circuit Applications.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
32	Arijit Raychowdhury, Kaushik Roy 0001	Modeling of metallic carbon-nanotube interconnects for circuit simulations and a comparison with Cu interconnects for scaled technologies.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
32	Arijit Raychowdhury, Kaushik Roy 0001	A circuit model for carbon nanotube interconnects: comparative study with Cu interconnects for scaled technologies.	ICCAD	2004	DBLP DOI BibTeX RDF
30	Debendra Das Sharma	PCI Express® 6.0 Specification at 64.0 GT/s with PAM-4 signaling: a low latency, high bandwidth, high reliability and cost-effective interconnect.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Venkata Krishnan, Olivier Serres, Michael Blocksome	COnfigurable Network Protocol Accelerator (COPA) † : An Integrated Networking/Accelerator Hardware/Software Framework.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Roi Ben Haim, Ori Rottenstreich	Reliable and Time-efficient Virtualized Function Placement.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Kevin Drucker, Dharmesh Jani, Ishwar Agarwal, Gary Miller, Millind Mittal, Robert Wang 0005, Bapiraju Vinnakota	The Open Domain-Specific Architecture.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Saeed Rashidi, Pallavi Shurpali, Srinivas Sridharan 0002, Naader Hassani, Dheevatsa Mudigere, Krishnakumar Nair, Misha Smelyanski, Tushar Krishna	Scalable Distributed Training of Recommendation Models: An ASTRA-SIM + NS3 case-study with TCP/IP transport.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Kenji Tanaka, Yuki Arikawa, Tsuyoshi Ito, Kazutaka Morita, Naru Nemoto, Fumiaki Miura, Kazuhiko Terada, Junji Teramoto, Takeshi Sakamoto	Communication-Efficient Distributed Deep Learning with GPU-FPGA Heterogeneous Computing.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Ori Rottenstreich, Jose Yallouz, Lion Levi	Isolated Trees in Multi-Tenant Fat Tree Datacenters for In-Network Computing.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Shahab Ardalan, Halil Cirit, Ramin Farjad-Rad, Mark Kuemerle, Ken Poulton, Suresh Subramanian, Bapiraju Vinnakota	Bunch of Wires: An Open Die-to-Die Interface.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Yifan Li, Chengjun Jia, Xiaohe Hu, Jun Li 0003	Kano: Efficient Container Network Policy Verification.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30	Cristina Olmedilla, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Alfaro-Cortés, Francisco J. Quiles 0001, José L. Sánchez 0002, Wenhao Sun, Xiang Yu, Yonghui Xu, José Duato	Optimizing Packet Dropping by Efficient Congesting-Flow Isolation in Lossy Data-Center Networks.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
30		2019 IEEE Symposium on High-Performance Interconnects, HOTI 2019, Santa Clara, CA, USA, August 14-16, 2019	Hot Interconnects	2019	DBLP BibTeX RDF
30	Joshua Lant, Javier Navaridas, Andrew Attwood, Mikel Luján, John Goodacre	Enabling Standalone FPGA Computing.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Sandeep Goyal, Pranav Agarwal, Shalabh Gupta	Demonstration of a Single-Lane 80 Gbps PAM-4 Full-Duplex Serial Link.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Jens Domke, Satoshi Matsuoka, Ivan Radanov, Yuki Tsushima, Tomoya Yuki, Akihiro Nomura 0002, Shin'ichi Miura, Nic McDonald, Dennis Lee Floyd, Nicolas Dubé	The First Supercomputer with HyperX Topology: A Viable Alternative to Fat-Trees?	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Sourav Chakraborty 0003, Shulei Xu, Hari Subramoni, Dhabaleswar K. Panda 0001	Designing Scalable and High-Performance MPI Libraries on Amazon Elastic Fabric Adapter.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Stephen Van Doren	Compute Express Link, Stephen Van Doren (Intel).	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	German Maglione Mathey, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco José Quiles Flor, José Duato	Path2SL: Optimizing Head-of-Line Blocking Reduction in InfiniBand-Based Fat-Tree Networks.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Aravind Gopalakrishnan, Matias A. Cabral, James P. Erwin, Ravindra Babu Ganapathi	Improved MPI Multi-Threaded Performance using OFI Scalable Endpoints.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Greg Taylor, Ramin Farjadrad, Bapiraju Vinnakota	High Capacity On-Package Physical Link Considerations.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Ian Swarbrick, Dinesh Gaitonde, Sagheer Ahmad, Bala Jayadev, Jeff Cuppett, Abbas Morshed, Brian Gaide, Ygal Arbel	Versal Network-on-Chip (NoC).	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Sourav Roy, Arvind Kaushik, Rajkumar Agrawal, Joseph Gergen, Wim Rouwet, John Arends	Latency Critical Operation in Network Processors.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Ramin Farjadrad, Bapiraju Vinnakota	A Bunch of Wires (BoW) Interface for Inter-Chiplet Communication.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	John Gliksberg, Antoine Capra, Alexandre Louvet, Pedro Javier García, Devan Sohier	High-Quality Fault-Resiliency in Fat-Tree Networks (Extended Abstract).	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Marjan Radi, Wesley W. Terpstra, Paul Loewenstein, Dejan Vucinic	OmniXtend: Direct to Caches Over Commodity Fabric.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30	Philip Taffet, John M. Mellor-Crummey	Lightweight, Packet-Centric Monitoring of Network Traffic and Congestion Implemented in P4.	Hot Interconnects	2019	DBLP DOI BibTeX RDF
30		25th IEEE Annual Symposium on High-Performance Interconnects, HOTI 2017, Santa Clara, CA, USA, August 28-30, 2017	Hot Interconnects	2017	DBLP BibTeX RDF
30	Peyman Faizian, Md Atiqul Mollah, Md. Shafayat Rahman, Xin Yuan 0001, Scott Pakin, Mike Lang 0003	Throughput Models of Interconnection Networks: The Good, the Bad, and the Ugly.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Zhenhua Li 0002, Yuanyuan Yang 0001	Placement of Virtual Network Functions in Hybrid Data Center Networks.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Joshua Lawrence Benjamin, Adam C. Funnell, Philip Michael Watts, Benn Thomsen	A High Speed Hardware Scheduler for 1000-Port Optical Packet Switches to Enable Scalable Data Centers.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Timo Schneider, James Dinan, Mario Flajslik, Keith D. Underwood, Torsten Hoefler	Fast Networks and Slow Memories: A Mechanism for Mitigating Bandwidth Mismatches.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Pedro Yébenes, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles 0001, Torsten Hoefler	Improving Non-minimal and Adaptive Routing Algorithms in Slim Fly Networks.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Ravindra Babu Ganapathi, Aravind Gopalakrishnan, Russell W. McGuire	MPI Process and Network Device Affinitization for Optimal HPC Application Performance.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Xiaoyi Lu, Haiyang Shi, M. Haseeb Javed, Rajarshi Biswas, Dhabaleswar K. Panda 0001	Characterizing Deep Learning over Big Data (DLoBD) Stacks on RDMA-Capable Networks.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Sebastian Werner 0002, Javier Navaridas, Mikel Luján	Subchannel Scheduling for Shared Optical On-chip Buses.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Asaf Samuel, Eitan Zahavi, Isaac Keslassy	Routing Keys.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Roy Chua	Panel - Ethernet vs. HPC: Can the hyperscale ethernet data center handle all workloads?	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Jörn Schumacher	Utilizing HPC Network Technologies in High Energy Physics Experiments.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Mohammad Shahanshah Akhter, Paul Somogyi, Chen Sun 0003, Mark T. Wade, Roy Meade, Pavan Bhargava, Sen Lin, Nandish Mehta	WaveLight: A Monolithic Low Latency Silicon-Photonics Communication Platform for the Next-Generation Disaggregated Cloud Data Centers.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Jose Rocher-Gonzalez, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles 0001	On the Impact of Routing Algorithms in the Effectiveness of Queuing Schemes in High-Performance Interconnection Networks.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Vignesh T. Ravi, James Erwin, Pradeep Sivakumar, C. Q. Tang, Jianxin Xiong, Ravindra Babu Ganapathi, Mark Debbage	Host Software Stack Optimizations to Maximize Aggregate Fabric Throughput.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	François Abel, Jagath Weerasinghe, Christoph Hagleitner, Beat Weiss, Stephan Paredes	An FPGA Platform for Hyperscalers.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30	Patrick MacArthur	Userspace RDMA Verbs on Commodity Hardware Using DPDK.	Hot Interconnects	2017	DBLP DOI BibTeX RDF
30		24th IEEE Annual Symposium on High-Performance Interconnects, HOTI 2016, Santa Clara, CA, USA, August 24-26, 2016	Hot Interconnects	2016	DBLP BibTeX RDF
30	Timo Schneider, Otto Bibartiu, Torsten Hoefler	Ensuring Deadlock-Freedom in Low-Diameter InfiniBand Networks.	Hot Interconnects	2016	DBLP DOI BibTeX RDF
30	Roberto Gioiosa, Thomas Warfel, Jian Yin 0002, Antonino Tumeo, David J. Haglin	Exploring Data Vortex Network Architectures.	Hot Interconnects	2016	DBLP DOI BibTeX RDF
30	Md. Ashif I. Sikder, Avinash Kodi, William Rayess, Dominic DiTomaso, David W. Matolak, Savas Kaya	Exploring Wireless Technology for Off-Chip Memory Access.	Hot Interconnects	2016	DBLP DOI BibTeX RDF
30	Peyman Faizian, Md. Shafayat Rahman, Md Atiqul Mollah, Xin Yuan 0001, Scott Pakin, Mike Lang 0003	Traffic Pattern-Based Adaptive Routing for Intra-Group Communication in Dragonfly Networks.	Hot Interconnects	2016	DBLP DOI BibTeX RDF