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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 290 occurrences of 196 keywords
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Results
Found 482 publication records. Showing 470 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Joseph M. Palmer, Brent E. Nelson |
A Parallel FFT Architecture for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 948-953, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Norbert Pramstaller, Johannes Wolkerstorfer |
A Universal and Efficient AES Co-processor for Field Programmable Logic Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 565-574, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Alireza Hodjat, Ingrid Verbauwhede |
A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings, pp. 308-309, 2004, IEEE Computer Society, 0-7695-2230-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Michael Attig, Sarang Dharmapurikar, John W. Lockwood |
Implementation Results of Bloom Filters for String Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings, pp. 322-323, 2004, IEEE Computer Society, 0-7695-2230-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Rajeshwar S. Sable, Ravindra P. Saraf, Rubin A. Parekhji, Arun N. Chandorkar |
Built-in Self-test Technique for Selective Detection of Neighbourhood Pattern Sensitive Faults in Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 753-756, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Built-in self-test for memories, neighbourhood pattern sensitive faults, programmable BIST |
12 | Sung-Hsien Sun, Shie-Jue Lee |
A JPEG Chip for Image Compression and Decompression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 35(1), pp. 43-60, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
image compression/decompression, standard cell design, FPGA, VHDL, CAD tools, VLSI chip |
12 | Ivo Schanstra, Ad J. van de Goor |
Consequences of RAM Bitline Twisting for Test Coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11176-11177, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Alessandro Pirola |
A Solution for Hardware Emulation of Non Volatile Memory Macrocells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 20262-20267, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid |
An FPGA-Based Image Connected Component Labeller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1012-1015, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Yosuke Miyajima, Tsutomu Maruyama |
A Real-Time Stereo Vision System with FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 448-457, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Sang-Chul Moon, In-Cheol Park |
Area-efficient memory-based architecture for FFT processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 101-104, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Arturo M. Amendola, Roberto Di Maio, M. L. Iacobuzio, Fabio Poli, Fernando Scalabrini |
Lessons Learned in Designing and Evaluating Railway Control Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WORDS Fall ![In: 9th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS Fall 2003), 1-3 October 2003, Anacapri (Capri Island), Italy, pp. 355-, 2003, IEEE Computer Society, 0-7695-2054-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Xiaoling Sun, Bruce F. Cockburn, Duncan G. Elliott |
An Efficient Functional Test for the Massively-Parallel C ?RAM Logic-Enhanced Memory Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 475-, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | T. S. Rajesh Kumar, R. Govindarajan, C. P. Ravikumar |
Optimal Code and Data Layout in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 573-578, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Pawel Chodowiec, Kris Gaj |
Very Compact FPGA Implementation of the AES Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2003, 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings, pp. 319-333, 2003, Springer, 3-540-40833-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu |
Fault simulation and test algorithm generation for random accessmemories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(4), pp. 480-490, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Premkumar T. Devanbu, Stuart G. Stubblebine |
Stack and Queue Integrity on Hostile Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 28(1), pp. 100-108, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
correctness of memories, oblivious ram, security, data structures, software protection |
12 | Kiyoo Itoh 0001 |
Trends in Ultralow-Voltage RAM Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002, pp. 300-313, 2002, Springer, 3-540-44143-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Toshinori Sato, Itsujiro Arita |
Simplifying Instruction Issue Logic in Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 341-346, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Valery A. Vardanian, Yervant Zorian |
A March-Based Fault Location Algorithm for Static Random Access Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France, pp. 62-67, 2002, IEEE Computer Society, 0-7695-1617-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Manfred Ley, Herbert Grünbacher |
TTA-C2, A Single Chip Communication Controller for the Time-Triggered-Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 450-453, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Valery A. Vardanian, Yervant Zorian |
A March-Based Fault Location Algorithm for Static Random Access Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 8-10 July 2002, Isle of Bendor, France, pp. 256-261, 2002, IEEE Computer Society, 0-7695-1641-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Atsumu Iseno, Yukihiro Iguchi |
A Method for Storing Fail Bit Maps in Burn-in Memory Testers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 142-148, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Eisaku Ohbuchi, Hiroshi Unno 0004 |
A Real-Time Configurable Shader Based on Lookup Tables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CW ![In: 1st International Symposium on Cyber Worlds (CW 2002), 6-8 November 2002, Tokyo, Japan, pp. 507-514, 2002, IEEE Computer Society, 0-7695-1862-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik |
Optimal organizations for pipelined hierarchical memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: Proceedings of the Fourteenth Annual ACM Symposium on Parallel Algorithms and Architectures, SPAA 2002, Winnipeg, Manitoba, Canada, August 11-13, 2002, pp. 109-116, 2002, ACM, 1-58113-529-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hierarchical memory processor, scalable pipeline |
12 | Caroline Benveniste, Peter A. Franaszek, John T. Robinson |
Cache-Memory Interfaces in Compressed Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(11), pp. 1106-1116, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
memory compression, performance analysis, trace-driven simulation, cache design, Memory system design |
12 | Gianfranco Bilardi, Enoch Peserico |
A Characterization of Temporal Locality and Its Portability across Memory Hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 28th International Colloquium, ICALP 2001, Crete, Greece, July 8-12, 2001, Proceedings, pp. 128-139, 2001, Springer, 3-540-42287-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Davide Appello, Fulvio Corno, M. Giovinetto, Maurizio Rebaudengo, Matteo Sonza Reorda |
A P1500 Compliant BIST-Based Approach to Embedded RAM Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 97-102, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | G. Kallos, A. Voudouri, I. Pytharoulis, O. Kakaliagou |
Modelling Framework for Atmospheric Mercury over the Mediterranean Region: Model Development and Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LSSC ![In: Large-Scale Scientific Computing, Third International Conference, LSSC 2001, Sozopol, Bulgaria, June 6-10, 2001, Revised Papers, pp. 281-290, 2001, Springer, 3-540-43043-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings |
Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, 11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings, pp. 483-492, 2001, Springer, 3-540-42499-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | S. K. Tewksbury |
Challenges Facing Practical DFT for MEMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 24-26 October 2001, San Francisco, CA, USA, Proceedings, pp. 11-17, 2001, IEEE Computer Society, 0-7695-1203-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Microelectromechanical systems, microsystems technologies, fault tolerance, defect tolerance |
12 | Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik |
Computational power of pipelined memory hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: Proceedings of the Thirteenth Annual ACM Symposium on Parallel Algorithms and Architectures, SPAA 2001, Heraklion, Crete Island, Greece, July 4-6, 2001, pp. 144-152, 2001, ACM, 1-58113-409-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Yoshiki Yamaguchi, Akira Miyashita, Tsutomu Maruyama, Tsutomu Hoshino |
A Co-processor System with a Virtex FPGA for Evolutionary Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 240-249, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Sanjive Agarwala, Charles Fuoco, Tim Anderson, Dave Comisky, Christopher Mobley |
A Multi-Level Memory System Architecture for High-Performance DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 408-413, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu |
Simulation-Based Test Algorithm Generation for Random Access Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada, pp. 291-296, 2000, IEEE Computer Society, 0-7695-0613-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
RAM fault simulation, March test algorithm, Cocktail-March test algorithms, semiconductor memories, RAM testing |
12 | Mohammad Gh. Mohammad, Kewal K. Saluja, Alex S. Yap |
Testing Flash Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 406-411, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
FG transistor, Testing, Flash memories, Disturbances |
12 | Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich |
Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-3, Third European Dependable Computing Conference, Prague, Czech Republic, September 15-17, 1999, Proceedings, pp. 339-350, 1999, Springer, 3-540-66483-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Spencer M. Gold, Richard B. Brown, Bruce Bernhardt |
A Quantitative Approach to Nonlinear Process Design Rule Scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 99-113, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | José Carlos Alves, José Silva Matos |
RVC - A Reconfigurable Coprocessor for Vector Processing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 15-17 April 1998, Napa Valley, CA, USA, pp. 258-259, 1998, IEEE Computer Society, 0-8186-8900-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | Premkumar T. Devanbu, Stuart G. Stubblebine |
Stack and Queue Integrity on Hostile Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
S&P ![In: Security and Privacy - 1998 IEEE Symposium on Security and Privacy, Oakland, CA, USA, May 3-6, 1998, Proceedings, pp. 198-206, 1998, IEEE Computer Society, 0-8186-8386-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | Jim Gray 0001, Goetz Graefe |
The Five-Minute Rule Ten Years Later, and Other Computer Storage Rules of Thumb. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Rec. ![In: SIGMOD Rec. 26(4), pp. 63-68, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
12 | Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamoto, Tomoo Inoue, Hideo Fujiwara |
Testing for the programming circuit of LUT-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 242-247, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
programming circuit, control circuit, configuration memory cell array, FPGA, fault model, SRAM, shift registers, shift registers, look-up table |
12 | Dima Grigoriev, Anatol Slissenko |
Computing Minimum-Link Path in a Homotopy Class amidst Semi-Algebraic Obstacles in the Plane. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAECC ![In: Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, 12th International Symposium, AAECC-12, Toulouse, France, June 23-27, 1997, Proceedings, pp. 114-129, 1997, Springer, 3-540-63163-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
12 | René J. Glaise, J. Munier |
A Low Cost Searching Device for an ATM Adapter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1997), September 22-25, 1997 Las Vegas, NV, USA, pp. 488-493, 1997, IEEE Computer Society, 0-8186-8186-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
12 | Michael Nicolaidis, Vladimir Castro Alves, Hakim Bederr |
Testing complex couplings in multiport memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(1), pp. 59-71, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
12 | Mirjam Schönfeld, Jens Franzen, Markus Schwiegershausen, Peter Pirsch, Uwe Vehlies, Andreas Münzner |
The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 11(1-2), pp. 51-74, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
12 | Masayuki Abe, Hikaru Morita |
Higher Radix Nonrestoring Modular Multiplication Algorithm and Public-key LSI Architecture with Limited Hardware Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIACRYPT ![In: Advances in Cryptology - ASIACRYPT '94, 4th International Conference on the Theory and Applications of Cryptology, Wollongong, Australia, November 28 - December 1, 1994, Proceedings, pp. 365-375, 1994, Springer, 3-540-59339-X. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
12 | Sundarar Mohan, Pinaki Mazumder |
Analytical and simulation studies of failure modes in SRAMs using high electron mobility transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(12), pp. 1885-1896, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Robert Cypher, C. Bernard Shung |
Generalized trace-back techniques for survivor memory management in the Viterbi algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 5(1), pp. 85-94, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
trace-back, survivor memory, VLSI area requirements, Viterbi algorithm |
12 | Christian von Reventlow, Maati Talmi, Stefan Wolf, M. Ernst, K. Müller, C. Stoffers |
System considerations and the system level design of a chip set for real-time TV and HDTV motion estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 5(2-3), pp. 237-248, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Warren H. Debany Jr., Kevin A. Kwiat, Sami A. Al-Arian |
A Method for Consistent Fault Coverage Reporting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 10(3), pp. 68-79, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Samir Naik, Frank Agricola, Wojciech Maly |
Failure Analysis of High-Density CMOS SRAMs: Using Realistic Defect Modeling and I/Sub DDQ/ Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 10(2), pp. 13-23, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Jos van Sas, Francky Catthoor, Hugo De Man |
Test Algorithms for Double-Buffered Random Access and Pointer-Addressed Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 10(2), pp. 34-44, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Vishwani D. Agrawal, Charles R. Kime, Kewal K. Saluja |
A Tutorial on Built-In Self-Test, Part 2: Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 10(2), pp. 69-77, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Shiva Chaudhuri, Torben Hagerup, Rajeev Raman |
Approximate and Exact Deterministic Parallel Selection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 1993, 18th International Symposium, MFCS'93, Gdansk, Poland, August 30 - September 3, 1993, Proceedings, pp. 352-361, 1993, Springer, 3-540-57182-5. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
12 | Nader H. Bshouty |
Lower Bounds for the Complexity of Functions in a Realistic RAM Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISTCS ![In: Theory of Computing and Systems, ISTCS'92, Israel Symposium, Haifa, Israel, May 1992, pp. 12-23, 1992, Springer, 3-540-55553-6. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
12 | Jochen Kölzer, Johann Otto |
Electrical Characterization of Megabit DRAMs, Part 2: Internal Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 8(4), pp. 39-51, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
12 | Georg Antonin, Hans-Dieter Oberle, Jochen Kölzer |
Electrical Characterization of Megabit DRAMs, Part 1: External Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 8(3), pp. 36-43, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
12 | Wei-Kang Huang, Yinan N. Shen, Fabrizio Lombardi |
New approaches for the repairs of memories with redundancy by row/column deletion for yield enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(3), pp. 323-328, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
12 | Ronald F. Ayres |
Completely automatic completion of VLSI designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(2), pp. 194-202, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
12 | Ashok K. Goel 0002, Apurva Kalia |
Simulation of ram-based asynchronous sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 23rd Annual Simulation Symposium (ANSS-23 1990), Nashville, Tennessee, USA, 1990, pp. 123-126, 1990, IEEE Computer Society, 0-8186-2067-6. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
12 | Marek Karpinski, Friedhelm Meyer auf der Heide |
On the Complexity of Genuinely Polynomial Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 1990, MFCS'90, Banská Bystrica, Czechoslovakia, August 27-31, 1990, Proceedings, pp. 362-368, 1990, Springer, 3-540-52953-5. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
12 | Andreas Geyer-Schulz, Johann Mitlöhner, Alfred Taudes |
An APL-Simulator of Non-Von Neumann Computer Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APL ![In: Conference Proceedings on APL 90: For the Future, APL 1990, Copenhagen, Denmark, August 13-17, 1990., pp. 140-148, 1990, ACM, 0-89791-371-X. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
APL |
12 | Etienne Grandjean, J. M. Robson |
RAM with Compact Memory: A Realistic and Robust Model of Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSL ![In: Computer Science Logic, 4th Workshop, CSL '90, Heidelberg, Germany, October 1-5, 1990, Proceedings, pp. 195-233, 1990, Springer, 3-540-54487-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
12 | Larry Carter, Leendert M. Huisman, Tom W. Williams |
TRIM: testability range by ignoring the memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(1), pp. 38-49, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
12 | Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs |
Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28 - July 1, 1987., pp. 689-694, 1987, IEEE Computer Society Press / ACM. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
12 | W. Stephen Adolph, Hassan K. Reghbati, Amar Sanmugasunderam |
A frame based system for representing knowledge about VLSI design: a proposal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986., pp. 671-676, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
computer assisted design, knowledge representation, VLSI design, silicon compilation |
12 | John H. Reif, J. D. Tygar |
Efficient Parallel Pseudo-Random Number Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CRYPTO ![In: Advances in Cryptology - CRYPTO '85, Santa Barbara, California, USA, August 18-22, 1985, Proceedings, pp. 433-446, 1985, Springer, 3-540-16463-4. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
12 | Cyrus Bamji, Charles E. Hauck, Jonathan Allen |
A design by example regular structure generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985., pp. 16-22, 1985, ACM, 0-8186-0635-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
12 | Douglas L. Finke |
Dynamic RAM architectures for graphics applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1983 National Computer Conference, 16-19 May 1983, Anaheim, California, USA, pp. 479-485, 1983, AFIPS Press, 0-88283-039-2. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
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