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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2846 occurrences of 1432 keywords
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Results
Found 14080 publication records. Showing 14080 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
23 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
performance modeling for analog circuits, posynomial response surface modeling, geometric programming |
23 | Mandeep Singh, Israel Koren |
Reliability Enhancement of Analog-to-Digital Converters (ADCs). |
DFT |
2001 |
DBLP DOI BibTeX RDF |
Fault sensitivity, Alpha particle, Fault tolerance, Reliability, Transient faults, Analog-to-Digital Converters |
23 | Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas |
Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
analog macrocell, mixed signal integrated circuit, OBT, mixed-signal macrocell, integrated circuit testing, mixed analogue-digital integrated circuits, oscillation-based test |
23 | M. A. El-Gamal, Mohamed Fathy Abu El-Yazeed |
A Combined Clustering and Neural Network Approach for Analog Multiple Hard Fault Classification. |
J. Electron. Test. |
1999 |
DBLP DOI BibTeX RDF |
multiple hard faults, fault clustering, learning vector quantization neural networks, feature selection, analog circuits, fault classification |
23 | Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg, Mani Soma |
Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems. |
Asian Test Symposium |
1999 |
DBLP DOI BibTeX RDF |
Efficient, ATPG, Digital, Analog, Mixed-Signal |
23 | Chauchin Su, Yue-Tsang Chen, Chung-Len Lee 0001 |
Analog Metrology and Stimulus Selection in a Noisy Environment. |
Asian Test Symposium |
1999 |
DBLP DOI BibTeX RDF |
Mixed Signal and Analog Test |
23 | Charles S. Wilson, Tonia G. Morris, Stephen P. DeWeerth |
A Two-Dimensional, Object-Based Analog VLSI Visual Attention System. |
ARVLSI |
1999 |
DBLP DOI BibTeX RDF |
attention, analog VLSI, neuromorphic, focal plane |
23 | Lars Hedrich, Erich Barke |
A Formal Approach to Verification of Linear Analog Circuits with Parameter Tolerances. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
electronic design automation circuit simulation, formal verification, analog circuits |
23 | Michel Renovell, Florence Azaïs, Yves Bertrand |
Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
VLSI, Test, Analog Circuit, Mixed Signal Circuit |
23 | Thorsten Adler, Juergen Schaeuble |
An Interactive Router for Analog IC Design. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
schematic driven layout, global router, maze router, 45 degrees, analog circuits, electronic design automation |
23 | Saeid Sadeghi-Emamchaie, Graham A. Jullien, Vassil S. Dimitrov, William C. Miller |
Digital Arithmetic Using Analog Arrays. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
Cellular Neural Networks, Double-Base Number System, Analog VLSI |
23 | Pramodchandran N. Variyam, Abhijit Chatterjee |
Specification-Driven Test Design for Analog Circuits. |
DFT |
1998 |
DBLP DOI BibTeX RDF |
Genetic algorithms, Test generation, Analog and mixed-signal test |
23 | Chauchin Su, Yi-Ren Cheng, Yue-Tsang Chen, Shing Tenchen |
Analog signal metrology for mixed signal ICs. |
Asian Test Symposium |
1997 |
DBLP DOI BibTeX RDF |
Analog signal metrology, multiple period low-rate sampled waveform, high-rate sampled waveform, DSP based testing, on-chip ADC, 20 MHz, mixed analogue-digital integrated circuits, Signal reconstruction, mixed signal IC |
23 | Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi |
Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling. |
VTS |
1997 |
DBLP DOI BibTeX RDF |
digital-compatible BIST scheme, pulse response sampling, low-cost BIST scheme, built-in self test scheme, rectangular pulses, digital linear feedback shift register, transient testing, synchronization circuitry, comparison circuitry, BIST hardware design, built-in self test, analog circuits |
23 | K. Ravi Shanker, Vinita Vasudevan |
Synthesis of Analog CMOS Circuits. |
VLSI Design |
1997 |
DBLP DOI BibTeX RDF |
synthesis, analog circuits |
23 | Tao Wei, Mike W. T. Wong, Yim-Shu Lee |
Efficient Multifrequency Analysis of Fault Diagnosis in Analog Circuits Based on Large Change Sensitivity Computation. |
Asian Test Symposium |
1996 |
DBLP DOI BibTeX RDF |
large change sensitivity, fault diagnosis, analog circuits |
23 | Chen-Yang Pan, Kwang-Ting Cheng |
Implicit functional testing for analog circuits. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
implicit functional testing, linear time-invariant circuits, impulse response samples, pseudo-random technique, production testing time, yield coverages, VLSI, integrated circuit testing, fault coverage, analog circuits, analogue integrated circuits, mixed analogue-digital integrated circuits, transient response |
23 | Michel Renovell, Florence Azaïs, Yves Bertrand |
The multi-configuration: A DFT technique for analog circuits. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
multi-configuration technique, diagnosis facilities, 8/sup th/ order band pass filter, integrated circuit testing, design for testability, integrated circuit design, analog circuits, analogue integrated circuits, band-pass filters, DFT technique |
23 | Diego Vázquez, José L. Huertas, Adoración Rueda |
Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
sw-op amp design, CMOS implementations, design efforts, cell design, integrated circuit testing, design for testability, DFT, integrated circuit design, power dissipation, operational amplifiers, area, analogue integrated circuits, IC testing, analog integrated circuits, CMOS analogue integrated circuits |
23 | F. Mohamed, M. Manzouki, Anton Biasizzo, Franc Novak |
Analog circuit simulation and troubleshooting with FLAMES. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
analog circuit simulation, model-based expert system, VLSI, fuzzy logic, fuzzy logic, integrated circuit testing, circuit analysis computing, analogue integrated circuits, troubleshooting, diagnostic expert systems, FLAMES |
23 | J. van Spaandonk, Tom A. M. Kevenaar |
Iterative test-point selection for analog circuits. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
iterative test-point selection, analog ICs, random measurement errors, VLSI, integrated circuit testing, iterative methods, functional testing, iterative algorithm, analogue integrated circuits, measurement errors, decomposition technique |
23 | S. K. Gupta, M. M. Hasan |
KANSYS: a CAD tool for analog circuit synthesis. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
KANSYS, analog circuit synthesis, knowledge intensive hierarchical design, transistor circuit designs, functional circuits, knowledge based systems, hierarchy, integrated circuit design, circuit CAD, CAD tool, analogue integrated circuits, design knowledge, process specifications |
23 | V. C. Prasad, N. Sarat Chandra Babu |
On minimal set of test nodes for fault dictionary of analog circuit fault diagnosis. |
J. Electron. Test. |
1995 |
DBLP DOI BibTeX RDF |
test nodes, analog circuits, fault dictionary |
23 | Giri Devarayanadurg, Mani Soma |
Dynamic test signal design for analog ICs. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
minmax, optimization, test, dynamic, analog, time-domain |
23 | Lars Hedrich, Erich Barke |
A formal approach to nonlinear analog circuit verification. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
analog nonlinear circuits, formal verification, functional verification, electronic design automation, behavioral description |
23 | S. R. Kadivar, Doris Schmitt-Landsiedel, Heinrich Klar |
A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
SD ADC, convertors, network scaling, nonlinear interactive optimization, performance criteria, sigma delta analog-to-digital converters, single loop, CAD, higher order, analogue-digital conversion, electronic engineering computing |
23 | Chauchin Su, Shenshung Chiang, Shyh-Jye Jou |
Impulse response fault model and fault extraction for functional level analog circuit diagnosis. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
Testing, Diagnosis, Analog Circuit |
23 | Tonia G. Morris, Denise M. Wilson, Stephen P. DeWeerth |
Analog VLSI circuits for manufacturing inspection. |
ARVLSI |
1995 |
DBLP DOI BibTeX RDF |
analog VLSI circuits, manufacturing inspection, programmable structuring elements, oriented edge detection, high speed preprocessors, serial/parallel processing, focal-plane processing, vertical bipolar phototransistors, digital CMOS process, adaptive image threshold, 2.0 micron, computer vision, VLSI, edge detection, mathematical morphology, machine vision, manufacture, morphological operations, selective attention, massively parallel architectures, CMOS analogue integrated circuits, automatic optical inspection, focal planes, analogue processing circuits |
23 | Michael Goedecke, Sorin A. Huss, Kai Morich |
Automatic Parallelization of the Visual Data-Flow Language Cantata for Efficient Characterization of Analog Circuit Behavior. |
VL |
1995 |
DBLP DOI BibTeX RDF |
engineering workstations, Cantata visual data-flow language, analog circuit behavior characterisation, application specific functions, execution time reduction, data-flow scheduler, usable workstations, usable workstation performance, program availability, fully automated process, simulation, computational complexity, load balancing, parallel programming, resource allocation, visual languages, digital simulation, processor scheduling, circuit analysis computing, workloads, automatic parallelization, parallel languages, distributed environment, workstations, analogue circuits, control operators |
23 | Ashok Balivada, Yatin Vasant Hoskote, Jacob A. Abraham |
Verification of transient response of linear analog circuits. |
VTS |
1995 |
DBLP DOI BibTeX RDF |
linear network analysis, circuit behavior, operational amplifier macro circuits, input waveforms, extracted state equations, Z-domain, digital representation, finite state machines, active networks, transfer functions, transfer function, transient analysis, operational amplifiers, frequency-domain analysis, formal techniques, state-space methods, analogue circuits, transient response, transient response, linear analog circuits, equivalent circuits |
23 | Khaled Saab 0001, Bozena Kaminska, Bernard Courtois, Marcelo Lubaszewski |
Frequency-based BIST for analog circuit testin. |
VTS |
1995 |
DBLP DOI BibTeX RDF |
waveform generators, frequency-based BIST, analog circuit testing, sine wave generator, sinusoidal input signals, variable frequency input stimulus, frequency input signal, T-BIST approach, frequency-counter BIST approach, VLSI, VLSI, built-in self test, integrated circuit testing, analogue integrated circuits |
23 | Janusz A. Starzyk, Hong Dai |
A decomposition approach for testing large analog networks. |
J. Electron. Test. |
1992 |
DBLP DOI BibTeX RDF |
circuit decomposition, large system identification, Analog testing, test programming |
23 | Subhajit Ray, Peter R. Kinget |
Ultra-Low-Power and Compact-Area Analog Audio Feature Extraction Based on Time-Mode Analog Filterbank Interpolation and Time-Mode Analog Rectification. |
IEEE J. Solid State Circuits |
2023 |
DBLP DOI BibTeX RDF |
|
23 | Subhajit Ray, Peter R. Kinget |
A 31-Feature, 80nW, 0.53mm2 Audio Analog Feature Extractor based on Time-Mode Analog Filterbank Interpolation and Time-Mode Analog Rectification. |
VLSI Technology and Circuits |
2022 |
DBLP DOI BibTeX RDF |
|
23 | Jin-O. Seo, Mingoo Seok, SeongHwan Cho |
ARCHON: A 332.7TOPS/W 5b Variation-Tolerant Analog CNN Processor Featuring Analog Neuronal Computation Unit and Analog Memory. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Rahul Bhattacharya, Santosh Biswas, Siddhartha Mukhopadhyay |
FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only). |
FPGA |
2010 |
DBLP DOI BibTeX RDF |
ams testing, concurrent test development, behavioral modeling |
22 | Nguyen Thien Hoang, Hoang Duong Tuan, Truong Q. Nguyen, Hung Gia Hoang |
Optimized Analog Filter Designs With Flat Responses by Semidefinite Programming. |
IEEE Trans. Signal Process. |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Laurent Gatet, Hélène Tap-Béteille, Francis Bony |
Comparison Between Analog and Digital Neural Network Implementations for Range-Finding Applications. |
IEEE Trans. Neural Networks |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Kyung-Joong Kim 0001, Sung-Bae Cho |
Combining Multiple Evolved Analog Circuits for Robust Evolvable Hardware. |
IDEAL |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Eddy Chiu, Paul Ho |
Transmit Beamforming with Analog Channel State Information Feedback. |
IEEE Trans. Wirel. Commun. |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Lihong Zhang, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, C.-J. Richard Shi |
Parasitic-Aware Optimization and Retargeting of Analog Layouts: A Symbolic-Template Approach. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Vinod M. Prabhakaran, Rohit Puri, Kannan Ramchandran |
Colored Gaussian Source-Channel Broadcast for Heterogeneous (Analog/Digital) Receivers. |
IEEE Trans. Inf. Theory |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto |
Advanced Analog Filters for Telecommunications. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann |
Sizing Rules for Bipolar Analog Circuit Design. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Sha Yao, Mikael Skoglund |
Dimension Compression Relaying for Slow Fading Channels Based on Hybrid Digital-Analog Source-Channel Coding. |
ICC |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Darius Grabowski, Markus Olbrich, Erich Barke |
Analog circuit simulation using range arithmetics. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Martin Strasser, Michael Eick, Helmut Gräb, Ulf Schlichtmann, Frank M. Johannes |
Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Mitra Mirhassani, Majid Ahmadi, Graham A. Jullien |
Robust analog neural network based on continuous valued number system. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Joachim Becker, Fabian Henrici, Stanis Trendelenburg, Maurits Ortmanns, Yiannos Manoli |
A hexagonal Field Programmable Analog Array consisting of 55 digitally tunable OTAs. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Silvia Soldà, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani |
Analog decoding of trellis coded modulation for multi-level flash memories. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Tomonori Shirotori, Yuko Osana |
Kohonen feature map associative memory with area representation for sequential analog patterns. |
IJCNN |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Claudio Mattiussi, Dario Floreano |
Analog Genetic Encoding for the Evolution of Circuits and Networks. |
IEEE Trans. Evol. Comput. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Xin Li 0001, Padmini Gopalakrishnan, Yang Xu 0017, Lawrence T. Pileggi |
Robust Analog/RF Circuit Design With Projection-Based Performance Modeling. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Fang Liu 0029, Sule Ozev |
Statistical Test Development for Analog Circuits Under High Process Variations. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk, Kai-Pui Lam |
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing. |
NOCS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Christer Svensson |
Analog Power Modelling. |
PATMOS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Zhe Wang, Xiaolin Zhang 0002, Lei Chen |
Analog Error-Control Coding Based on Dimension-Expanding Shannon Mapping for Robust Image Communication. |
ICME |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee |
A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | David W. Graham, Paul E. Hasler |
Run-Time Programming of Analog Circuits Using Floating-Gate Transistors. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Jeffrey Ayres, Michael L. Bushnell |
Analog Circuit Testing Using Auto Regressive Moving Average Models. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Anna Wang 0001, Junfang Liu, Hao Wang, Ran Tao |
A Novel Fault Diagnosis of Analog Circuit Algorithm Based on Incomplete Wavelet Packet Transform and Improved Balanced Binary-Tree SVMs. |
LSMS (1) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Mahmoud Taherzadeh, Amir K. Khandani |
Analog Coding for Delay-Limited Applications. |
CISS |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Osamu Nomura, Takashi Morie |
Projection-Field-Type VLSI Convolutional Neural Networks Using Merged/Mixed Analog-Digital Approach. |
ICONIP (1) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Catherine Wideman, Jacqueline Gallet |
Analog to Digital Workflow Improvement: A Quantitative Study. |
J. Digit. Imaging |
2006 |
DBLP DOI BibTeX RDF |
radiology management, time study, Workflow, efficiency |
22 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Concurrent detection of erroneous responses in linear analog circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Sheng-Jang Lin, I-Shun Chen, Bo-Wei Chen, Feng-Hsiang Lo |
The Design of Analog Front-End Circuitry for 1X HD-DVD PRML Read Channel. |
ISVLSI |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Joachim Becker, Yiannos Manoli |
Synthesis of Analog Filters on a Continuous-Time FPAA Using a Genetic Algorithm. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Ginés Doménech-Asensi, Juan Martínez-Alajarín, Ramón Ruiz Merino, José-Alejandro López Alcantud |
Synthesis on FPAA of a Smart Sthetoscope Analog Subsystem. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Erik Schüler, Luigi Carro |
Increasing analog programmability in SoCs. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Sorin A. Huss |
Analog circuit synthesis: a search for the Holy Grail? |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Thomas Jacob Koickal, Alister Hamilton, Tim C. Pearce, Su-Lim Tan, James Anthony Covington, Julian W. Gardner |
Analog VLSI design of an adaptive neuromorphic chip for olfactory systems. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Baoyong Chi, Jinke Yao, Shuguang Han, Xiang Xie, Guolin Li, Zhihua Wang 0001 |
A 2.4GHz low power wireless transceiver analog front-end for endoscopy capsule system. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Anthony S. Deese, Chika O. Nwankpa |
Emulation of power system load dynamic behavior through reconfigurable analog circuits. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Takafumi Yamaji, Tetsuro Itakura, Rui Ito, Takeshi Ueno, Hidenori Okuni |
Balanced 3-phase analog signal processing for radio communications. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Anthony Kopa, Alyssa B. Apsel |
Common-emitter feedback transimpedance amplifier for analog optical receivers. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Rasit Onur Topaloglu |
Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Tathagato Rai Dastidar, P. P. Chakrabarti 0001, Partha Ray |
A synthesis system for analog circuits based on evolutionary search and topological reuse. |
IEEE Trans. Evol. Comput. |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Viera Stopjaková, Pavol Malosek, Marek Matej, Vladislav Nagy, Martin Margala |
Defect detection in analog and mixed circuits by neural networks using wavelet analysis. |
IEEE Trans. Reliab. |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi |
Hierarchical approach to exact symbolic analysis of large analog circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy 0001 |
Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Supply Current. |
J. Electron. Test. |
2005 |
DBLP DOI BibTeX RDF |
Defect Oriented Testing (DOT), dynamic supply current (IDD), wavelet transform, Fourier transform |
22 | John Tuthill, Antonio Cantoni |
Efficient compensation for frequency-dependent errors in analog reconstruction filters used in IQ modulators. |
IEEE Trans. Commun. |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Guillermo Zatorre, Nicolás J. Medrano-Marqués, Santiago Celma, Bonifacio Martín-del-Brío, Antonio Bono-Nuez |
Smart Sensing with Adaptive Analog Circuits. |
IWANN |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Huiying Yang, Anuradha Agarwal, Ranga Vemuri |
Fast Analog Circuit Synthesis Using Multiparameter Sensitivity Analysis Based on Element-Coefficient Diagrams. |
ISVLSI |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Kaiping Zeng, Sorin A. Huss |
RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis. |
ISVLSI |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Fang Liu 0029, Jacob J. Flomenberg, Devaka V. Yasaratne, Sule Ozev |
Hierarchical Variance Analysis for Analog Circuits Based on Graph Modelling and Correlation Loop Tracing. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay |
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | A. William Stoffel |
An Agent Based Hybrid Analog-Digital Robotic Sensor Web Meta-system. |
WRAC |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Fang Liu 0029, Sule Ozev |
Fast Hierarchical Process Variability Analysis and Parametric Test Development for Analog/RF Circuits. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Dylan R. Muir, Giacomo Indiveri, Rodney J. Douglas |
Form specifies function: robust spike-based computation in analog VLSI without precise synaptic weights. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Mladen Panovic, Andreas Demosthenous |
Architectures for analog motion estimation processors: a comparison. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | David Haley, Chris Winstead, Vincent C. Gaudet, Alex J. Grant, Christian Schlegel |
An analog/digital mode-switching LDPC codec. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya |
Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Raoul F. Badaoui, Ranga Vemuri |
Analog VLSI circuit-level synthesis using multi-placement structures. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Mladen Panovic, Andreas Demosthenous |
A low power block-matching analog motion estimation processor. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Adão Antônio de Souza Jr., Luigi Carro, Jawad Tousaad |
Adaptive processing applied to the design of highly digital analog interfaces. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | A. L. Dalcastangê, Sidnei Noceti Filho |
On the analog generation of pink noise from white noise. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Shinya Okuda, Shigeo Kaneda, Hirohide Haga |
Human Position/Height Detection Using Analog Type Pyroelectric Sensors. |
EUC Workshops |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Yu Liu, Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita |
System level design language extensions for timed/untimed digital-analog combined system design. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
AMS extension, timed/untimed, synchronization, system level design, mixed-signal |
22 | Giuseppe Trautteur |
Beyond the Super-Turing Snare: Analog Computation and Digital Virtuality. |
CiE |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Reza Asgary, Karim Mohammadi |
Analog Fault Detection Using a Neuro Fuzzy Pattern Recognition Method. |
ICANN (2) |
2005 |
DBLP DOI BibTeX RDF |
|
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