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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 857 occurrences of 424 keywords
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Results
Found 792 publication records. Showing 792 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | Pat Conway, Bill Hughes |
The AMD Opteron™ CMP NorthBridge architecture: Now and in the future. |
Hot Chips Symposium |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Gregory Buehrer, Srinivasan Parthasarathy 0001, Yen-Kuang Chen |
Adaptive Parallel Graph Mining for CMP Architectures. |
ICDM |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Yingmin Li, Benjamin C. Lee, David M. Brooks, Zhigang Hu, Kevin Skadron |
CMP design space exploration subject to physical constraints. |
HPCA |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Matthew De Vuyst, Rakesh Kumar 0002, Dean M. Tullsen |
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
18 | James D. Balfour, William J. Dally |
Design tradeoffs for tiled CMP on-chip networks. |
ICS |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Mario Marino |
Evaluating the Interconnection Latency Costs on the Performance of a CMP with Multisliced L2. |
PDPTA |
2006 |
DBLP BibTeX RDF |
|
18 | Ihab Ismail, Khaled El-Ayat, Muhamed F. Mudawar |
A Locked Cache-based Synchronization Protocol for CMP. |
PDPTA |
2006 |
DBLP BibTeX RDF |
|
18 | Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Suleyman Sair, Timothy Sherwood |
Dynamically configurable shared CMP helper engines for improved performance. |
SIGARCH Comput. Archit. News |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Muthukkumar S. Kadavasal, Abhijit Chandra, Sutee Eamkajornsiri, Ashraf-F. Bastawros |
Yield improvement via minimisation of step height non-uniformity in chemical mechanical planarisation (CMP) with pressure and velocity as control variables. |
Int. J. Manuf. Technol. Manag. |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Carlisle Adams, Stephen Farrell, Tomi Kause, Tero Mononen |
Internet X.509 Public Key Infrastructure Certificate Management Protocol (CMP). |
RFC |
2005 |
DBLP DOI BibTeX RDF |
|
18 | John D. Davis, James Laudon, Kunle Olukotun |
Maximizing CMP Throughput with Mediocre Cores. |
IEEE PACT |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Feng Tyan |
Non-uniformity of wafer and pad in CMP: kinematic aspects of view. |
ACC |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Feng Tyan |
Pad conditioning density distribution in CMP process with diamond dresser. |
ACC |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Jaehyuk Huh 0001, Changkyu Kim, Hazim Shafi, Lixin Zhang 0002, Doug Burger, Stephen W. Keckler |
A NUCA substrate for flexible CMP cache sharing. |
ICS |
2005 |
DBLP DOI BibTeX RDF |
cache sharing, non-uniform cache architecture, chip-multiprocessor |
18 | Chun Liu 0001, Anand Sivasubramaniam, Mahmut T. Kandemir |
Organizing the Last Line of Defense before Hitting the Memory Wall for CMP. |
HPCA |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Dick de Roover, Abbas Emami-Naeini, Jon L. Ebert |
Model-based control for chemical-mechanical planarization (CMP). |
ACC |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Jingang Yi |
On the wafer/pad friction of linear chemical-mechanical planarization (CMP): modeling, analysis and experiments. |
ACC |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Z.-C. Lin, C.-Y. Liu |
Analysis and application of the adaptive neuro-fuzzy inference system in prediction of CMP machining parameters. |
Int. J. Comput. Appl. Technol. |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Ralf Gitzel, Axel Korthaus, Nima Mazloumi |
Handling Huge Data Sets in J2EE/EJB2.1 with a Page-by-Page Iterator Pattern Variant for CMP. |
Software Engineering Research and Practice |
2003 |
DBLP BibTeX RDF |
|
18 | James Bohn |
Sever Tipei: raw cuts Compact disc, 1998; available from Computer Music Project, University of Illinois Experimental Music Studios, 1114 West Nevada, Urbana, Illinois 61801, USA; electronic mail s-tipei@uiuc.edu; World Wide Web cmp-rs.music.uiuc.edu/people/tipei/index.html. |
Comput. Music. J. |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Kholdoun Torki, Bernard Courtois |
CMP: The Access to Advanced Low Costy Manufacturing. |
MSE |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Lance Hammond, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, Michael K. Chen, Kunle Olukotun |
The Stanford Hydra CMP. |
IEEE Micro |
2000 |
DBLP DOI BibTeX RDF |
|
18 | George Yong Liu, Ray F. Zhang, Kelvin Hsu, Lawrence Camilletti |
Chip-level CMP Modeling and Smart Dummy for HDP and Conformal CVD Films |
CoRR |
2000 |
DBLP BibTeX RDF |
|
18 | Kholdoun Torki, Bernard Courtois |
Advanced Low Cost Manufacturing From CMP Service. |
MSE |
1999 |
DBLP DOI BibTeX RDF |
|
18 | Kunle Olukotun, Lance Hammond, Mark Willey |
Improving the performance of speculatively parallel applications on the Hydra CMP. |
International Conference on Supercomputing |
1999 |
DBLP DOI BibTeX RDF |
feedback-driven optimization, performance evaluation, parallel programming, chip multiprocessor, multithreading, data speculation |
18 | Mark A. Fienup, Suresh C. Kothari |
CMP: A Memory-Constrained Scalability Metric. |
PPSC |
1995 |
DBLP BibTeX RDF |
|
17 | Hun Jung, Miao Ju, Hao Che |
A Theoretical Framework for Design Space Exploration of Manycore Processors. |
MASCOTS |
2011 |
DBLP DOI BibTeX RDF |
CMP, multicore, design space exploration, queuing network, manycore |
17 | Zhimin Gu, Yinxia Fu, Ninghan Zheng, Jianxun Zhang, Min Cai, Yan Huang 0011, Jie Tang 0003 |
Improving Performance of the Irregular Data Intensive Application with Small Computation Workload for CMPs. |
ICPP Workshops |
2011 |
DBLP DOI BibTeX RDF |
CMP, Helper thread, Irregular computing |
17 | Dawid Zydek, Grzegorz Chmaj, Henry Selvaraj |
Extended Analysis of Resource Assignment in Modern Chip Multiprocessors. |
ICSEng |
2011 |
DBLP DOI BibTeX RDF |
Load Balance, Network-on-chip, CMP, Energy, Processor Allocator |
17 | M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt |
Accelerating Critical Section Execution with Asymmetric Multicore Architectures. |
IEEE Micro |
2010 |
DBLP DOI BibTeX RDF |
heterogeneous cores, parallel programming, CMP, multicore, locks, critical sections, serialization |
17 | Juan Fang, Hongbo Zhang |
Analysis and Improvement of Dynamic Multi-core Hardware Prefetch Technology Based on Pre-execution. |
FCST |
2010 |
DBLP DOI BibTeX RDF |
multi-core prefetch, pre-execution based prefetching, coherency of cache, CMP, multicore architecture |
17 | Dawid Zydek, Henry Selvaraj, Laxmi P. Gewali |
Synthesis of Processor Allocator for Torus-Based Chip MultiProcessors. |
ITNG |
2010 |
DBLP DOI BibTeX RDF |
FPGA, CMP, mesh, NoC, torus, hardware implementation, processor allocator |
17 | Andreas Merkel, Jan Stoess, Frank Bellosa |
Resource-conscious scheduling for energy efficiency on multicore processors. |
EuroSys |
2010 |
DBLP DOI BibTeX RDF |
activity vectors, task characterization, virtualization, CMP, migration, resources, frequency scaling, energy-aware scheduling |
17 | M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt |
Data marshaling for multi-core architectures. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
staged execution, pipelining, cmp, critical sections |
17 | Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Yi He 0001, Meikang Qiu, Edwin Hsing-Mean Sha |
Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
data recomputation, CMP, flash memory, data migration, phase change memory, SPM, non-volatile memory |
17 | Xiang Zhang, Ahmed Louri |
A multilayer nanophotonic interconnection network for on-chip many-core communications. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
interconnection networks, CMP, 3D, silicon photonics |
17 | Oscar Mateo Lozano, Kazuhiro Otsuka |
Real-time Visual Tracker by Stream Processing. |
J. Signal Process. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Real-time systems, CMP, Particle filtering, GPGPU, Stream processing, Video tracking |
17 | Vladimir Cakarevic, Petar Radojkovic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero |
Characterizing the resource-sharing levels in the UltraSPARC T2 processor. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
Sun Nigara T2, CMP, job scheduling, simultaneous multithreading, performance characterization, CMT |
17 | Guanjun Jiang, Degui Feng, Liangliang Tong, Lingxiang Xiang, Chao Wang 0058, Tianzhou Chen |
L1 Collective Cache: Managing Shared Data for Chip Multiprocessors. |
APPT |
2009 |
DBLP DOI BibTeX RDF |
CMP, cache design, L1 cache |
17 | Susmit Biswas, Diana Franklin, Timothy Sherwood, Frederic T. Chong |
Conflict-Avoidance in Multicore Caching for Data-Similar Executions. |
ISPAN |
2009 |
DBLP DOI BibTeX RDF |
Data Similar Execution, CMP, Cache Design |
17 | Susmit Biswas, Diana Franklin, Alan Savage, Ryan Dixon, Timothy Sherwood, Frederic T. Chong |
Multi-execution: multicore caching for data-similar executions. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
data similar execution, multicore cache design, cmp |
17 | Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, Håkan Zeffer, Marc Tremblay |
Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
checkpoint-based architecture, hardware speculation, sst, chip multiprocessor, cmp, instruction-level parallelism, processor architecture, memory-level parallelism |
17 | Nikos Hardavellas, Michael Ferdman, Babak Falsafi, Anastasia Ailamaki |
Reactive NUCA: near-optimal block placement and replication in distributed caches. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
block migration, block placement, block replication, cache indexing, cache lookup, non-uniform cache access, nuca, r-nuca, reactive nuca, rotational interleaving, cache, replication, chip multiprocessor, cmp, placement, multicore, multi-core, migration, cache coherence, data replication, coherence, interleaving, data migration, data placement, shared cache, cache management, lookup, last-level cache, private cache |
17 | Mahmut T. Kandemir, Ozcan Ozturk 0001, Sai Prashanth Muralidhara |
Dynamic thread and data mapping for NoC based CMPs. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
mapping, dynamic, CMP, thread, NoC, data |
17 | Noel Eisley, Li-Shiuan Peh, Li Shang |
Leveraging on-chip networks for data cache migration in chip multiprocessors. |
PACT |
2008 |
DBLP DOI BibTeX RDF |
network-driven computing, interconnection network, CMP, chip-multiprocessor, migration |
17 | Jessica Young, Srihari Makineni, Ravishankar R. Iyer 0001, Donald Newell, Adrian Moga |
To Snoop or Not to Snoop: Evaluation of Fine-Grain and Coarse-Grain Snoop Filtering Techniques. |
Euro-Par |
2008 |
DBLP DOI BibTeX RDF |
cache regions, snoop filtering, coarse-grain tracking, fine-grain tracking, CMP |
17 | Mahmut T. Kandemir, Ozcan Ozturk 0001 |
Software-directed combined cpu/link voltage scaling fornoc-based cmps. |
SIGMETRICS |
2008 |
DBLP DOI BibTeX RDF |
compiler, CMP, NoC, voltage scaling, cpu, communication link |
17 | Gregory Buehrer, Srinivasan Parthasarathy 0001, Matthew Goyder |
Data mining on the cell broadband engine. |
ICS |
2008 |
DBLP DOI BibTeX RDF |
cell bdea, mutlicore, CMP |
17 | Simon W. Moore, Daniel Greenfield |
The next resource war: computation vs. communication. |
SLIP |
2008 |
DBLP DOI BibTeX RDF |
fractal structure, temporal interconnect, tera-scale, networks-on-chip, CMP, communication complexity, Rent's rule |
17 | David Tarjan, Michael Boyer, Kevin Skadron |
Federation: repurposing scalar cores for out-of-order instruction issue. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
CMP, multicore, federation, out-of-order |
17 | Juan C. Rey, N. S. Nagaraj, Andrew B. Kahng, Fabian Klass, Rob Aitken, Cliff Hou, Luigi Capodieci, Vivek Singh |
DFM in practice: hit or hype? |
DAC |
2008 |
DBLP DOI BibTeX RDF |
critical area analysis, CMP, yield, DFM, OPC, lithography |
17 | Hua Xiang 0001, Liang Deng, Ruchir Puri, Kai-Yuan Chao, Martin D. F. Wong |
Dummy fill density analysis with coupling constraints. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
CMP, coupling, dummy fills |
17 | Josef Weidendorfer, Michael Ott 0001, Tobias Klug, Carsten Trinitis |
Latencies of Conflicting Writes on Contemporary Multicore Architectures. |
PaCT |
2007 |
DBLP DOI BibTeX RDF |
Cache, CMP, Multicore, False Sharing |
17 | Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Timothy Sherwood, Suleyman Sair |
Improving the performance and power efficiency of shared helpers in CMPs. |
CASES |
2006 |
DBLP DOI BibTeX RDF |
constructive sharing, factored core, flexible sharing, helper configuration, helper engine, sharing policy, CMP, phase |
17 | Jianfeng Luo, Subarna Sinha, Qing Su, Jamil Kawa, Charles C. Chiang |
An IC manufacturing yield model considering intra-die variations. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
random variation, systematic variation, CMP, spatial correlation, manufacturing yield |
17 | Shailender Chaudhry, Paul Caprioli, Sherman Yip, Marc Tremblay |
High-Performance Throughput Computing. |
IEEE Micro |
2005 |
DBLP DOI BibTeX RDF |
hardware scout, CMP, multithreading, multicore, microprocessor, CMT |
17 | Rakesh Kumar 0002, Dean M. Tullsen, Norman P. Jouppi, Parthasarathy Ranganathan |
Heterogeneous Chip Multiprocessors. |
Computer |
2005 |
DBLP DOI BibTeX RDF |
Multicore microprocessors, Multiprocessors, Chip multiprocessors, CMP, Heterogeneity, System architectures, Power-aware computing |
17 | Thomas Y. Yeh, Glenn Reinman |
Fast and fair: data-stream quality of service. |
CASES |
2005 |
DBLP DOI BibTeX RDF |
NUCA, non-uniform access, per thread degradation, cluster, adaptive, cache, distributed, data-stream, partition, embedded, CMP, chip multiprocessor, migration, bandwidth, QOS, phase, memory wall, PDAS |
17 | Carmelo Acosta, Ayose Falcón, Alex Ramírez, Mateo Valero |
A Complexity-Effective Simultaneous Multithreading Architecture. |
ICPP |
2005 |
DBLP DOI BibTeX RDF |
Complexity-Effective, Heterogeneity-Awareness, Mapping Policies, Clustering, CMP, SMT |
17 | Fernando Latorre, José González 0002, Antonio González 0001 |
Back-end assignment schemes for clustered multithreaded processors. |
ICS |
2004 |
DBLP DOI BibTeX RDF |
clustered, CMP, multithreaded, steering |
17 | Satoshi Matsushita |
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
deign experience, CMP, chip multiprocessor, functional verification, speculative multithreading |
17 | Mitsuhisa Sato |
OpenMP: Parallel Programming API for Shared Memory Multiprocessors and On-Chip Multiprocessors. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
deign experience, CMP, chip multiprocessor, functional verification, speculative multithreading |
17 | Magnus Ekman, Per Stenström, Fredrik Dahlgren |
TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors. |
ISLPED |
2002 |
DBLP DOI BibTeX RDF |
virtual caches, low-power, CMP, snoop |
17 | Norio Kuji, Takako Ishihara |
EB-Testing-Pad Method and Its Evaluation by Actual Devices. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
E-beam tester, stacked vias, testing pads, multi level wiring, CMp, SIMOX/CMOS technology, observability |
16 | Yunlian Jiang, Kai Tian, Xipeng Shen, Jinghe Zhang, Jie Chen 0010, Rahul Tripathi |
The Complexity of Optimal Job Co-Scheduling on Chip Multiprocessors and Heuristics-Based Solutions. |
IEEE Trans. Parallel Distributed Syst. |
2011 |
DBLP DOI BibTeX RDF |
CMP scheduling, cache contention, integer programming, perfect matching, shared cache, Co-scheduling |
16 | Omer Khan, Sandip Kundu |
Hardware/Software Codesign Architecture for Online Testing in Chip Multiprocessors. |
IEEE Trans. Dependable Secur. Comput. |
2011 |
DBLP DOI BibTeX RDF |
hard error detection, isolation and tolerance, Chip Multiprocessor (CMP), hardware/software codesign |
16 | Taecheol Oh, Kiyeon Lee, Sangyeun Cho |
An Analytical Performance Model for Co-management of Last-Level Cache and Bandwidth Sharing. |
MASCOTS |
2011 |
DBLP DOI BibTeX RDF |
simulation, performance modeling, Chip multiprocessor (CMP), resource sharing |
16 | Omer Khan, Sandip Kundu |
Thread Relocation: A Runtime Architecture for Tolerating Hard Errors in Chip Multiprocessors. |
IEEE Trans. Computers |
2010 |
DBLP DOI BibTeX RDF |
hard-error tolerance, virtualization, Chip multiprocessor (CMP), hardware/software codesign, hypervisor |
16 | Alberto Ros 0001, Manuel E. Acacio, José M. García 0001 |
A Direct Coherence Protocol for Many-Core Chip Multiprocessors. |
IEEE Trans. Parallel Distributed Syst. |
2010 |
DBLP DOI BibTeX RDF |
Many-core CMP, direct coherence, indirection problem, on-chip network traffic, cache coherence protocol |
16 | Rong Ge 0002, Xizhou Feng, Shuaiwen Song, Hung-Ching Chang, Dong Li 0001, Kirk W. Cameron |
PowerPack: Energy Profiling and Analysis of High-Performance Systems and Applications. |
IEEE Trans. Parallel Distributed Syst. |
2010 |
DBLP DOI BibTeX RDF |
CMP-based cluster, system tools, Distributed system, energy efficiency, power management, dynamic voltage and frequency scaling, power measurement |
16 | Asit K. Mishra, Shekhar Srikantaiah, Mahmut T. Kandemir, Chita R. Das |
Coordinated power management of voltage islands in CMPs. |
SIGMETRICS |
2010 |
DBLP DOI BibTeX RDF |
chip multiprocessors (CMP), control theory, GALs, DVFs |
16 | Miquel Moretó, Francisco J. Cazorla, Rizos Sakellariou, Mateo Valero |
Load balancing using dynamic cache allocation. |
Conf. Computing Frontiers |
2010 |
DBLP DOI BibTeX RDF |
cmp architectures, load balancing, cache partitioning |
16 | Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John |
The virtual write queue: coordinating DRAM and last-level cache policies. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
cmp many-core, ddr ddr2 ddr3, dram-parameters, memory-scheduling writeback, page-mode, write-queue, write-scheduling, dram, cache-replacement, last-level-cache |
16 | Xi Zhang 0008, Dongsheng Wang 0002, Yibo Xue, Haixia Wang 0001, Jinglei Wang |
A Novel Cache Organization for Tiled Chip Multiprocessor. |
APPT |
2009 |
DBLP DOI BibTeX RDF |
Multi-level Directory, Chip Multiprocessor(CMP), Cache Organization, Tiled Architecture |
16 | Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem |
Dynamic cache clustering for chip multiprocessors. |
ICS |
2009 |
DBLP DOI BibTeX RDF |
non-uniform cache architecture (nuca), chip multiprocessor (cmp) |
16 | Kai Tian, Yunlian Jiang, Xipeng Shen |
A study on optimally co-scheduling jobs of different lengths on chip multiprocessors. |
Conf. Computing Frontiers |
2009 |
DBLP DOI BibTeX RDF |
cache contention, cmp scheduling, perfect matching, a*-search, co-scheduling |
16 | Yunlian Jiang, Xipeng Shen, Jie Chen 0010, Rahul Tripathi |
Analysis and approximation of optimal co-scheduling on chip multiprocessors. |
PACT |
2008 |
DBLP DOI BibTeX RDF |
CMP scheduling, cache contention, perfect matching, co-scheduling |
16 | Lars Arge, Michael T. Goodrich, Michael J. Nelson 0002, Nodari Sitchinava |
Fundamental parallel algorithms for private-cache chip multiprocessors. |
SPAA |
2008 |
DBLP DOI BibTeX RDF |
parallel external memory, pem, private-cache cmp |
16 | Håkan Zeffer, Zoran Radovic, Martin Karlsson, Erik Hagersten |
TMA: a trap-based memory architecture. |
ICS |
2006 |
DBLP DOI BibTeX RDF |
distributed shared memory (DSM), low complexity server design, node coherence checks, server design, simultaneous multi-threading (SMT), software coherence, trap-based memory architecture (TMA), chip multi processor (CMP) |
16 | Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Taylan Yemliha |
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors. |
ICPADS (1) |
2006 |
DBLP DOI BibTeX RDF |
SPM (Scratch-Pad Memory), dynamic loop scheduling, parallelization, compiler, CMP (chip multiprocessor), data locality |
16 | Lukasz Strozek, David M. Brooks |
Efficient architectures through application clustering and architectural heterogeneity. |
CASES |
2006 |
DBLP DOI BibTeX RDF |
efficient custom architectures, heterogeneous CMP |
16 | Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasarathy |
Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance. |
ASPLOS |
2006 |
DBLP DOI BibTeX RDF |
redundant multithreading, simultaneous multithreading (SMT), slipstream processor, chip multiprocessor (CMP), branch prediction, transient faults, value prediction, time redundancy |
16 | G. Edward Suh, Larry Rudolph, Srinivas Devadas |
Dynamic Partitioning of Shared Cache Memory. |
J. Supercomput. |
2004 |
DBLP DOI BibTeX RDF |
CMP and SMT, shared caches, cache partitioning |
9 | Chen Tian 0002, Min Feng 0001, Rajiv Gupta 0001 |
Speculative parallelization using state separation and multiple value prediction. |
ISMM |
2010 |
DBLP DOI BibTeX RDF |
multicore processors, speculative parallelization |
9 | Lixin Zhang 0002, Evan Speight, Ramakrishnan Rajamony, Jiang Lin |
Enigma: architectural and operating system support for reducing the impact of address translation. |
ICS |
2010 |
DBLP DOI BibTeX RDF |
|
9 | Hyunhee Kim, Jung Ho Ahn, Jihong Kim 0001 |
Replication-aware leakage management in chip multiprocessors with private L2 cache. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
leakage power management, chip multiprocessors, L2 caches |
9 | Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero |
Thread to strand binding of parallel network applications in massive multi-threaded systems. |
PPoPP |
2010 |
DBLP DOI BibTeX RDF |
ultrasparc t2, simultaneous multithreading, process scheduling, cmt |
9 | Aamer Jaleel, Kevin B. Theobald, Simon C. Steely Jr., Joel S. Emer |
High performance cache replacement using re-reference interval prediction (RRIP). |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
scan resistance, thrashing, shared cache, replacement |
9 | Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das |
Aérgia: exploiting packet latency slack in on-chip networks. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
multi-core, packet scheduling, memory systems, arbitration, prioritization, on-chip networks |
9 | Anastasia Ailamaki |
Database systems in the multicore era. |
SPAA |
2010 |
DBLP DOI BibTeX RDF |
deep memory hierarchies, multithreaded storage management, multicore systems |
9 | Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N. Patt |
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems. |
ASPLOS |
2010 |
DBLP DOI BibTeX RDF |
fairness, shared memory systems, system performance, multi-core systems |
9 | Evangelos Vlachos, Michelle L. Goodstein, Michael A. Kozuch, Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Todd C. Mowry |
ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications. |
ASPLOS |
2010 |
DBLP DOI BibTeX RDF |
hardware support for debugging, instruction-grain lifeguards, online parallel monitoring |
9 | Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis |
Micro-pages: increasing DRAM efficiency with locality-aware data placement. |
ASPLOS |
2010 |
DBLP DOI BibTeX RDF |
dram row-buffer management, data placement |
9 | Dimitris Tsirogiannis, Nick Koudas |
Suffix tree construction algorithms on modern hardware. |
EDBT |
2010 |
DBLP DOI BibTeX RDF |
multi-core, suffix tree |
9 | Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi |
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. |
ACM Trans. Reconfigurable Technol. Syst. |
2009 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
9 | Yudong Zhang 0001, Lenan Wu |
Segment-based coding of color images. |
Sci. China Ser. F Inf. Sci. |
2009 |
DBLP DOI BibTeX RDF |
color image coding, lifting scheme wavelet, structure coding, image segmentation, pulse-coupled neural networks |
9 | Sudipto Das, Shyam Antony, Divyakant Agrawal, Amr El Abbadi |
CoTS: A Scalable Framework for Parallelizing Frequency Counting over Data Streams. |
ICDE |
2009 |
DBLP DOI BibTeX RDF |
|
9 | Mark Horowitz |
Why design must change: rethinking digital design. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
|
9 | Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N. Patt |
Improving memory bank-level parallelism in the presence of prefetching. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
|
9 | Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das |
Application-aware prioritization mechanisms for on-chip networks. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
multi-core, packet scheduling, memory systems, arbitration, prioritization, on-chip networks |
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