Search results for "SBCCI"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski	Evaluating the effectiveness of a mixed-signal TMR scheme based on design diversity.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Deepak Kumar, Pankaj Kumar, Manisha Pattanaik	Performance analysis of dynamic threshold MOS (DTMOS) based 4-input multiplexer switch for low power and high speed FPGA design.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Marcel Moscarelli Corrêa, Mateus Thurow Schoenknecht, Luciano Volcan Agostini	A high performance hardware architecture for the H.264/AVC half-pixel motion estimation refinement.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Vojin G. Oklobdzija	Computing at the ultimate low-energy limits.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Sobeeh Almukhaizim, Mohammad Gh. Mohammad, Mohammad Khajah	Low-power test in compression-based reconfigurable scan architectures.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Magdy S. Abadir	Design for reality: knowledge discovery in design and test data.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Francisco de Assis Brito Filho, Fernando Rangel de Sousa	Wideband ring VCO for cognitive radio five-port receiver.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Chenjie Yu, Peter Petrov	Adaptive multi-threading for dynamic workloads in embedded multiprocessors.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Leonardo Londero de Oliveira, João Baptista dos Santos Martins, Gustavo Fernando Dessbesell, José Monteiro 0001	CentroidM: a centroid-based localization algorithm for mobile sensor networks.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Gabriel Luca Nazar, Christina Gimmler, Norbert Wehn	Implementation comparisons of the QR decomposition for MIMO detection.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Everton Carara, Fernando Gehm Moraes	Evaluating the impact of task migration in multi-processor systems-on-chip.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Cláudio Machado Diniz, João S. Altermann, Eduardo A. C. da Costa, Sergio Bampi	Performance enhancement of H.264/AVC intra frame prediction hardware using efficient 4-2 and 5-2 adder-compressors.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Andrea Calimera, Enrico Macii, Danilo Ravotto, Ernesto Sánchez 0001, Matteo Sonza Reorda	Generating power-hungry test programs for power-aware validation of pipelined processors.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Daniel Gomes Mesquita, Guilherme Perin, Fernando Luís Herrmann, João Baptista dos Santos Martins	An efficient implementation of montgomery powering ladder in reconfigurable hardware.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet	Reducing and smoothing power consumption of ROM-based controller implementations.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Antonio Lopes Filho, Roberto d'Amore	A low complexity image compression solution for onboard space applications.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Stanley S. K. Ho, Carlos E. Saavedra	A 5.4 GHz fully-integrated low-noise mixer.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Fadi J. Kurdahi	Designing working systems with imperfect chips.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Dalton Martini Colombo, Gilson Inácio Wirth, Christian Jesús B. Fayomi	Design methodology using inversion coefficient for low-voltage low-power CMOS voltage reference.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Guillermo Costa, Alfredo Arnaud, Matías R. Miguez	A precision autozero amplifier for EEG signals.	SBCCI	2010	DBLP DOI BibTeX RDF
1	André Luís Fortunato, Carlos Alberto dos Reis Filho	A -60dB THD/100MHz true unity-gain voltage buffer CMOS circuit.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Dirk Koch, Christian Beckhoff, Jim Tørresen	Zero logic overhead integration of partially reconfigurable modules.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Felipe S. Marques 0001, Osvaldo Martinello, Renato P. Ribas, André Inácio Reis	Improvements on the detection of false paths by using unateness and satisfiability.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Robson Dornelles, Felipe Sampaio, Luciano Volcan Agostini	Variable block size motion estimation architecture with a fast bottom-up decision mode and an integrated motion compensation targeting the H.264/AVC video coding standard.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Vinicius Callegaro, Felipe de Souza Marques, Carlos Eduardo Klock, Leomar Soares da Rosa Jr., Renato P. Ribas, André Inácio Reis	SwitchCraft: a framework for transistor network design.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Bruno Cruz de Oliveira, Márcio Eduardo Kreutz, Edgard de Faria Corrêa, Ivan Saraiva Silva	Exploring memory organization in virtual MP-SoC platforms.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Leonardo Medeiros, Antonio Carlos Cavalcanti	An MPEG-2 transport stream demultiplexer IP corecompliant with SBTVD.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Antonio Colaci, Gianluigi Boarin, Andrea Roggero, Lorenzo Civardi, Carlo Roma, Andreas Ripp, Michael Pronath, Gunter Strube	Systematic analysis & optimization of analog/mixed-signal circuits balancing accuracy and design time.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Leonardo Kunz, Gustavo Girão, Flávio Rech Wagner	Evaluation of a hardware transactional memory model in an NoC-based embedded MPSoC.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres	A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Leonel Tedesco, Thiago R. da Rosa, Fabien Clermidy, Ney Calazans, Fernando Gehm Moraes	Implementation and evaluation of a congestion aware routing algorithm for networks-on-chip.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Johanna Sepúlveda, Marius Strum, Jiang Chau Wang, Ricardo Pires	The LRD traffic impact on the NoC-based SoCs.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Jorge Johanny Sáenz Noval, Elkim Felipe Roa Fuentes, Armando Ayala Pabón, Wilhelmus A. M. Van Noije	A methodology to improve yield in analog circuits by using geometric programming.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Angelo G. da Luz, Eduardo A. C. da Costa, Marilton S. de Aguiar	Ordering and partitioning of coefficients based on heuristic algorithms for low power FIR filter realization.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Bernardo C. Vieira, Fabrício Vivas Andrade, Antônio Otávio Fernandes	A modular CNF-based SAT solver.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Maurício Banaszeski da Silva, Gilson I. Wirth	Modeling the impact of RTS on the reliability of ring oscillators.	SBCCI	2010	DBLP DOI BibTeX RDF
1	João Antonio Martino, Guido Araujo, Alex Orailoglu, Felipe Klein (eds.)	Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2010, São Paulo, Brazil, September 6-9, 2010	SBCCI	2010	DBLP BibTeX RDF
1	Alexsandro Cristovão Bonatto, André Borin Soares, Adriano Renner, Altamiro Amadeu Susin, Leandro Max Silva, Sergio Bampi	A 720p H.264/AVC decoder ASIC implementation for digital television set-top boxes.	SBCCI	2010	DBLP DOI BibTeX RDF
1	André Silva, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Marcelo Schiavon Porto, Sergio Bampi	High performance motion estimation architecture using efficient adder-compressors.	SBCCI	2009	DBLP DOI BibTeX RDF	adder-compressor, motion estimation, fast algorithm
1	André Mansano, Andre Vilas Boas, Alfredo Olmos, Jefferson Soldera	Zero quiescent current startup circuit with automatic turning-off for low power current and voltage reference.	SBCCI	2009	DBLP DOI BibTeX RDF	power-up, starter, initialization, start-up, current reference
1	M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, Peter Kollig	Design of a low power MPEG-1 motion vector reconstructor.	SBCCI	2009	DBLP DOI BibTeX RDF	behavioural synthesis, low power
1	Emilio Wuerges, Luiz C. V. dos Santos, Olinto J. V. Furtado, Sandro Rigo	An early real-time checker for retargetable compile-time analysis.	SBCCI	2009	DBLP DOI BibTeX RDF	compile-time WCET analysis, time-constraint feasibility analysis
1	Sergio Chaparro, Armando Ayala Pabón, Elkim Roa, Wilhelmus A. M. Van Noije	A merged RF CMOS LNA-Mixer design using geometric programming.	SBCCI	2009	DBLP DOI BibTeX RDF	LNA-Mixer, RF-CMOS inductors, optimization, analog circuits, geometric programming
1	Marcio F. da S. Oliveira, Ronaldo Rodrigues Ferreira, Francisco Assis Moreira do Nascimento, Franz J. Rammig, Flávio Rech Wagner	Exploiting the model-driven engineering approach to improve design space exploration of embedded systems.	SBCCI	2009	DBLP DOI BibTeX RDF	embedded systems, model-driven engineering, design space exploration
1	Diego F. Sánchez, Daniel M. Muñoz, Carlos H. Llanos, Mauricio Ayala-Rincón	Parameterizable floating-point library for arithmetic operations in FPGAs.	SBCCI	2009	DBLP DOI BibTeX RDF	goldschmidt, FPGA, computer arithmetic, floating-point
1	Cédric Majek, Yann Deval, Hervé Lapuyade, Jean-Baptiste Bégueret	Voltage controlled delay line with phase quadrature outputs for [0.9-4] GHz F-DLL dedicated to zero-IF multi-standard LO.	SBCCI	2009	DBLP DOI BibTeX RDF	CMOS-SOI, factorial delay locked loop, multi-standard frequency synthesizer, quadrature phase signals, voltage controlled delay element
1	Frank Sill, Davies W. de Lima Monteiro	Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor.	SBCCI	2009	DBLP DOI BibTeX RDF	pipelined SAC, error correction, ADC
1	Gustavo Neuberger, Gilson I. Wirth, Ricardo Reis 0001	Protecting digital circuits against hold time violation due to process variability.	SBCCI	2009	DBLP DOI BibTeX RDF	flip-flop characterization, hold time violations, race immunity, clock skew, process variability
1	André Inácio Reis, Roner G. Fabris	What about the IP of your IP?: an introduction to intellectual property law for engineers and scientists.	SBCCI	2009	DBLP DOI BibTeX RDF	EPO, INPI, PCT, USPTO, intellectual property law, patent agent, patent reading, patent strategy, patent writing
1	Luciano Ost, Guilherme Montez Guindani, Leandro Soares Indrusiak, Cezar Reinbrecht, Thiago Raupp da Rosa, Fernando Moraes 0001	A high abstraction, high accuracy power estimation model for networks-on-chip.	SBCCI	2009	DBLP DOI BibTeX RDF	high abstraction modeling, networks-on-chip, power modeling
1	Juan José Carrillo, Elkim Roa, José Vieira, Wilhelmus A. M. Van Noije	A low-voltage bandgap reference source based on the current-mode technique.	SBCCI	2009	DBLP DOI BibTeX RDF	CMOS voltage reference, temperature coefficient, analog circuits, low voltage
1	Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo, Alejandro Ávila-García, José Luis González-Vidal, Luis M. Flores-Nava	Floating gate MOSFET circuit design for a monolithic MEMS GAS sensor.	SBCCI	2009	DBLP DOI BibTeX RDF	FGMOS, gas sensor, MEMS
1	Michel M. Maharbiz	A cyborg beetle: wireless neural flight control of a free-flying insect.	SBCCI	2009	DBLP DOI BibTeX RDF	cyborg insect, insect flight, MEMS, microsystems, bioMEMS
1	Chenjie Yu, Xiangrong Zhou, Peter Petrov	Low-power inter-core communication through cache partitioning in embedded multiprocessors.	SBCCI	2009	DBLP DOI BibTeX RDF	low-power cache architectures, low-power cache coherence, MPSoC, on-chip communication
1	Mohamad Sawan, Benoit Gosselin	Multichannel intracortical neurorecording: integration and packaging challenges.	SBCCI	2009	DBLP DOI BibTeX RDF	bioelectronics, implantable devices, biosensors, wireless links
1	George Sobral Silveira, Alisson Vasconcelos de Brito, Elmar U. K. Melcher	Functional verification of power gate design in SystemC RTL.	SBCCI	2009	DBLP DOI BibTeX RDF	simulation, SystemC, RTL, functional verification, power gate
1	Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Design validation of multithreaded architectures using concurrent threads evolution.	SBCCI	2009	DBLP DOI BibTeX RDF	simulation based techniques, functional validation
1	Sílvio R. F. de Fernandes, Bruno Cruz de Oliveira, Ivan Saraiva Silva	Using NoC routers as processing elements.	SBCCI	2009	DBLP DOI BibTeX RDF	SoC, system-on-chip, network-on-chip, routing algorithm, NoC, MP-SoC
1	Viviane Lucy Santos de Souza, Victor Wanderley Costa de Medeiros, Manoel Eusébio de Lima	Architecture for dense matrix multiplication on a high-performance reconfigurable system.	SBCCI	2009	DBLP DOI BibTeX RDF	BRAMs (RAM blocks), MAC (multiplier unit), RASC (reconfigurable application-specific computing), performance, FPGA (field programmable gate array), parallelism, matrix multiplication, data reuse
1	Costas Argyrides, Giorgos Dimosthenous, Dhiraj K. Pradhan, Carlos Arthur Lang Lisbôa, Luigi Carro	Reliability aware yield improvement technique for nanotechnology based circuits.	SBCCI	2009	DBLP DOI BibTeX RDF	reliability, nanotechnology, yield improvement
1	Francisco Assis Moreira do Nascimento, Marcio F. da S. Oliveira, Flávio Rech Wagner	Using MDE for the formal verification of embedded systems modeled by UML sequence diagrams.	SBCCI	2009	DBLP DOI BibTeX RDF	embedded systems, formal verification, model driven engineering
1	Daniel Schmidt 0001, Norbert Wehn	DRAM power management and energy consumption: a critical assessment.	SBCCI	2009	DBLP DOI BibTeX RDF	modelling, measurement, power management, SDRAM
1	Laurent Leyssenne, Eric Kerherve, Yann Deval, Didier Belot	A novel delta sigma built-in-current-sensor as a signal strength indicator for RF transceiver reconfiguration.	SBCCI	2009	DBLP DOI BibTeX RDF	RF power amplifier, efficiency maximization, WLAN, built-in current sensor, delta-sigma modulation
1	Luiz Fernando Gonçalves, Jefferson Luiz Bosa, Renato V. B. Henriques, Marcelo Lubaszewski	Design of an embedded system for the proactive maintenance of electrical valves.	SBCCI	2009	DBLP DOI BibTeX RDF	electromechanical systems, novel applications of FPGAs, testability issues, embedded systems
1	Marcelo Daniel Berejuck, César Albenes Zeferino	Adding mechanisms for QoS to a network-on-chip.	SBCCI	2009	DBLP DOI BibTeX RDF	FPGA, systems-on-chip, networks-on-chip
1	Ivan Saraiva Silva, Renato P. Ribas, Calvin Plett (eds.)	Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009	SBCCI	2009	DBLP BibTeX RDF
1	Jader A. De Lima	A compact low-distortion low-power instrumentation amplifier.	SBCCI	2009	DBLP DOI BibTeX RDF	class-AB output stage, double-port amplifier, instrumentation amplifier
1	Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Érika F. Cota, Márcio Eduardo Kreutz	Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router.	SBCCI	2009	DBLP DOI BibTeX RDF	reconfigurable router, fault tolerance, reliability, network-on-chip, NoC
1	Luciano A. de Lacerda, Edson P. Santana, Cleber Vinícius A. de Almeida, Ana Isabela Araújo Cunha	Distortion analysis of analog multiplier circuits using two-dimensional integral nonlinear function.	SBCCI	2009	DBLP DOI BibTeX RDF	CMOS multipliers, distortion, analog multipliers
1	Calvin Plett, Robson Nunes de Lima	Low-power CMOS transceivers with on-chip antennas for short-range radio-frequency communication.	SBCCI	2009	DBLP DOI BibTeX RDF	CMOS transceiver, injection locked, integrated antenna, medical sensor readout, PLL
1	Antonio Felipe de Freitas Silva, Fernando Rangel de Sousa	Highly improved IIP2 direct conversion receiver.	SBCCI	2009	DBLP DOI BibTeX RDF	RF front-end GKeven order non-linearity, intermodulation distortion, cognitive radio
1	Leonel Tedesco, Fabien Clermidy, Fernando Moraes 0001	A path-load based adaptive routing algorithm for networks-on-chip.	SBCCI	2009	DBLP DOI BibTeX RDF	quality of service, networks on chip, dynamic routing, traffic monitoring
1	Oliver Sander, Christoph Roth, Vitali Stuckert, Jürgen Becker 0001	System concept for an FPGA based real-time capable automotive ECU simulation system.	SBCCI	2009	DBLP DOI BibTeX RDF	simulation, FPGA, real-time, automotive
1	Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang	A PD-based methodology to enhance efficiency in testbenches with random stimulation.	SBCCI	2009	DBLP DOI BibTeX RDF	parameter domains, system-on-chip, design methodologies, functional verification, coverage analysis
1	Levent Aksoy, Diego Jaccottet, Eduardo Costa 0001	Design of low complexity digital FIR filters.	SBCCI	2009	DBLP DOI BibTeX RDF	low-level synthesis, multiple constant multiplications, multiplierless filter design, high-level synthesis, array multipliers
1	Luiz Carlos Moreira, Wilhelmus A. M. Van Noije, Armando Ayala Pabón, Andrés Farfán-Peláez	Comparison of small cross inductors and rectangular inductors designed in 0.35um CMOS technology.	SBCCI	2009	DBLP DOI BibTeX RDF	cross inductors, rectangular inductors, RF CMOS
1	Felipe Klein, Alexandro Baldassin, Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo	On the energy-efficiency of software transactional memory.	SBCCI	2009	DBLP DOI BibTeX RDF	low power design, transactional memory, multi-core, MPSoC
1	Genival Mariano de Araujo, Heider Marconi G. Madureira, José Camargo da Costa	Design and characterization of a 0.35 micron CMOS voltage-to-current converter.	SBCCI	2009	DBLP DOI BibTeX RDF	voltage-to-current converter, system on chip, current reference
1	Raju Halder, Parthasarathi Dasgupta, Saptarshi Naskar, Samar Sen-Sarma	An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking.	SBCCI	2009	DBLP DOI BibTeX RDF	intellectual property protection (IPP), watermarking, encryption, decryption
1	Igor Dantas dos Santos Miranda, Ana Isabela Araújo Cunha	ASIC design of a novel high performance neuroprocessor architecture for multi layered perceptron networks.	SBCCI	2009	DBLP DOI BibTeX RDF	neural network arithmetic, neuroprocessor, ASIC
1	Robson Dornelles, Felipe Sampaio, Daniel Palomino 0001, Luciano Volcan Agostini	Transforms and quantization design targeting the H.264/AVC intra prediction constraints.	SBCCI	2009	DBLP DOI BibTeX RDF	IQ modules, Q, T, IT, video coding, high performance, H.264/AVC, VLSI design, low latency, intra-prediction
1	Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías	Phase noise - consumption trade-off in low power RF-LC-VCO design in micro and nanometric technologies.	SBCCI	2009	DBLP DOI BibTeX RDF	design methodology, power consumption, VCO, radio-frequency
1	Thaísa Leal da Silva, Fábio I. Pereira, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini	High performance and low cost architecture for H.264/AVC CAVLD targeting HDTV.	SBCCI	2009	DBLP DOI BibTeX RDF	CAVLD, H.264/AVC, video compression, hardware architectures
1	André Mansano, Jader A. De Lima, Jacobus W. Swart	A compact fast-response charge-pump gate driver.	SBCCI	2009	DBLP DOI BibTeX RDF	gate driver, switched-capacitor converters, charge-pump
1	Md Jasim Uddin, Muhammad I. Ibrahimy, Muhammad A. Hasan, Mohd. Alauddin Mohd. Ali, Mamun Bin Ibne Reaz	CMOS 2.45GHz RF power amplifier for RFID reader.	SBCCI	2009	DBLP DOI BibTeX RDF	power splitter, transponder, RFID
1	Érika F. Cota, Luigi Carro, Felipe Pinto, Ricardo Augusto da Luz Reis, Marcelo Lubaszewski	Resource-and-time-aware test strategy for configurable quaternary logic blocks.	SBCCI	2009	DBLP DOI BibTeX RDF	quaternary logic, test generation, FPGA testing
1	Wimol San-Um, Masayoshi Tachibana	Simultaneous impulse stimulation and response sampling technique for built-in self test of linear analog integrated circuits.	SBCCI	2009	DBLP DOI BibTeX RDF	impulse stimulation, linear analog integrated circuits, response sampling technique, built-in self test
1	Abel G. Silva-Filho, Cristiano C. de Araújo	A methodology for tuning two-level cache hierarchy considering energy and performance.	SBCCI	2009	DBLP DOI BibTeX RDF	exploration mechanism, two-level caches, embedded systems, system-on-chip, low power design, memory hierarchy
1	Diogo José Costa Alves, Edna Barros	A logic built-in self-test architecture that reuses manufacturing compressed scan test patterns.	SBCCI	2009	DBLP DOI BibTeX RDF	LBIST, compressed test patterns, test, SoC, self-test
1	Juan Fernando Eusse Giraldo, Michael Hübner 0001, Ricardo Pezzuol Jacobi	BRICK: a multi-context expression grained reconfigurable architecture.	SBCCI	2009	DBLP DOI BibTeX RDF	validation, reconfigurable computing, MIMO, SystemC, co-simulation, coarse grain
1	Matías R. Miguez, Alfredo Arnaud, Joel Gak	A self-protected integrated switch in a HV technology.	SBCCI	2009	DBLP DOI BibTeX RDF	design, drivers
1	Hagen Sämrow, Claas Cornelius, Frank Sill, Andreas Tockhorn, Dirk Timmermann	Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown.	SBCCI	2009	DBLP DOI BibTeX RDF	gate oxide breakdown, reliability, integrated circuit design, redundant systems
1	Valerij Matrose, Carsten Gremzow	Improved placement for hierarchical FPGAs exploiting local interconnect resources.	SBCCI	2009	DBLP DOI BibTeX RDF	FPGA, interconnect, placement
1	Abner Corrêa Barros, Victor Wanderley Costa de Medeiros, Viviane Lucy Santos de Souza, Paulo Sérgio Brandão do Nascimento, Ângelo Mazer, João Paulo Fernandes Barbosa, Bruno P. Neves, Ismael Santos 0001, Manoel Eusébio de Lima	Implementation of a double-precision multiplier accumulator with exception treatment to a dense matrix multiplier module in FPGA.	SBCCI	2008	DBLP DOI BibTeX RDF	FPGA, scientific computing, floating-point, HPC
1	Pablo Aguirre, Fernando Silveira	CMOS op-amp power optimization in all regions of inversion using geometric programming.	SBCCI	2008	DBLP DOI BibTeX RDF	optimization, CMOS, analog, geometric programming, automatic design
1	Mahmoud Ben Naser, Csaba Andras Moritz	Power and performance tradeoffs with process variation resilient adaptive cache architectures.	SBCCI	2008	DBLP DOI BibTeX RDF	process variations, leakage power, adaptive cache
1	Jader A. De Lima, Wallace A. Pimenta	A current limiter for DC/DC regulators with internal compensation for process and temperature.	SBCCI	2008	DBLP DOI BibTeX RDF	DC/DC converter, LDO, PVT compensation, current limitation, switcher
1	Hugo de Lemos Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia	Analog hardware implementation of a vector quantizer for focal-plane image compression.	SBCCI	2008	DBLP DOI BibTeX RDF	CMOS analog hardware, analog image processing, vector quantization
1	Fernando Gehm Moraes, Everton Carara, Daniel V. Pigatto, Ney Laert Vilar Calazans	MOTIM: an industrial application using nocs.	SBCCI	2008	DBLP DOI BibTeX RDF	ethernet switch, FPGA, prototyping, networks on chip
1	Eduardo Ribeiro da Silva, Ivan Carlos Ribeiro do Nascimento, Frank Herman Behrens, Marcos Mauricio Pelicia, Remerson Stein Kickhofel, Ricardo Maltione	Power management techniques for very low consumption and EMI reduction in automotive applications.	SBCCI	2008	DBLP DOI BibTeX RDF	CAN transceiver, low power, automotive, EMI

Publications at "SBCCI"( http://dblp.L3S.de/Venues/SBCCI )