Search results for "wiring"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
17	Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Toru Chiba, Isao Shirakawa, Hiroshi Ozaki	An Approach to Gate Assignment and Module Placement for Printed Wiring Boards.	IEEE Trans. Computers	1980	DBLP DOI BibTeX RDF
17	John F. Jarvis	A Method for Automating the Visual Inspection of Printed Wiring Boards.	IEEE Trans. Pattern Anal. Mach. Intell.	1980	DBLP DOI BibTeX RDF
17	Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa	On the layering problem of multilayer PWB wiring.	Graph Theory and Algorithms	1980	DBLP DOI BibTeX RDF
17	Ikuo Nishioka, Takuji Kurimoto, Hisao Nishida, Seiji Yamamoto, Toru Chiba, Toshiaki Nagakawa, Takatsugu Fujioka, Masashi Uchino	An automatic routing system for high density multilayer printed wiring boards.	DAC	1980	DBLP DOI BibTeX RDF
17	Frank D. Skinner	Interactive wiring system.	DAC	1980	DBLP DOI BibTeX RDF
17	Larry Krakauer, Theo Pavlidis	Visual printed wiring board fault detection by a geometrical method.	COMPSAC	1979	DBLP DOI BibTeX RDF
17	Pao Tsin Wang, Paul Bassett	A software system for Automated Placement And Wiring of LSI chips.	DAC	1979	DBLP BibTeX RDF
17	John C. Foster	A "lookahead" router for multilayer printed wiring boards.	DAC	1979	DBLP BibTeX RDF
17	Ken-ichi Sahara, Ken-ichi Kobori, Ikuo Nishioka	An interactive layout system of analog printed wiring boards.	DAC	1979	DBLP BibTeX RDF
17	Marvin A. Sirbu Jr., David Twyver, David Willard, John F. Shoch, Richard Strindmo	Alternative Approaches To Wiring The Office Of The Future (Panel Discussion).	ACM Annual Conference (1)	1978	DBLP DOI BibTeX RDF
17	Marvin A. Sirbu Jr., Victor A. DeMarines, David Willard	Alternative Approaches To Wiring The Office Of The Future (Panel Discussion).	ACM Annual Conference (1)	1978	DBLP DOI BibTeX RDF
17	Marvin A. Sirbu Jr., John F. Shoch	Alternative Approaches To Wiring The Office Of The Future (Panel Discussion).	ACM Annual Conference (1)	1978	DBLP BibTeX RDF
17	Ning Nan, Michael Feuer	A method for the automatic wiring of LSl chips.	AFIPS National Computer Conference	1978	DBLP BibTeX RDF
17	Ikuo Nishioka, Takuji Kurimoto, Seiji Yamamoto, Isao Shirakawa, Hiroshi Ozaki	An approach to gate assignment and module placement for printed wiring boards.	DAC	1978	DBLP BibTeX RDF
17	K. A. Chen, Michael Feuer, K. H. Khokhani, Ning Nan, S. Schmidt	The chip layout problem: An automatic wiring procedure.	DAC	1977	DBLP BibTeX RDF
17	William R. Heller, W. F. Michail, Wilm E. Donath	Prediction of wiring space requirements for LSI.	DAC	1977	DBLP BibTeX RDF
17	Ikuo Nishioka, Takuji Kurimoto, Hisao Nishida	A minicomputerized automatic layout system for two-layer printed wiring boards.	DAC	1977	DBLP BibTeX RDF
17	Yasuhiro Ikemoto, Toshiki Sugiyama, Kenichi Igarashi, Hiroshi Kano	Correction and wiring check-system for master-slice LSI.	DAC	1976	DBLP DOI BibTeX RDF
17	R. N. Piscatelli, P. Tingleff	A solution to closeness checking of non-orthogonal printed circuit board wiring.	DAC	1976	DBLP DOI BibTeX RDF
17	Martin J. Welt	NOMAD: A printed wiring board layout system.	DAC	1975	DBLP BibTeX RDF
17	Judith G. Brinsfield, S. R. Tarrant	Computer aids for multilayer printed wiring board design.	DAC	1975	DBLP BibTeX RDF
17	William H. Kautz	Testing for Faults in Wiring Networks.	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
17	R. L. Calafiore, John C. Foster	A system for multilayer printed wiring layout.	DAC	1974	DBLP BibTeX RDF
17	C. S. Slemaker, Richard C. Mosteller, L. W. Leyking, A. G. Livitsanos	A programmable printed-wiring router.	DAC	1974	DBLP BibTeX RDF
17	Michio Tokunaga, Tooru Kurosaki, Mitsuyuki Masui, Chikai Li, Fujio Otake	WIDAS - Wiring Diagram Assembly System.	DAC	1973	DBLP BibTeX RDF
17	John C. Foster	A router for multilayer printed wiring backplanes.	DAC	1973	DBLP BibTeX RDF
17	Hing-Cheung So	Pin assignment of circuit cards and the routability of multilayer printed wiring backplanes.	DAC	1973	DBLP BibTeX RDF
17	Luther C. Abel	On the Automated Layout of Multi-Layer Planar Wiring and a Related Graph Coloring Problem		1972	RDF
17	Stephen J. Urban, Neil C. Randall, Thomas J. Harley	System for Heuristic and Rapid Processing of Component Layout and Wiring (SHARPCLAW).	ACM Annual Conference	1971	DBLP DOI BibTeX RDF
17	Timothy J. Kriewall, N. R. Miller	CIBOL - an interactive graphics program used in the design of printed wiring boards and generation of associated artmasters.	DAC	1971	DBLP DOI BibTeX RDF
17	Yoshiaki Koga	A checking method of wiring.	DAC	1970	DBLP DOI BibTeX RDF
17	Robert B. Hitchcock Sr.	Cellular wiring and the cellular modeling technique.	DAC	1969	DBLP DOI BibTeX RDF
17	Gerald L. Ginsberg, Calvin R. Maurer Jr., E. H. Whitley	An updated multilayer printed wiring C-A-D capability.	DAC	1969	DBLP DOI BibTeX RDF
17	Murray F. Freeman, Allen Ginsberg, Mark Resnick, E. H. Whitley	Multilayer printed wiring - computer aided design.	DAC	1967	DBLP DOI BibTeX RDF
17	Donald L. Richards	SWAP - a programming system for automatic simulation, wiring and placement of logical equations.	DAC	1967	DBLP DOI BibTeX RDF
17	Tomaso Pomentale	An algorithm for minimizing backboard wiring functions.	Commun. ACM	1965	DBLP DOI BibTeX RDF
17	D. K. Frayne	Three levels of the wiring interconnection problem.	DAC	1965	DBLP DOI BibTeX RDF
17	Nelson M. Blachman	On the Wiring of Two-Dimensional Multiple-Coincidence Magnetic Memories.	IRE Trans. Electron. Comput.	1956	DBLP DOI BibTeX RDF
9	Hua Xiang 0001, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho	Logical and physical restructuring of fan-in trees.	ISPD	2010	DBLP DOI BibTeX RDF	symmetric-function fan-in tree, restructure, commutative
9	Tanja Döring, Bastian Pfleging, Christian Kray, Albrecht Schmidt 0001	Design by physical composition for complex tangible user interfaces.	CHI Extended Abstracts	2010	DBLP DOI BibTeX RDF	3d printing, dialog independence, evolutionary prototyping, physical prototyping, smart products, tangible user interfaces, physical interfaces, paper prototyping
9	Yoichi Ochiai	The visible electricity device: visible breadboard.	SIGGRAPH Posters	2010	DBLP DOI BibTeX RDF
9	Jin-Tai Yan, Zhi-Wei Chen	Resource-constrained timing-driven link insertion for critical delay reduction.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	critical delay, link insertion, non-tree
9	Xin-Wei Shih, Yao-Wen Chang	Fast timing-model independent buffered clock-tree synthesis.	DAC	2010	DBLP DOI BibTeX RDF
9	Xiaoqing Yang, Tak-Kei Lam, Yu-Liang Wu	ECR: a low complexity generalized error cancellation rewiring scheme.	DAC	2010	DBLP DOI BibTeX RDF	error cancellation, ATPG, rewire
9	Xiang Zhang, Ahmed Louri	A multilayer nanophotonic interconnection network for on-chip many-core communications.	DAC	2010	DBLP DOI BibTeX RDF	interconnection networks, CMP, 3D, silicon photonics
9	Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li 0001, Gi-Joon Nam, Charles B. Winn	Detecting tangled logic structures in VLSI netlists.	DAC	2010	DBLP DOI BibTeX RDF	congestion prediction, rent rule, tangled logic, clustering
9	Brett Feero, Partha Pratim Pande	Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
9	Mariko Kato, Naoki Saiwaki	Design of Wearable Interface Considering Touch Communications.	HCI (8)	2009	DBLP DOI BibTeX RDF	Touch Communication, Wearable Interface
9	Srinath Sridharan, Michael DeBole, Guangyu Sun 0003, Yuan Xie 0001, Vijaykrishnan Narayanan	A criticality-driven microarchitectural three dimensional (3D) floorplanner.	ASP-DAC	2009	DBLP DOI BibTeX RDF
9	Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo, Glenn Reinman, Chunyi Peng 0001, Mishali Naik, Lixia Zhang 0001, Jason Cong	A scalable micro wireless interconnect structure for CMPs.	MobiCom	2009	DBLP DOI BibTeX RDF	on-chip wireless interconnection network, chip multiprocessors
9	Igor Dantas dos Santos Miranda, Ana Isabela Araújo Cunha	ASIC design of a novel high performance neuroprocessor architecture for multi layered perceptron networks.	SBCCI	2009	DBLP DOI BibTeX RDF	neural network arithmetic, neuroprocessor, ASIC
9	Danny Hughes 0001, Klaas Thoelen, Wouter Horré, Nelson Matthys, Javier del Cid, Sam Michiels, Christophe Huygens, Wouter Joosen	LooCI: a loosely-coupled component infrastructure for networked embedded systems.	MoMM	2009	DBLP DOI BibTeX RDF	binding models, wireless sensor networks, publish-subscribe, component models
9	Susanne Seitinger, Daniel S. Perry, William J. Mitchell 0001	Urban pixels: painting the city with light.	CHI	2009	DBLP DOI BibTeX RDF	urban display, ubiquitous computing, interaction design, lighting, urban computing, ambient media
9	Ling Wang 0004, Jianwen Zhang, Xiaoqing Yang, Dongxin Wen	Router with centralized buffer for network-on-chip.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	centralized buffer, architecture, router, NoC
9	Eric Becker, Zhengyi Le, Kyungseo Park, Yong Lin, Fillia Makedon	Event-based experiments in an assistive environment using wireless sensor networks and voice recognition.	PETRA	2009	DBLP DOI BibTeX RDF	wireless sensor networks, robotics, pervasive computing, assistive environments
9	Dacian Tudor, Andrei Stancovici, Bogdan Popescu, Vladimir Cretu, Gernot Reisinger	Zombee: a home automation prototype for retrofitted environments.	PETRA	2009	DBLP DOI BibTeX RDF	wireless communications, ZigBee, home automation
9	Dutta Gupta Tirtho, Liuchen Chang	Web based remote operations on inverters.	CCECE	2009	DBLP DOI BibTeX RDF
9	Chung-Hsien Kuo, Kuo-Wei Chiou	Tendon Based Full Size Biped Humanoid Robot Walking Platform Design.	FIRA	2009	DBLP DOI BibTeX RDF	tendon driven mechanism, gait planning, biped humanoid robots, embedded controller
9	Andreas Raabe, Rastislav Bodík	Synthesizing hardware from sketches.	DAC	2009	DBLP DOI BibTeX RDF	sketching
9	Aleks Kissinger	Exploring a Quantum Theory with Graph Rewriting and Computer Algebra.	Calculemus/MKM	2009	DBLP DOI BibTeX RDF
9	Ian Culverhouse, Steve Gill	Bringing concepts to life: introducing a rapid interactive sketch modelling toolkit for industrial designers.	TEI	2009	DBLP DOI BibTeX RDF	common RFiD antenna, low fidelity, rapid iteration, RFiD, interactive prototyping
9	Michele Migliore, Gordon M. Shepherd	Dendritic action potentials connect distributed dendrodendritic microcircuits.	J. Comput. Neurosci.	2008	DBLP DOI BibTeX RDF	Olfactory processing, Mitral cells, Granule cells, Modeling
9	Miriam J. Akl, Magdy A. Bayoumi	Transition Skew Coding for Global On-Chip Interconnect.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
9	Nick McKeown, Thomas E. Anderson, Hari Balakrishnan, Guru M. Parulkar, Larry L. Peterson, Jennifer Rexford, Scott Shenker, Jonathan S. Turner	OpenFlow: enabling innovation in campus networks.	Comput. Commun. Rev.	2008	DBLP DOI BibTeX RDF	ethernet switch, flow-based, virtualization
9	Mark E. Hazen	The Technology Behind HomePlug AV Powerline Communications.	Computer	2008	DBLP DOI BibTeX RDF
9	Janneke F. M. Jehee, Jaap M. J. Murre	The scalable mammalian brain: emergent distributions of glia and neurons.	Biol. Cybern.	2008	DBLP DOI BibTeX RDF	Comparative neuroanatomy, Glia-to-neuron index, Neuron number
9	Heikki Huttunen, Pekka Ruusuvuori, Tapio Manninen, Kalle Rutanen, Risto Rönkkä, Ari Visa	Object detection for dynamic adaptation of interconnections in inkjet printed electronics.	ICIP	2008	DBLP DOI BibTeX RDF
9	Kees Goossens, Martijn T. Bennebroek, Jae Young Hur, Muhammad Aqeel Wahlah	Hardwired Networks on Chip in FPGAs to Unify Functional and Con?guration Interconnects.	NOCS	2008	DBLP DOI BibTeX RDF
9	Kyu-Jin Cho, Elliot Wright Hawkes, Chris Quinn, Robert J. Wood	Design, fabrication and analysis of a body-caudal fin propulsion system for a microrobotic fish.	ICRA	2008	DBLP DOI BibTeX RDF
9	Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan	De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs.	DATE	2008	DBLP DOI BibTeX RDF
9	Paul Gratz, Boris Grot, Stephen W. Keckler	Regional congestion awareness for load balance in networks-on-chip.	HPCA	2008	DBLP DOI BibTeX RDF
9	Christian Stamber, Sebastian Stein 0002, Marwane El Kharbili	Prototypical Implementation of a Pragmatic Approach to Semantic Web Service Discovery during Process Execution.	BIS	2008	DBLP DOI BibTeX RDF	semantic web service, BPEL, web service discovery, business process automation
9	Kazuya Tanigawa, Tetsuya Zuyama, Takuro Uchida, Tetsuo Hironaka	Exploring compact design on high throughput coarse grained reconfigurable architectures.	FPL	2008	DBLP DOI BibTeX RDF
9	Hironori Hibino, Yoshiro Fukuda	Emulation in manufacturing engineering processes.	WSC	2008	DBLP DOI BibTeX RDF
9	Georgios Smaragdakis, Vassilis Lekakis, Nikolaos Laoutaris, Azer Bestavros, John W. Byers, Mema Roussopoulos	EGOIST: overlay routing using selfish neighbor selection.	CoNEXT	2008	DBLP DOI BibTeX RDF	overlay network creation and maintenance, selfish neighbor selection, overlay routing
9	Crispín Gómez Requena, Francisco Gilabert Villamón, María Engracia Gómez, Pedro Juan López Rodríguez, José Duato	RUFT: Simplifying the Fat-Tree Topology.	ICPADS	2008	DBLP DOI BibTeX RDF
9	Crispín Gómez Requena, María Engracia Gómez, Pedro Juan López Rodríguez, José Duato	An Efficient Switching Technique for NoCs with Reduced Buffer Requirements.	ICPADS	2008	DBLP DOI BibTeX RDF
9	Takahiro Endo, Yuki Kawachi, Haruhisa Kawasaki, Tetsuya Mouri	FPGA-Based Control for the Wire-Saving of Five-Fingered Haptic Interface.	EuroHaptics	2008	DBLP DOI BibTeX RDF	wire-saving control system, FPGA, Haptic interface
9	Shan Yan, Bill Lin 0001	Design of application-specific 3D Networks-on-Chip architectures.	ICCD	2008	DBLP DOI BibTeX RDF
9	Anuj Kumar, Tai-Hsuan Wu, Azadeh Davoodi	SynECO: Incremental technology mapping with constrained placement and fast detail routing for predictable timing improvement.	ICCD	2008	DBLP DOI BibTeX RDF
9	Thomas J. Sullivan, Stephen R. Deiss, Tzyy-Ping Jung, Gert Cauwenberghs	A brain-machine interface using dry-contact, low-noise EEG sensors.	ISCAS	2008	DBLP DOI BibTeX RDF
9	Lei Zhang, Fei Zhou, Yaping Qian	Develop of the Blast Furnace Soft Water Temperature Measurement System.	CSSE (4)	2008	DBLP DOI BibTeX RDF
9	Philipp V. Panitz, Markus Olbrich, Erich Barke, Markus Bühler, Jürgen Koehl	Considering possible opens in non-tree topology wire delay calculation.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	non-tree topologies, yield, static timing analysis, delay analysis
9	Abdelfatteh Haidine, Ralf Lehnert	Placement of Base Stations in Broadband Power Line Communications Access Networks by Means of Multi-criteria Optimization.	AccessNets	2008	DBLP DOI BibTeX RDF	uplink delay, Broadband Power-Line Communications (B-PLC), access network planning, generalized base station placement, multi-criteria optimization, network costs
9	Hiroyuki Torikai, Sho Hashimoto	A hardware-oriented learning algorithm for a digital spiking neuron.	IJCNN	2008	DBLP DOI BibTeX RDF
9	Alexander D. Rast, Shufan Yang, Muhammad Mukaram Khan, Stephen B. Furber	Virtual synaptic interconnect using an asynchronous network-on-chip.	IJCNN	2008	DBLP DOI BibTeX RDF
9	Conrad Attard, Andreas Alexander Albrecht	On axon delay functions and spiking activity.	IJCNN	2008	DBLP DOI BibTeX RDF
9	Markus Prossegger, Abdelhamid Bouchachia	Ant colony optimization for Steiner tree problems.	CSTST	2008	DBLP DOI BibTeX RDF	Steiner tree optimization, parallel ant colony optimization, spectral clustering
9	Pradeep Fernando, Srinivas Katkoori	An Elitist Non-Dominated Sorting Based Genetic Algorithm for Simultaneous Area and Wirelength Minimization in VLSI Floorplanning.	VLSI Design	2008	DBLP DOI BibTeX RDF
9	Dong-Yu Zheng, Yan Sun, Shao-Qing Li, Liang Fang	A 485ps 64-Bit Parallel Adder in 0.18mum CMOS.	J. Comput. Sci. Technol.	2007	DBLP DOI BibTeX RDF	semi-dynamic, sparse-tree, parallel prefix adder
9	Linda Dailey Paulson	News Briefs.	Computer	2007	DBLP DOI BibTeX RDF	semiconductor technology, LED technology, herd computing, wireless technology, spyware
9	Srinivasan Murali, Luca Benini, Giovanni De Micheli	An Application-Specific Design Methodology for On-Chip Crossbar Generation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
9	Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane	BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
9	William S. Anderson, Pawel Kudela, Jounhong Cho, Gregory K. Bergey, Piotr J. Franaszczuk	Studies of stimulus parameters for seizure disruption using neural network simulations.	Biol. Cybern.	2007	DBLP DOI BibTeX RDF
9	Dwayne Folden, Trent Jackson, Michael Panique, Rianon Tiensvold, Richard S. Wolff, Todd Howard, Eric Julian, Levi Junkert, David López, Michael J. Oudshoorn	An aircraft cabin wireless system for games and video entertainment.	Comput. Entertain.	2007	DBLP DOI BibTeX RDF	wireless networks, mobile devices, computer architecture, computer games
9	Christian Van der Velden, Cees Bil, Xinghuo Yu 0001, Adrian Smith	An intelligent system for automatic layout routing in aerospace design.	Innov. Syst. Softw. Eng.	2007	DBLP DOI BibTeX RDF	Knowledge based engineering, Routing, Computer aided design (CAD), Intelligent systems, Design automation
9	S. E. C. Crouch, James A. Davis, Jonathan Jedwab	The Design of the IEEE 802.12 Coding Scheme.	IEEE Trans. Commun.	2007	DBLP DOI BibTeX RDF
9	Shinya Toji, Minoru Uehara, Hideki Mori	Design of the Tile-Based Embedded Multimedia Processor -TEMP-.	NBiS	2007	DBLP DOI BibTeX RDF	Tile-Based Processor, Embedded System
9	Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman 0001, Parthasarathi Dasgupta	Minimum-Congestion Placement for Y-interconnects: Some studies and observations.	ISVLSI	2007	DBLP DOI BibTeX RDF
9	Makoto Ishitsuka, Kazuo Ishii	Modularity development and control of an underwater manipulator for AUV.	IROS	2007	DBLP DOI BibTeX RDF