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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6978 occurrences of 2230 keywords
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Results
Found 6322 publication records. Showing 6322 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López 0001, José Duato |
Congestion Management in MINs through Marked and Validated Packets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 15th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2007), 7-9 February 2007, Naples, Italy, pp. 254-261, 2007, IEEE Computer Society, 0-7695-2784-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Pierre-Marc Bureau, José M. Fernandez 0001 |
Optimising Networks Against Malware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPCCC ![In: Proceedings of the 26th IEEE International Performance Computing and Communications Conference, IPCCC 2007, April 11-13, 2007, New Orleans, Louisiana, USA, pp. 518-527, 2007, IEEE Computer Society, 1-4244-1138-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Min Xie, Youren Wang, Li Wang, Yuan Zhang |
Design on Operator-Based Reconfigurable Hardware Architecture and Cell Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings, pp. 140-150, 2007, Springer, 978-3-540-74625-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Operator-based programmable cell circuit, FPGA, Reconfigurable computing, Reconfigurable hardware, Information processing |
16 | Stamatis Vassiliadis, Ioannis Sourdis |
FLUX Networks: Interconnects on Demand. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 160-167, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis |
Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 403-414, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Yuriy Sheynin, Elena Suvorova, Felix Shutenko |
Complexity and Low Power Issues for On-chip Interconnections in MPSoC System Level Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany, pp. 283-288, 2006, IEEE Computer Society, 0-7695-2533-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen |
Evaluating SoC Network Performance in MPEG-4 Encoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SiPS ![In: Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2006, Proceedings, October 2-4, 2006, Banff, Alberta, Canada, pp. 250-255, 2006, IEEE, 1-4244-0382-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Kostas Siozios, Dimitrios Soudris |
Wire Segment Length and Switch Box Co-Optimization for FPGA Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis |
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Ming-Der Shieh, Tai-Ping Wang, Chien-Ming Wu, Chun-Ming Huang |
Efficient path metric access for reducing interconnect overhead in Viterbi decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Ashok Narasimhan, Bhooma Srinivasaraghavan, Ramalingam Sridhar |
A Low-Power Asymmetric Source Driver Level Converter Based Current-Mode Signaling Scheme for Global Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 491-494, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Ngoc Chi Nguyen, Vo Dinh Minh Nhat, Sungyoung Lee |
Fault Free Shortest Path Routing on the de Bruijn Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICN (2) ![In: Networking - ICN 2005, 4th International Conference on Networking, ReunionIsland, France, April 17-21, 2005, Proceedings, Part II, pp. 327-334, 2005, Springer, 3-540-25338-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Erno Salminen, Ari Kulmala, Timo D. Hämäläinen |
HIBI-based multiprocessor SoC on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3351-3354, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Gustavo Pereira, Antonio Andrade Jr., Tiago R. Balen, Marcelo Lubaszewski, Florence Azaïs, Michel Renovell |
Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA, pp. 389-394, 2005, IEEE Computer Society, 0-7695-2314-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
FPAA testing, Mixed-signal test, interconnect testing, oscillation-based test |
16 | Ashok Narasimhan, Manish Kasotiya, Ramalingam Sridhar |
A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 634-639, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Chien-Ping Chang, Pao-Lien Lai, Jimmy J. M. Tan, Lih-Hsing Hsu |
Diagnosability of t-Connected Networks and Product Networks under the Comparison Diagnosis Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(12), pp. 1582-1590, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
comparison diagnosis model, t-diagnosable, order graph, connectivity, Diagnosability, product networks |
16 | Luciano Lenzini, Enzo Mingozzi, Giovanni Stea |
Eligibility-Based Round Robin for Fair and Efficient Packet Scheduling in Wormhole Switching Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 15(3), pp. 244-256, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
wormhole switching networks, quality of service, fairness, Packet scheduling |
16 | Aline Mello 0001, Leandro Möller, Ney Calazans, Fernando Gehm Moraes |
MultiNoC: A Multiprocessing System Enabled by a Network on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 234-239, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Jorji Nonaka, Nobuyuki Kukimoto, Naohisa Sakamoto, Hiroshi Hazama, Yasuhiro Watashiba, Xuezhen Liu, Masato Ogata, Masanori Kanazawa, Koji Koyamada |
Hybrid Hardware-Accelerated Image Composition for Sort-Last Parallel Rendering on Graphics Clusters with Commodity Image Compositor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VolVis ![In: 2004 IEEE Symposium on Volume Visualization and Graphics, VolVis 2004, Austin, TX, USA, October 10-12, 2004, pp. 17-24, 2004, IEEE Computer Society, 0-7803-8781-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Sort-Last, Hardware-Assisted, Cluster Computing, Parallel Rendering, Image Compositing |
16 | Sharad Jaiswal, Arnold L. Rosenberg, Donald F. Towsley |
Comparing the Structure of Power-Law Graphs and the Internet AS Graph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: 12th IEEE International Conference on Network Protocols (ICNP 2004), 5-8 October 2004, Berlin, Germany, pp. 294-303, 2004, IEEE Computer Society, 0-7695-2161-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
AS Graph, power-law graphs, Internet Topology |
16 | Mustafa Çakir, Eike Grimpe, Wolfgang Nebel |
HW-Driven Emulation with Automatic Interface Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 627-637, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | José Carlos Sancho, Juan Carlos Martínez, Antonio Robles, Pedro López 0001, José Flich, José Duato |
Performance Evaluation of COWs under Real Parallel Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 202, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
real parallel applications, routing algorithms, irregular topologies, execution-driven simulation, COWs |
16 | Douglas C. Sicker |
Applying a Layered Policy Model to IP Based Voice Services. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 36th Hawaii International Conference on System Sciences (HICSS-36 2003), CD-ROM / Abstracts Proceedings, January 6-9, 2003, Big Island, HI, USA, pp. 151, 2003, IEEE Computer Society, 0-7695-1874-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Partha Pratim Pande, Cristian Grecu, André Ivanov |
High-Throughput Switch-Based Interconnect for Future SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 304-310, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
SoC, Wormhole Routing, Virtual Channels, Interconnect Architecture |
16 | Dorothy Kucar, Anthony Vannelli |
InterconnectionModelling Using Distributed RLC Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 32-35, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Naotaka Ohsawa, Masanori Hariyama, Michitaka Kameyama |
High-Performance Field Programmable VLSI Processor Based on a Direct Allocation of a Control/Data Flow Graph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 25-26 April 2002, Pittsburgh, PA, USA, pp. 95-100, 2002, IEEE Computer Society, 0-7695-1486-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FPGA, Reconfigurable processor, Two-dimensional array, Bit-serial architecture |
16 | Carsten Trinitis, Martin Schulz 0001, Wolfgang Karl |
Boosting the Performance of Electromagnetic Simulations on a PC-Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 22-25 September 2002, Warsaw, Poland, pp. 369-374, 2002, IEEE Computer Society, 0-7695-1730-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Electric field simulation, High voltage engineering, SCI, Parallel Efficiency, Commodity clusters |
16 | Joo Beom Yun, Seong Tae Jhang, Chu Shik Jhon, Cheol Won Lee |
Analysis of System Performance by Changing the Ring Architecture on the Dual Ring CC-NUMA System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 9th International Conference on Parallel and Distributed Systems, ICPADS 2002, Taiwan, ROC, December 17-20, 2002, pp. 103-, 2002, IEEE Computer Society, 0-7695-1760-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen 0001 |
Parameter optimization tool for enhancing on-chip network performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 61-64, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | V. Srinivasan, Sriram Govindarajan, Ranga Vemuri |
Fine-grained and coarse-grained behavioral partitioning with effective utilization of memory and design space exploration for multi-FPGA architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(1), pp. 140-158, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Antonio Zenteno, Víctor H. Champac, Joan Figueras |
Detectability Conditions of Full Opens in the Interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(2), pp. 85-95, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
logic testing, IDDQ testing, opens, defect modeling |
16 | Mike Sheng, Jonathan Rose |
Mixing buffers and pass transistors in FPGA routing architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2001, Monterey, CA, USA, February 11-13, 2001, pp. 75-84, 2001, ACM, 1-58113-341-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Oliver Bringmann 0001, Wolfgang Rosenstiel, Carsten Menn |
Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 326-332, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka |
Intelligent EB Test System for Automatic VLSI Fault Tracing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 335-341, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
fault tracing, electron beam test system, fault tracing, VLSI, intelligent system |
16 | Pierpaolo Baglietto |
Euclidean Distance Transform on a Dedicated Architecture Based on a Reconfigurable Mesh Networ. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIAP ![In: 1oth International Conference on Image Analysis and Processing (ICIAP 1999), 27-29 September 1999, Venice, Italy, pp. 235-240, 1999, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Brian K. Schmidt, Monica S. Lam, J. Duane Northcutt |
The interactive performance of SLIM: a stateless, thin-client architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: Proceedings of the 17th ACM Symposium on Operating System Principles, SOSP 1999, Kiawah Island Resort, near Charleston, South Carolina, USA, December 12-15, 1999, pp. 32-47, 1999, ACM, 1-58113-140-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Chi-Chou Kao, Yen-Tai Lai |
A routability and performance driven technology mapping algorithm for LUT based FPGA designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 474-477, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Jianmin Li, Chung-Kuan Cheng |
Routability improvement using dynamic interconnect architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(3), pp. 498-501, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Ju Hwan Yi, Hoon Choi, In-Cheol Park, Seung Ho Hwang, Chong-Min Kyung |
Multiple Behavior Module Synthesis Based on Selective Groupings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 384-388, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Shiuann-Shiuh Lin, Yuh-Ju Lin, TingTing Hwang |
Net assignment for the FPGA-based logic emulation system in the folded-Clos network structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(3), pp. 316-320, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel |
Power/Performance Trade-offs for Direct Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PCRCW ![In: Parallel Computer Routing and Communication, Second International Workshop, PCRCW'97, Atlanta, Georgia, USA, June 26-27, 1997, Proceedings, pp. 231-246, 1997, Springer, 3-540-64571-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Fabrizio Petrini, Marco Vanneschi |
Network Performance under Physical Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 1997 International Conference on Parallel Processing (ICPP '97), August 11-15, 1997, Bloomington, IL, USA, Proceedings, pp. 34-43, 1997, IEEE Computer Society, 0-8186-8108-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Tadayoshi Horita, Itsuo Takanami |
A Polynomial Time Algorithm for Reconfiguring the 1 1/2 Track-Switch Model with PE and Bus faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1997 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '97), 18-20 December 1997, Taipei, Taiwan, pp. 16-22, 1997, IEEE Computer Society, 0-8186-8259-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
mesh arrays, the 1frac{1}{2} track-switch model, fault-tolerance, polynomial time algorithm, wafer scale integration |
16 | James M. Neighbors |
Finding Reusable Software Components in Large Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCRE ![In: 3rd Working Conference on Reverse Engineering, WCRE '96, Monterey, CA, USA, November 8-10, 1996, pp. 2-10, 1996, IEEE Computer Society, 0-8186-7674-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
component, reuse, subsystem |
16 | Jiao Fan, D. Zaleta, Chung-Kuan Cheng, S. H. Lee |
Physical models and algorithms for optoelectronic MCM layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(1), pp. 124-135, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
16 | Antonio González 0001, Miguel Valero-García, Luis Díaz de Cerio |
Executing Algorithms with Hypercube Topology on Torus Multicomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 6(8), pp. 803-814, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
scalable distributed memory multiprocessors, torus multicomputers, mapping of parallel algorithms, hypercubes, Graph embeddings |
16 | Somchai Prasitjutrakul, William J. Kubitz |
A performance-driven global router for custom VLSI chip design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(8), pp. 1044-1051, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
16 | Jeff Kramer, Jeff Magee, Morris Sloman |
Configuring distributed systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGOPS European Workshop ![In: Proceedings of the 5th ACM SIGOPS European Workshop: Models and Paradigms for Distributed Systems Structuring, 1992, Mont Saint-Michel, France, September 21-23, 1992, 1992, ACM. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
16 | Uma Bhattacharya, Swapan Bhattacharya |
Mapping of Fault-Tolerant Permutations in Omega. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCI ![In: Advances in Computing and Information - ICCI'91, International Conference on Computing and Information, Ottawa, Canada, May 27-29, 1991, Proceedings, pp. 628-639, 1991, Springer, 3-540-54029-6. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
16 | Matthias Passlack, Manfred Uhle, Horst Elschner |
Analysis of propagation delays in high-speed VLSI circuits using a distributed line model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(8), pp. 821-826, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
16 | Ishfaq Ahmad, Arif Ghafoor |
A semi distributed load balancing scheme for large multicomputer systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPDP ![In: Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, SPDP 1990, Dallas, Texas, USA, December 9-13, 1990., pp. 562-569, 1990, IEEE Computer Society, 0-8186-2087-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
16 | Goos Kant, Jan van Leeuwen |
The File Distribution Problem for Processor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWAT ![In: SWAT 90, 2nd Scandinavian Workshop on Algorithm Theory, Bergen, Norway, July 11-14, 1990, Proceedings, pp. 48-59, 1990, Springer, 3-540-52846-6. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
16 | Teresa H.-Y. Meng, Robert W. Brodersen, David G. Messerschmitt |
Automatic synthesis of asynchronous circuits from high-level specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(11), pp. 1185-1205, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
16 | James M. Purtilo |
MINION: An Environment to Organize Mathematical Problem Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSAC ![In: Proceedings of the ACM-SIGSAM 1989 International Symposium on Symbolic and Algebraic Computation, ISSAC '89, Portland, Oregon, USA, July 17-19, 1989, pp. 147-154, 1989, ACM, 0-89791-325-6. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
16 | Siamak Arya, Blaine Gaither |
Parallel algorithm development workbench. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '88, Orlando, FL, USA, November 12-17, 1988, pp. 11-17, 1988, IEEE Computer Society, 0-8186-0882-X. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
16 | Emilio Luque, Joan Sorribes, Ana Ripoll |
Tuning architecture at run-time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987, Colorado Springs, Colorado, USA, December 1-4, 1987, pp. 15-21, 1987, ACM/IEEE, 0-89791-250-0. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
16 | Johannes Milde, Thomas Plückebaum, Walter Ameling |
Synchronous Communication of Cooperating Processes in the M5PS Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONPAR ![In: CONPAR 86: Conference on Algorithms and Hardware for Parallel Processing, Aachen, Germany, September 17-19, 1986, Proceedings, pp. 142-148, 1986, Springer, 3-540-16811-7. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
16 | Laxmi N. Bhuyan, Dharma P. Agrawal |
Applications of SIMD computers in signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1982 National Computer Conference, 7-10 June, 1982, Houston, Texas, USA, pp. 135-142, 1982, AFIPS Press, 0-88283-035-X. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
|
16 | Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio |
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA, pp. 355-366, 2009, IEEE Computer Society, 978-1-4244-2932-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Gonzalo Zarza, Diego Lugones, Daniel Franco 0002, Emilio Luque |
A Multipath Fault-Tolerant Routing Method for High-Speed Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009. Proceedings, pp. 1078-1088, 2009, Springer, 978-3-642-03868-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Xiao Liu 0011, Qiang Xu 0001 |
Interconnection fabric design for tracing signals in post-silicon validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 352-357, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
trace-based debug, post-silicon validation |
16 | Sungjoon Jung, Tag Gon Kim |
An Operation and Interconnection Sharing Algorithm for Reconfiguration Overhead Reduction Using Static Partial Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(12), pp. 1589-1595, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Olav Lysne, Sven-Arne Reinemo, Tor Skeie, Åshild Grønstad Solheim, Thomas Sødring, Lars Paul Huse, Bjørn Dag Johnsen |
Interconnection Networks: Architectural Challenges for Utility Computing Data Centers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 41(9), pp. 62-69, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri |
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(9), pp. 1169-1181, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Fei Qiao, Huazhong Yang, Gang Huang, Hui Wang 0004 |
Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 51(7), pp. 975-984, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
low-swing interface, differential signaling, tapered-buffer, interconnect, asynchronous circuit, low power circuit |
16 | Po-Tsang Huang, Wei-Li Fang, Yin-Ling Wang, Wei Hwang |
Low Power and Reliable Interconnection with Self-Corrected Green Coding Scheme for Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 77-83, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
interconnnection, reliability, low power, network-on-chip |
16 | Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio |
Reducing the Interconnection Network Cost of Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 183-192, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Chip Multiprocessors, Deadlock, Router Design |
16 | Alessandro Astolfi, Romeo Ortega |
Interconnection and Damping Assignment Passivity-Based Control: Static vs dynamic state-feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDC ![In: Proceedings of the 47th IEEE Conference on Decision and Control, CDC 2008, December 9-11, 2008, Cancún, Mexico, pp. 4444-4447, 2008, IEEE, 978-1-4244-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Hongbing Fan, Jason Ernst, Yu-Liang Wu |
Customized Reconfigurable Interconnection Networks for multiple application SOCS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 491-494, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Bin Yao, Haisen S. Li, Tian Zhou 0002, Baowei Chen |
Theoretical Research on Topological Properties of Generalized K-Ary n-Cube Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 106-111, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Jung-Heum Park, Hee-Chul Kim, Hyeong-Seok Lim |
On the construction of paired many-to-many disjoint path covers in hypercube-like interconnection networks with faulty elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-8, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Zhengjia Wang, Yuhui Wang, Zhouping Yin |
A Multi-physics Simulation Based Parameters Optimization for Anisotropic Conductive Adhesive Interconnection in Electronic Packaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIRA (2) ![In: Intelligent Robotics and Applications, First International Conference, ICIRA 2008, Wuhan, China, October 15-17, 2008 Proceedings, Part II, pp. 896-905, 2008, Springer, 978-3-540-88516-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Anisotropic conductive adhesive (ACA), coupled field, multi-physics simulation, optimization, reliability |
16 | Seulki Lee, Jerald Yoo, Hoi-Jun Yoo |
A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1954-1957, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Hazem Moussa, Amer Baghdadi, Michel Jézéquel |
Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 97-100, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Guilherme Piêgas Koslovski, Pascale Vicat-Blanc Primet, Andrea Schwertner Charão |
VXDL: Virtual Resources and Interconnection Networks Description Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GridNets ![In: Networks for Grid Applications, Second International Conference, GridNets 2008, Beijing, China, October 8-10, 2008, Revised Selected Papers, pp. 138-154, 2008, Springer, 978-3-642-02079-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
virtual grids, network virtualization, description language |
16 | Cory Hawkins, Benjamin A. Small, D. Scott Wills, Keren Bergman |
The Data Vortex, an All Optical Path Multicomputer Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(3), pp. 409-420, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Optical switch fabrics, photonic packet switch, data vortex switch architecture, packet switching, optical switching |
16 | William J. Dally |
Enabling Technology for On-Chip Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 3, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Alejandro Martínez-Vicente, Pedro Javier García, Francisco José Alfaro, José L. Sánchez 0002, José Flich, Francisco J. Quiles 0001, José Duato |
Integrated QoS Provision and Congestion Management for Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2007, Parallel Processing, 13th International Euro-Par Conference, Rennes, France, August 28-31, 2007, Proceedings, pp. 837-847, 2007, Springer, 978-3-540-74465-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Torsten Hoefler, Andre Lichei, Wolfgang Rehm |
Low-Overhead LogGP Parameter Assessment for Modern Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Lei Wang 0017, Yaping Lin, Yonghe Liu |
Key Distribution for Group-based Sensor Deployment Using a Novel Interconnection Graph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOWMOM ![In: 2007 International Symposium on a World of Wireless, Mobile and Multimedia Networks (WoWMoM 2007), 18-21 June 2007, Helsinki, Finland, Proceedings, pp. 1-9, 2007, IEEE Computer Society, 1-4244-0992-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi |
A Reconfigurable Arithmetic Data-path Based On Regular Interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 342-349, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Aleksandr Rudkevich, Kaan Egilmez, Minghai Liu, Prashant Murti, Poonsaeng Visudhiphan, Richard Tabors, Thomas J. Overbye |
Identification and Congestion Analysis of Transmission Corridors of the Eastern Interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 40th Hawaii International International Conference on Systems Science (HICSS-40 2007), CD-ROM / Abstracts Proceedings, 3-6 January 2007, Waikoloa, Big Island, HI, USA, pp. 124, 2007, IEEE Computer Society, 0-7695-2755-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Ioannis Papaefstathiou, George Kornaros, Nikolaos Chrysos |
A buffered crossbar-based chip interconnection framework supporting quality of service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 90-95, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip interconnect, quality of service, system on chip, network on chip, multi-processor, buffered crossbar |
16 | Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh |
Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP). ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 24-27 October 2007, Gramado, RS, Brazil, pp. 211-218, 2007, IEEE Computer Society, 0-7695-3014-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Crispín Gómez Requena, María Engracia Gómez, Pedro López 0001, José Duato |
An Efficient Fault-Tolerant Routing Methodology for Fat-Tree Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: Parallel and Distributed Processing and Applications, 5th International Symposium, ISPA 2007, Niagara Falls, Canada, August 29-31, 2007, Proceedings, pp. 509-522, 2007, Springer, 978-3-540-74741-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Dimitris C. Vasiliadis, George E. Rizos, Costas Vassilakis |
Performance Analysis of dual priority single-buffered blocking Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNS ![In: Third International Conference on Networking and Services (ICNS 2007), June 19-25, 2007, Athens, Greece, pp. 60, 2007, IEEE Computer Society, 978-0-7695-2858-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Pedro Javier García, Francisco J. Quiles 0001, José Flich, José Duato, Ian Johnson, Finbar Naven |
Efficient, Scalable Congestion Management for Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(5), pp. 52-66, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Regional Explicit Congestion Notification (RECN), congestion management |
16 | Federico Quaglio, Fabrizio Vacca, Cristiano Castellano, Alberto Tarable, Guido Masera |
Interconnection framework for high-throughput, flexible LDPC decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 124-129, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Paulo S. Motta Pires, Luiz Affonso H. G. Oliveira |
Security Aspects of SCADA and Corporate Network Interconnection: An Overview. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DepCoS-RELCOMEX ![In: 2006 International Conference on Dependability of Computer Systems (DepCoS-RELCOMEX 2006), 24-28 May 2006, Szklarska Poreba, Poland, pp. 127-134, 2006, IEEE Computer Society, 0-7695-2565-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Shinyoung Lim, Abdelsalam Helal |
Encapsulation and Entity-Based Approach of Interconnection Between Sensor Platform and Middleware of Pervasive Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UCS ![In: Ubiquitous Computing Systems, Third International Symposium, UCS 2006, Seoul, Korea, October 11-13, 2006, Proceedings, pp. 500-515, 2006, Springer, 3-540-46287-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Hamed Nassar, Mohamed Ali Ahmed |
Performance Analysis of Finite Buffered Multistage Interconnection Networks Routing Two-Class Traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCC ![In: Proceedings of the 11th IEEE Symposium on Computers and Communications (ISCC 2006), 26-29 June 2006, Cagliari, Sardinia, Italy, pp. 668-674, 2006, IEEE Computer Society, 0-7695-2588-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Thomas Kuhn 0001, Philipp Becker |
A Simulator Interconnection Framework for the Accurate Performance Simulation of SDL Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAM ![In: System Analysis and Modeling: Language Profiles, 5th International Workshop, SAM 2006, Kaiserslautern, Germany, May 31 - June 2, 2006, Revised Selected Papers, pp. 133-147, 2006, Springer, 3-540-68371-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Michal P. Karpowicz, Krzysztof Malinowski 0001 |
Dynamic Resource Allocation Mechanism for Network Interconnection Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (3) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part III, pp. 791-798, 2006, Springer, 3-540-34383-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Mukesh Ranjan, Ranga Vemuri |
Exact hierarchical symbolic analysis of large analog networks using a general interconnection template. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis |
A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | George Jie Yuan, Nabil H. Farhat, Jan Van der Spiegel |
A CMOS monolithic implementation of a nonlinear interconnection module for a corticonic network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Jung-Heum Park, Hyeong-Seok Lim, Hee-Chul Kim |
Panconnectivity and Pancyclicity of Hypercube-Like Interconnection Networks with Faulty Elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA Workshops ![In: Frontiers of High Performance Computing and Networking - ISPA 2006 Workshops, ISPA 2006 International Workshops, FHPCN, XHPC, S-GRACE, GridGIS, HPC-GTP, PDCE, ParDMCom, WOMP, ISDF, and UPWN, Sorrento, Italy, December 4-7, 2006, Proceedings, pp. 291-300, 2006, Springer, 3-540-49860-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Carlos Eduardo da Silva, Adilson B. Lopes, Glêdson Elias da Silveira, Guido Lemos de Souza Filho, Maurício F. Magalhães |
A Component Interconnection Model for Interactive Digital Television Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (1) ![In: 20th International Conference on Advanced Information Networking and Applications (AINA 2006), 18-20 April 2006, Vienna, Austria, pp. 263-268, 2006, IEEE Computer Society, 0-7695-2466-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Nen-Chung Wang, Chih-Ping Chu |
An Efficient Tree-Based Multicasting Algorithm on Wormhole-Routed Star Graph Interconnection Networks Embedded with Hamiltonian Path. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 34(1), pp. 5-26, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
parallel computing, multicast, wormhole routing, star graphs, tree-based routing |
16 | José Duato, Ian Johnson, José Flich, Finbar Naven, Pedro Javier García, Teresa Nachiondo Frinós |
A New Scalable and Cost-Effective Congestion Management Strategy for Lossless Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 12-16 February 2005, San Francisco, CA, USA, pp. 108-119, 2005, IEEE Computer Society, 0-7695-2275-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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