Search results for "VTS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Haluk Konuk	DFT and Test Problems from the Trenches.	VTS	2009	DBLP DOI BibTeX RDF
1	Tao Xu 0002, Krishnendu Chakrabarty	Design-for-Testability for Digital Microfluidic Biochips.	VTS	2009	DBLP DOI BibTeX RDF
1	Hongxia Fang, Krishnendu Chakrabarty, Abhijit Jas, Srinivas Patil, Chandra Tirumurti	RT-Level Deviation-Based Grading of Functional Test Sequences.	VTS	2009	DBLP DOI BibTeX RDF
1	Hsiu-Ming Chang 0001, Chin-Hsuan Chen, Kuan-Yu Lin, Kwang-Ting Cheng	Calibration and Testing Time Reduction Techniques for a Digitally-Calibrated Pipelined ADC.	VTS	2009	DBLP DOI BibTeX RDF
1	Naveen Velamati, Robert Daasch	Analytical Model for Multi-site Efficiency with Parallel to Serial Test Times, Yield and Clustering.	VTS	2009	DBLP DOI BibTeX RDF
1	Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris	Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller.	VTS	2009	DBLP DOI BibTeX RDF
1	Bhanu Kapoor	Special Session 11C: Embedded Tutorial: System-on-a-Chip Power Management Implications on Validation and Testing.	VTS	2009	DBLP DOI BibTeX RDF
1	Livier Lizarraga, Salvador Mir, Gilles Sicard	Experimental Validation of a BIST Techcnique for CMOS Active Pixel Sensors.	VTS	2009	DBLP DOI BibTeX RDF
1	Julio César Vázquez, Víctor H. Champac, Chuck Hawkins, Jaume Segura 0001	Stuck-Open Fault Leakage and Testing in Nanometer Technologies.	VTS	2009	DBLP DOI BibTeX RDF
1	Thomas A. Ziaja, Poh J. Tan	Efficient Array Characterization in the UltraSPARC T2.	VTS	2009	DBLP DOI BibTeX RDF
1	Richard McLaughlin, Srikanth Venkataraman, Carlston Lim	Automated Debug of Speed Path Failures Using Functional Tests.	VTS	2009	DBLP DOI BibTeX RDF
1	Masayuki Arai, Akifumi Suto, Kazuhiko Iwasaki, Katsuyuki Nakano, Michihiro Shintani, Kazumi Hatayama, Takashi Aikyo	Small Delay Fault Model for Intra-Gate Resistive Open Defects.	VTS	2009	DBLP DOI BibTeX RDF
1	Chaoming Zhang, Ranjit Gharpurey, Jacob A. Abraham	On-Line Calibration and Power Optimization of RF Systems Using a Built-In Detector.	VTS	2009	DBLP DOI BibTeX RDF
1	Jianliang Gao, Yinhe Han 0001, Xiaowei Li 0001	A New Post-Silicon Debug Approach Based on Suspect Window.	VTS	2009	DBLP DOI BibTeX RDF
1	Davide Appello, Paolo Bernardi, Simone Gerardin, Michelangelo Grosso, Alessandro Paccagnella, Paolo Rech, Matteo Sonza Reorda	DfT Reuse for Low-Cost Radiation Testing of SoCs: A Case Study.	VTS	2009	DBLP DOI BibTeX RDF
1	Yuki Yoshikawa, Satoshi Ohtake, Tomoo Inoue, Hideo Fujiwara	A Synthesis Method to Alleviate Over-Testing of Delay Faults Based on RTL Don't Care Path Identification.	VTS	2009	DBLP DOI BibTeX RDF
1	Bernard Courtois, Chandu Visweswariah	Special Session 8: New Topics: At-Speed Testing in the Face of Process Variations.	VTS	2009	DBLP DOI BibTeX RDF
1	Ritesh P. Turakhia, Mark Ward, Sandeep Kumar Goel, Brady Benware	Bridging DFM Analysis and Volume Diagnostics for Yield Learning - A Case Study.	VTS	2009	DBLP DOI BibTeX RDF
1	Rudrajit Datta, Nur A. Touba	Exploiting Unused Spare Columns to Improve Memory ECC.	VTS	2009	DBLP DOI BibTeX RDF
1	Zhen Chen, Dong Xiang, Boxue Yin	The ATPG Conflict-Driven Scheme for High Transition Fault Coverage and Low Test Cost.	VTS	2009	DBLP DOI BibTeX RDF
1		27th IEEE VLSI Test Symposium, VTS 2009, May 3-7, 2009, Santa Cruz, California, USA	VTS	2009	DBLP BibTeX RDF
1	Dong Xiang, Boxue Yin, Kwang-Ting Cheng	Dynamic Test Compaction for Transition Faults in Broadside Scan Testing Based on an Influence Cone Measure.	VTS	2009	DBLP DOI BibTeX RDF
1	Yen-Tzu Lin, Chukwuemeka U. Ezekwe, Ronald D. Blanton	Physically-Aware N-Detect Test Relaxation.	VTS	2009	DBLP DOI BibTeX RDF
1	Erdem Serkan Erdogan, Sule Ozev	A Packet Based 2x-Site Test Solution for GSM Transceivers with Limited Tester Resources.	VTS	2009	DBLP DOI BibTeX RDF
1	Lin Xie, Azadeh Davoodi, Kewal K. Saluja, Abhishek A. Sinkar	False Path Aware Timing Yield Estimation under Variability.	VTS	2009	DBLP DOI BibTeX RDF
1	Kenneth Blakkan, Mani Soma	A Time Domain Method to Measure Oscillator Phase Noise.	VTS	2009	DBLP DOI BibTeX RDF
1	Sreekumar Menon, Adit D. Singh, Vishwani D. Agrawal	Output Hazard-Free Transition Delay Fault Test Generation.	VTS	2009	DBLP DOI BibTeX RDF
1	Unni Chandran, Dan Zhao	SS-KTC: A High-Testability Low-Overhead Scan Architecture with Multi-level Security Integration.	VTS	2009	DBLP DOI BibTeX RDF
1	Jaeyong Chung, Jacob A. Abraham	Recursive Path Selection for Delay Fault Testing.	VTS	2009	DBLP DOI BibTeX RDF
1	Haluk Konuk	Defect Detection Differences between Launch-Off-Shift and Launch-Off-Capture in Sense-Amplifier-Based Flip-Flop Testing.	VTS	2009	DBLP DOI BibTeX RDF
1	Kee Sup Kim	Panel: Apprentice - VTS Edition: Season 2.	VTS	2009	DBLP DOI BibTeX RDF
1	Gaetan Canivet, Régis Leveugle, Jessy Clédière, Frédéric Valette, Marc Renaudin	Characterization of Effective Laser Spots during Attacks in the Configuration of a Virtex-II FPGA.	VTS	2009	DBLP DOI BibTeX RDF
1	Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu	An Adaptive-Rate Error Correction Scheme for NAND Flash Memory.	VTS	2009	DBLP DOI BibTeX RDF
1	Grzegorz Mrugalski, Nilanjan Mukherjee 0001, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer	Highly X-Tolerant Selective Compaction of Test Responses.	VTS	2009	DBLP DOI BibTeX RDF
1	Zheng Wang, Duncan M. Hank Walker	Compact Delay Test Generation with a Realistic Low Cost Fault Coverage Metric.	VTS	2009	DBLP DOI BibTeX RDF
1	Kay Suenaga, Sebastià A. Bota, Rodrigo Picos, Eugeni Isern 0001, Miquel Roca 0001, Eugenio García-Moreno	Predictive Test Technique for Diagnosis of RF CMOS Receivers.	VTS	2009	DBLP DOI BibTeX RDF
1	Xiaochun Yu, Yen-Tzu Lin, Wing Chiu Tam, Osei Poku, Ronald D. Blanton	Controlling DPPM through Volume Diagnosis.	VTS	2009	DBLP DOI BibTeX RDF
1	Edward Flanigan, Spyros Tragoudas, Arkan Abdulrahman	Scalable Compact Test Pattern Generation for Path Delay Faults Based on Functions.	VTS	2009	DBLP DOI BibTeX RDF
1	Ajay Khoche, Jay Katz, Sauro Landini, Kochen Liao, Neetu Agrawal, Glenn Plowman, Songlin Zuo, Liyang Lai, John Rowe, Thomas Zanon	STDF Memory Fail Datalog Standard.	VTS	2009	DBLP DOI BibTeX RDF
1	Sounil Biswas, Ronald D. Blanton	Maintaining Accuracy of Test Compaction through Adaptive Re-learning.	VTS	2009	DBLP DOI BibTeX RDF
1	Arani Sinha, Amitava Majumdar 0002, Vasu Ganti	Panel: Analog Characterization and Test: The Long Road to Realization.	VTS	2009	DBLP DOI BibTeX RDF
1	Yiorgos Makris, Haralampos-G. D. Stratigopoulos	Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest.	VTS	2009	DBLP DOI BibTeX RDF
1	Saeed Shamshiri, Kwang-Ting Cheng	Yield and Cost Analysis of a Reliable NoC.	VTS	2009	DBLP DOI BibTeX RDF
1	Junxia Ma, Jeremy Lee, Mohammad Tehranipoor	Layout-Aware Pattern Generation for Maximizing Supply Noise Effects on Critical Paths.	VTS	2009	DBLP DOI BibTeX RDF
1	Anshuman Chandra, Rohit Kapur	Bounded Adjacent Fill for Low Capture Power Scan Testing.	VTS	2008	DBLP DOI BibTeX RDF	capture power, random fill, shift power, test, low power, scan
1	Desta Tadesse, R. Iris Bahar, Joel Grodstein	Fast Measurement of the "Non-Deterministic Zone" in Microprocessor Debug Using Maximum Likelihood Estimation.	VTS	2008	DBLP DOI BibTeX RDF	Microprocessor Diagnosis, Pass/Fail Region, Maximum Likelihood Estimation, Silicon Debug
1	Joonsung Park, Hongjoong Shin, Jacob A. Abraham	Parallel Loopback Test of Mixed-Signal Circuits.	VTS	2008	DBLP DOI BibTeX RDF	Test Quality and Reliability, Loopback Test, Characterization, Mixed-signal Test, Parallel Test
1	Rajarajan Senguttuvan, Soumendu Bhattacharya, Abhijit Chatterjee	Fast Accurate Tests for Multi-Carrier Transceiver Specifications: EVM and Noise.	VTS	2008	DBLP DOI BibTeX RDF	communication systems, test time, manufacturing testing
1	Sudarshan Bahukudumbi, Krishnendu Chakrabarty	Test-Pattern Ordering for Wafer-Level Test-During-Burn-In.	VTS	2008	DBLP DOI BibTeX RDF	wafer-level, pattern ordering, burn-in
1	Vishwanath Natarajan, Rajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee	ACT: Adaptive Calibration Test for Performance Enhancement and Increased Testability of Wireless RF Front-Ends.	VTS	2008	DBLP DOI BibTeX RDF	ACT, loopback, loop-back, adaptive, testing, calibration, compensation
1	Muhammad Mudassar Nisar, Abhijit Chatterjee	Test Enabled Process Tuning for Adaptive Baseband OFDM Processor.	VTS	2008	DBLP DOI BibTeX RDF	Adaptive Signal Scaling, Timing test, Low power, OFDM
1	I-De Huang, Yi-Shing Chang, Sandeep K. Gupta 0001, Sreejit Chakravarty	An Industrial Case Study of Sticky Path-Delay Faults.	VTS	2008	DBLP DOI BibTeX RDF	sticky paths, timing false paths, path reprioritization, delay testing, test quality
1	Intaik Park, Donghwi Lee, Erik Chmelar, Edward J. McCluskey	Inconsistent Fail due to Limited Tester Timing Accuracy.	VTS	2008	DBLP DOI BibTeX RDF	inconsistent fail, tester timing accuracy, tester EPA, delay test, inconsistency
1	Dongwoo Hong, Kwang-Ting (Tim) Cheng	Bit-Error Rate Estimation for Bang-Bang Clock and Data Recovery Circuit in High-Speed Serial Links.	VTS	2008	DBLP DOI BibTeX RDF	Bang-Bang CDR, BER Estimation
1	Sunghoon Chun, Taejin Kim, YongJoon Kim, Sungho Kang 0001	An Efficient Scan Chain Diagnosis Method Using a New Symbolic Simulation.	VTS	2008	DBLP DOI BibTeX RDF	Scan chain based test, Diagnosis, Symbolic Simulation
1	Rajesh Tiwari, Abhijeet Shrivastava, Mahit Warhadpande, Srivaths Ravi 0001, Rubin A. Parekhji	A Regression Based Technique for ATE-Aware Test Data Volume Estimation of System-on-Chips.	VTS	2008	DBLP DOI BibTeX RDF	Tester, ATPG, Estimation, ATE, Test Time, Test Data Volume
1	Manoj Kumar Goparaju, Spyros Tragoudas	A Novel ATPG Framework to Detect Weight Related Defects in Threshold Logic Gates.	VTS	2008	DBLP DOI BibTeX RDF	Weght defects, ATPG, Threshold logic, Parametric faults
1	Sounil Biswas, R. D. (Shawn) Blanton	Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data.	VTS	2008	DBLP DOI BibTeX RDF	pass-fail test data, boolean minimization, minimum constrained subset cover, Mixed-signal test, test compaction
1	Zheng Wang, D. M. H. Walker	Dynamic Compaction for High Quality Delay Test.	VTS	2008	DBLP DOI BibTeX RDF	dynamic compaction, test generation, delay test, path delay fault
1	François-Fabien Ferhani, Nirmal R. Saxena, Edward J. McCluskey, Phil Nigh	How Many Test Patterns are Useless?	VTS	2008	DBLP DOI BibTeX RDF	Test Patterns, Test Economics, Truncation
1	Kyriakos Christou, Maria K. Michael, Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez 0001, Matteo Sonza Reorda	A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.	VTS	2008	DBLP DOI BibTeX RDF	SBST, path-delay faults, microprocessor test
1	Carlos Arthur Lang Lisbôa, Costas Argyrides, Dhiraj K. Pradhan, Luigi Carro	Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms.	VTS	2008	DBLP DOI BibTeX RDF	radiation effects, long transients, recomputation granularity, fault tolerance
1	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman	Full Open Defects in Nanometric CMOS.	VTS	2008	DBLP DOI BibTeX RDF	interconnect open, gate leakage current, CMOS
1	Byoungho Kim, Nash Khouzam, Jacob A. Abraham	Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal Circuits.	VTS	2008	DBLP DOI BibTeX RDF	Loopback Test, Aperture Jitter, Digital-to-Analog Converter, Analog-to-Digital Converter, ADC, Mixed-Signal Testing, DAC
1	Elif Alpaslan, Yu Huang 0005, Xijiang Lin, Wu-Tung Cheng, Jennifer Dworak	Reducing Scan Shift Power at RTL.	VTS	2008	DBLP DOI BibTeX RDF	Test Power Reduction, Power-Sensitive Scan Cell, RTL DFT, Timing Closure, Scan Based Test
1	Yao-Hsin Chou, Sy-Yen Kuo, I-Ming Tsai	QBIST: Quantum Built-in Self-Test for any Boolean Circuit.	VTS	2008	DBLP DOI BibTeX RDF
1	Ming-Chien Tsai, Ching-Hwa Cheng, Chiou-Mao Yang	An All-Digital High-Precision Built-In Delay Time Measurement Circuit.	VTS	2008	DBLP DOI BibTeX RDF
1	Apurva Mishra, Mani Soma	A Time-Domain Method for Pseudo-Spectral Characterization.	VTS	2008	DBLP DOI BibTeX RDF	bist, analog test, mixed-signal test, fft
1	Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu	A General Failure Candidate Ranking Framework for Silicon Debug.	VTS	2008	DBLP DOI BibTeX RDF	Silicon Debug
1	Uranmandakh Amgalan, Christian Hachmann, Sybille Hellebrand, Hans-Joachim Wunderlich	Signature Rollback - A Technique for Testing Robust Circuits.	VTS	2008	DBLP DOI BibTeX RDF	Rollback and Recovery, Test Quality and Reliability, Robust Design, Time Redundancy, Embedded Test
1		26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA	VTS	2008	DBLP BibTeX RDF
1	Niladri Narayan Mojumder, Saibal Mukhopadhyay, Jae-Joon Kim, Ching-Te Chuang, Kaushik Roy 0001	Design and Analysis of a Self-Repairing SRAM with On-Chip Monitor and Compensation Circuitry.	VTS	2008	DBLP DOI BibTeX RDF	Design, yield, failure, SRAM, variation
1	Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker 0001, Martin Keim, Wu-Tung Cheng	Automatic Test Pattern Generation for Interconnect Open Defects.	VTS	2008	DBLP DOI BibTeX RDF	Interconnect opens, Open-via defects, ATPG
1	Ritesh Garg, Richard Putman, Nur A. Touba	Increasing Output Compaction in Presence of Unknowns Using an X-Canceling MISR with Deterministic Observation.	VTS	2008	DBLP DOI BibTeX RDF	X-tolerant, Linear Compression, Gaussian Elimination, Response Compaction
1	Jeremy Lee, Mohammad Tehranipoor	LS-TDF: Low-Switching Transition Delay Fault Pattern Generation.	VTS	2008	DBLP DOI BibTeX RDF
1	Zhaoliang Pan, Melvin A. Breuer	Basing Acceptable Error-Tolerant Performance on Significance-Based Error-rate (SBER).	VTS	2008	DBLP DOI BibTeX RDF	error-significance, SBER, error-rate, error-tolerance
1	Alexandre Ney, Patrick Girard 0001, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin	An SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing.	VTS	2008	DBLP DOI BibTeX RDF	write driver, design-for-diagnosis, diagnosis, SRAM
1	King Leong Lee, Nadir Z. Basturkmen, Srikanth Venkataraman	Diagnosis of Scan Clock Failures.	VTS	2008	DBLP DOI BibTeX RDF	scan clock, diagnosis, scan chain
1	Jaekwang Lee, Intaik Park, Edward J. McCluskey	Error Sequence Analysis.	VTS	2008	DBLP DOI BibTeX RDF
1	Rajamani Sethuram, Michael L. Bushnell, Vishwani D. Agrawal	Fault Nodes in Implication Graph for Equivalence/Dominance Collapsing, and Identifying Untestable and Independent Faults.	VTS	2008	DBLP DOI BibTeX RDF	Diagnosis, ATPG, Fault Model, Fault Collapsing, Implication Graph
1	Joon-Sung Yang, Nur A. Touba	Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture.	VTS	2008	DBLP DOI BibTeX RDF	Trace Buffer Observation Window, Two-Dimensional (2-D) Compaction, Cycling Register, Silicon Debug, MISR
1	Yu-Ze Wu, Mango Chia-Tso Chao	Scan-Chain Reordering for Minimizing Scan-Shift Power Based on Non-Specified Test Cubes.	VTS	2008	DBLP DOI BibTeX RDF	signal transitions, correlation, reordering, scan-chain
1	Tze Wee Chen, Kyunglok Kim, Young Moon Kim, Subhasish Mitra	Gate-Oxide Early Life Failure Prediction.	VTS	2008	DBLP DOI BibTeX RDF
1	Chaoming Zhang, Ranjit Gharpurey, Jacob A. Abraham	Low Cost RF Receiver Parameter Measurement with On-Chip Amplitude Detectors.	VTS	2008	DBLP DOI BibTeX RDF	Amplitude detector, RF detector, RF receiver, Built-in test, RF test
1	Qingqi Dou, Jacob A. Abraham	Low-cost Test of Timing Mismatch Among Time-Interleaved A/D Converters in High-speed Communication Systems.	VTS	2008	DBLP DOI BibTeX RDF	Time-Interleaved ADC, Timing Mismatch, Mixed-signal testing, Low-cost test, High speed testing
1	Masoud Hashempour, Zahra Mashreghian Arani, Fabrizio Lombardi	A Metric for Assessing the Error Tolerance of Tile Sets for Punctured DNA Self-Assemblies.	VTS	2008	DBLP DOI BibTeX RDF	Puncturing, Error Tolerance, DNA Self-Assembly
1	Irith Pomeranz, Sudhakar M. Reddy	Expanded Definition of Functional Operation Conditions and its Effects on the Computation of Functional Broadside Tests.	VTS	2008	DBLP DOI BibTeX RDF	functional broadside tests, test generation, transition faults, reachable states, full-scan circuits
1	Fan Yang 0060, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz	On the Detectability of Scan Chain Internal Faults - An Industrial Case Study.	VTS	2008	DBLP DOI BibTeX RDF	Faults in scan cells, stuck-at and stuck-on faults
1	Michael Nicolaidis, Renaud Perez, Dan Alexandrescu	Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors.	VTS	2008	DBLP DOI BibTeX RDF	radiation hardened cells, soft errors, SEUs
1	Minjin Zhang, Huawei Li 0001, Xiaowei Li 0001	Multiple Coupling Effects Oriented Path Delay Test Generation.	VTS	2008	DBLP DOI BibTeX RDF	crosstalk, delay test, path delay fault
1	Irith Pomeranz, Sudhakar M. Reddy	Synthesis for Broadside Testability of Transition Faults.	VTS	2008	DBLP DOI BibTeX RDF	broadside tests, standard scan, transition faults, test synthesis, full-scan circuits
1	Erdem Serkan Erdogan, Sule Ozev	Single-Measurement Diagnostic Test Method for Parametric Faults of I/Q Modulating RF Transceivers.	VTS	2008	DBLP DOI BibTeX RDF	RF Transceivers, I/Q modulation, I/Q mismatch, Time skew
1	Ying Zhang 0040, Huawei Li 0001, Xiaowei Li 0001, Yu Hu 0001	Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects.	VTS	2008	DBLP DOI BibTeX RDF	Codeword Selection, Crosstalk Avoidance, Reliable Bus
1	Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian	An Efficient March-Based Three-Phase Fault Location and Full Diagnosis Algorithm for Realistic Two-Operation Dynamic Faults in Random Access Memories.	VTS	2008	DBLP DOI BibTeX RDF	localization, diagnosis, detection, fault, march test
1	Stelios Neophytou, Maria K. Michael	On the Relaxation of n-detect Test Sets.	VTS	2008	DBLP DOI BibTeX RDF	N-detect, test set relaxation
1	Chen-Wei Lin, Jiun-Lang Huang	A Built-In TFT Array Charge-Sensing Technique for System-on-Panel Displays.	VTS	2008	DBLP DOI BibTeX RDF	TFT array, charge sensing, system-on-panel, built-in self-test, LTPS
1	Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor	Test-Pattern Grading and Pattern Selection for Small-Delay Defects.	VTS	2008	DBLP DOI BibTeX RDF	Small-delay defects, pattern grading, pattern selection, ATPG
1	Emil Gizdarski	Constructing Augmented Multimode Compactors.	VTS	2008	DBLP DOI BibTeX RDF	on-chip compression, array codes, linear codes, test data compression
1	James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark A. Reed, Yiorgos Makris	A Statistical Approach to Characterizing and Testing Functionalized Nanowires.	VTS	2008	DBLP DOI BibTeX RDF	testing, statistical analysis, nanowires
1	Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram	Supply Voltage Noise Aware ATPG for Transition Delay Faults.	VTS	2007	DBLP DOI BibTeX RDF

Publications at "VTS"( http://dblp.L3S.de/Venues/VTS )