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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 14306 occurrences of 4820 keywords
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Results
Found 45278 publication records. Showing 45278 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
19 | Srinivas Katkoori, Nand Kumar, Ranga Vemuri |
High level profiling based low power synthesis technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 446-453, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high level profiling based low power synthesis technique, average switching capacitance, user-specified set, switching capacitance, VLSI, delay, logic design, power estimation, area |
19 | Yen-Min Huang, Chinya V. Ravishankar |
Designing an Agent Synthesis System for Cross-RPC Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 20(3), pp. 188-198, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
agent synthesis system, cross-RPC communication, RPC protocols, large heterogeneous environment, RPC agents, RPC heterogeneities, agent development costs, cross-RPC performance, distributed systems, parallel programming, protocols, rapid prototyping, software prototyping, remote procedure calls, remote procedure call, telecommunications computing, transport layer, maintenance costs |
19 | Sanghoon Sull, Narendra Ahuja |
Integrated 3-D Analysis and Analysis-Guided Synthesis of Flight Image Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 16(4), pp. 357-372, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
3-D analysis, analysis-guided synthesis, flight image sequences, 3-D motion, point features, texture gradient, vanishing line, planar textured surface, sequential batch method, image attributes, binocular sequence, synthetic sequence, workstation monitor, performance evaluation, optimization, image segmentation, motion estimation, image sequences, optical flow, lines, monocular image sequence, motion recovery, multiple cues |
19 | Bapiraju Vinnakota, Niraj K. Jha |
Synthesis of Algorithm-Based Fault-Tolerant Systems from Dependence Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(8), pp. 864-874, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
algorithm-based fault-tolerant systems, computation-intensive tasks, ABFT scheme, synthesis method, fault-tolerant median filter, reliability, graph theory, parallel architectures, fault tolerant computing, dependence graphs, parallelarchitectures |
19 | Zohar Manna, Richard J. Waldinger |
Fundamentals of Deductive Program Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 18(8), pp. 674-704, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
deductive program synthesis, deductive-tableau system, theorem-proving framework, nonclausal resolution rule, induction rule, formal specification, artificial intelligence, specification, theorem proving, program testing, reasoning, inference mechanisms, proof |
19 | Jarke J. van Wijk |
Spot noise texture synthesis for data visualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGGRAPH ![In: Proceedings of the 18th Annual Conference on Computer Graphics and Interactive Techniques, SIGGRAPH 1991, Providence, RI, USA, April 27-30, 1991, pp. 309-318, 1991, ACM, 0-89791-436-8. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
scientific visualization, texture synthesis, fractals, flow visualization, particle systems |
19 | Jayanth V. Rajan, Donald E. Thomas |
Synthesis by delayed binding of decisions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985., pp. 367-373, 1985, ACM, 0-8186-0635-5. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
behavioral partioning, synthesis, automatic design |
19 | Sebastián Uchitel, Greg Brunet, Marsha Chechik |
Synthesis of Partial Behavior Models from Properties and Scenarios. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 35(3), pp. 384-406, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Anthony C. Robinson |
Needs Assessment for the Design of Information Synthesis Visual Analytics Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IV ![In: 13th International Conference on Information Visualisation, IV 2009, 15-17 July 2009, Barcelona, Spain, pp. 353-360, 2009, IEEE Computer Society, 978-0-7695-3733-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Feng Wang 0004, Yuan Xie 0001, Andrés Takach |
Variation-aware resource sharing and binding in behavioral synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 79-84, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Sandip Ray, Kecheng Hao, Yan Chen 0001, Fei Xie, Jin Yang 0006 |
Formal Verification for High-Assurance Behavioral Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis, 7th International Symposium, ATVA 2009, Macao, China, October 14-16, 2009. Proceedings, pp. 337-351, 2009, Springer, 978-3-642-04760-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Yoad Lustig, Moshe Y. Vardi |
Synthesis from Component Libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FoSSaCS ![In: Foundations of Software Science and Computational Structures, 12th International Conference, FOSSACS 2009, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009, York, UK, March 22-29, 2009. Proceedings, pp. 395-409, 2009, Springer, 978-3-642-00595-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Vyas Krishnan, Srinivas Katkoori |
Simultaneous Peak Temperature and Average Power Minimization during Behavioral Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 419-424, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Gabriel Recatalá, Eris Chinellato, Angel P. del Pobil, Youcef Mezouar, Philippe Martinet |
Biologically-inspired 3D grasp synthesis based on visual exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Auton. Robots ![In: Auton. Robots 25(1-2), pp. 59-70, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Biologically-inspired robots, Models of human manipulation, Grasping/dexterous manipulation, Active perception, Robot vision |
19 | Sushanta K. Mandal, Shamik Sural, Amit Patra |
ANN- and PSO-Based Synthesis of On-Chip Spiral Inductors for RF ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1), pp. 188-192, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Gülin Tulunay, Sina Balkir |
A Synthesis Tool for CMOS RF Low-Noise Amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(5), pp. 977-982, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Tao Xu 0002, Krishnendu Chakrabarty |
Integrated droplet routing and defect tolerance in the synthesis of digital microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 4(3), pp. 11:1-11:24, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Physical design automation, microfluidics, biochips, module placement |
19 | Roberto Costantini, Luciano Sbaiz, Sabine Süsstrunk |
Higher Order SVD Analysis for Dynamic Texture Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 17(1), pp. 42-52, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Hsien-I Lin, C. S. George Lee |
Self-organizing skill synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2008 IEEE/RSJ International Conference on Intelligent Robots and Systems, September 22-26, 2008, Acropolis Convention Center, Nice, France, pp. 828-833, 2008, IEEE, 978-1-4244-2057-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Feng Wang 0004, Guangyu Sun 0003, Yuan Xie 0001 |
A Variation Aware High Level Synthesis Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1063-1068, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Sharareh Zamanzadeh, Mohammad Mirza-Aghatabar, Mehrdad Najibi, Hossein Pedram, Abolghasem Sadeghi |
Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 290-297, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Morteza Damavandpeyma, Siamak Mohammadi |
Architectural Synthesis with Control Data Flow Extraction toward an Asynchronous CAD Tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 857-864, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Chia-Ming Cheng, Shu-Jyuan Lin, Shang-Hong Lai, Jinn-Cherng Yang |
Improved novel view synthesis from depth image with large baseline. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPR ![In: 19th International Conference on Pattern Recognition (ICPR 2008), December 8-11, 2008, Tampa, Florida, USA, pp. 1-4, 2008, IEEE Computer Society, 978-1-4244-2175-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Junyu Dong, Yuanxu Duan, Guimei Sun, Lin Qi 0004 |
Texture synthesis by Support Vector Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPR ![In: 19th International Conference on Pattern Recognition (ICPR 2008), December 8-11, 2008, Tampa, Florida, USA, pp. 1-4, 2008, IEEE Computer Society, 978-1-4244-2175-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Huan Ren, Shantanu Dutt |
Algorithms for simultaneous consideration of multiple physical synthesis transforms for timing closure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 93-100, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Fanghua Liu, Hongtao Wu, Lüzhong Ma |
Intellectualized Structural Synthesis and Classification of the 3-DOF Space Parallel Robot Mechanisms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIRA (2) ![In: Intelligent Robotics and Applications, First International Conference, ICIRA 2008, Wuhan, China, October 15-17, 2008 Proceedings, Part II, pp. 1096-1104, 2008, Springer, 978-3-540-88516-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Parallel robot mechanisms, Single open chain limb |
19 | Sen Wang, Xianfeng David Gu, Hong Qin 0001 |
Automatic non-rigid registration of 3D dynamic data for facial expression synthesis and transfer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CVPR ![In: 2008 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR 2008), 24-26 June 2008, Anchorage, Alaska, USA, 2008, IEEE Computer Society, 978-1-4244-2242-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Ting Liu 0007, Camel Tanougast, Serge Weber |
A framework of architectural synthesis for dynamically reconfigurable FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 283-286, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Palle Dahlstedt |
Dynamic Mapping Strategies for Expressive Synthesis Performance and Improvisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CMMR ![In: Computer Music Modeling and Retrieval. Genesis of Meaning in Sound and Music, 5th International Symposium, CMMR 2008, Copenhagen, Denmark, May 19-23, 2008, Revised Papers, pp. 227-242, 2008, Springer, 978-3-642-02517-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Yulia Korukhova |
An approach to automatic deductive synthesis of functional programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Math. Artif. Intell. ![In: Ann. Math. Artif. Intell. 50(3-4), pp. 255-271, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Mathematics Subject Classification 68T20 |
19 | Antonio Criminisi, Andrew Blake 0001, Carsten Rother, Jamie Shotton, Philip H. S. Torr |
Efficient Dense Stereo with Occlusions for New View-Synthesis by Four-State Dynamic Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Vis. ![In: Int. J. Comput. Vis. 71(1), pp. 89-110, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dense stereo, gaze correction, image-based rendering, video-conferencing |
19 | Takao Konishi, Naohiro Hamada, Hiroshi Saito |
A Control Circuit Synthesis Method for Asynchronous Circuits in Bundled-Data Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: Seventh International Conference on Computer and Information Technology (CIT 2007), October 16-19, 2007, University of Aizu, Fukushima, Japan, pp. 847-852, 2007, IEEE Computer Society, 978-0-7695-2983-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Xiao Xiao Hu, Hongjie Zhang, Zhu Liang Yu, Meng Hwa Er |
Pattern Synthesis via Convex Optimization for Microphone Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SiPS ![In: Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings, October 17-19, 2007, Eton Hotel, Shanghai, China, pp. 548-551, 2007, IEEE, 1-4244-1222-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li 0001, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz |
The nuts and bolts of physical synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), Austin, Texas, USA, March 17-18, 2007, Proceedings, pp. 89-94, 2007, ACM, 978-1-59593-622-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Fan Yang 0001, Xuan Zeng 0001, Yangfeng Su, Dian Zhou |
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2710-2713, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Cong Zhang, Amol Bakshi, Viktor K. Prasanna |
ModelML: a Markup Language for Automatic Model Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRI ![In: Proceedings of the IEEE International Conference on Information Reuse and Integration, IRI 2007, 13-15 August 2007, Las Vegas, Nevada, USA, pp. 317-322, 2007, IEEE Systems, Man, and Cybernetics Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Sebastián Uchitel, Greg Brunet, Marsha Chechik |
Behaviour Model Synthesis from Properties and Scenarios. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 29th International Conference on Software Engineering (ICSE 2007), Minneapolis, MN, USA, May 20-26, 2007, pp. 34-43, 2007, IEEE Computer Society, 0-7695-2828-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Zdenek Krnoul, Milos Zelezný |
Translation and Conversion for Czech Sign Speech Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TSD ![In: Text, Speech and Dialogue, 10th International Conference, TSD 2007, Pilsen, Czech Republic, September 3-7, 2007, Proceedings, pp. 524-531, 2007, Springer, 978-3-540-74627-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Chunpeng Li, Shihong Xia, Zhaoqi Wang |
Pose Synthesis Using the Inverse of Jacobian Matrix Learned from Examples. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VR ![In: IEEE Virtual Reality Conference, VR 2007, 10-14 March 2007, Charlotte, NC, USA, Proceedings, pp. 99-106, 2007, IEEE Computer Society, 1-4244-0905-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Pallav Gupta, Abhinav Agrawal 0002, Niraj K. Jha |
An Algorithm for Synthesis of Reversible Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11), pp. 2317-2330, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Arthur Nieuwoudt, Yehia Massoud |
Variability-Aware Multilevel Integrated Spiral Inductor Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12), pp. 2613-2625, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Hua Tang, Hui Zhang 0057, Alex Doboli |
Refinement-based synthesis of continuous-time analog filters through successive domain pruning, plateau search, and adaptive sampling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8), pp. 1421-1440, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Christof Faller |
Parametric multichannel audio coding: synthesis of coherence cues. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Speech Audio Process. ![In: IEEE Trans. Speech Audio Process. 14(1), pp. 299-310, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Wei-Chen Chang, Alvin Wen-Yu Su |
A Multichannel Recurrent Network Analysis/Synthesis Model for Coupled-String Instruments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Speech Audio Process. ![In: IEEE Trans. Speech Audio Process. 14(6), pp. 2233-2241, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Gaurav Singh 0006, Sandeep K. Shukla |
Low-power hardware synthesis from TRS-based specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 49-58, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Pre-synthesis optimization of multiplications to improve circuit performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1306-1311, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Function Call Optimization in Behavioral Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 522-529, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Sven Schewe |
Synthesis for Probabilistic Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis, 4th International Symposium, ATVA 2006, Beijing, China, October 23-26, 2006., pp. 245-259, 2006, Springer, 3-540-47237-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Sujan Pandey, Manfred Glesner |
Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | George Economakos |
Behavioral synthesis with SystemC and PSL assertions for interface specification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Zhigang Gao, Zhaohui Wu 0001, Hong Li |
Implementation Synthesis of Embedded Software Under Operating Systems Supporting the Hybrid Scheduling Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2006, Seoul, Korea, August 1-4, 2006, Proceedings, pp. 426-436, 2006, Springer, 3-540-36679-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Renqiu Huang, Ranga Vemuri |
Transformation synthesis for data intensive applications to FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 349-352, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 473-476, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jung-Lin Yang, Hsu-Ching Tien, Chia-Ming Hsu, Sung-Min Lin |
High-Level Synthesis for Self-Timed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1410-1413, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Nattawut Thepayasuwan, Alex Doboli |
Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(5), pp. 525-538, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller |
Toffoli network synthesis with templates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6), pp. 807-817, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Darko Kirovski, Milenko Drinic, Miodrag Potkonjak |
Engineering change protocols for behavioral and system synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(8), pp. 1145-1155, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Mariam Momenzadeh, Jing Huang 0001, Mehdi Baradaran Tahoori, Fabrizio Lombardi |
Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(12), pp. 1881-1893, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Hiroshi Kawasaki, Kyoung-Dae Seo, Yutaka Ohsawa, Ryo Furukawa 0001 |
Patch-based BTF synthesis for real-time rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (1) ![In: Proceedings of the 2005 International Conference on Image Processing, ICIP 2005, Genoa, Italy, September 11-14, 2005, pp. 393-396, 2005, IEEE, 0-7803-9134-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Toshihisa Tanaka |
Optimal design for synthesis filters of oversampled uniform perfect reconstruction filter banks with 50% overlapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (1) ![In: Proceedings of the 2005 International Conference on Image Processing, ICIP 2005, Genoa, Italy, September 11-14, 2005, pp. 477-480, 2005, IEEE, 0-7803-9134-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Francisco-Javier Veredas, Jordi Carrabina |
Power Dissipation Impact of the Technology Mapping Synthesis on Look-Up Table Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 666-673, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Huiying Yang, Anuradha Agarwal, Ranga Vemuri |
Fast Analog Circuit Synthesis Using Multiparameter Sensitivity Analysis Based on Element-Coefficient Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 71-76, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Raoul F. Badaoui, Ranga Vemuri |
Multi-Placement Structures for Fast and Optimized Placement in Analog Circuit Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 138-143, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Eddie Cooke, Noel E. O'Connor |
Scalable Virtual Viewpoint Image Synthesis for Multiple Camera Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IV ![In: 9th International Conference on Information Visualisation, IV 2005, 6-8 July 2005, London, UK, pp. 393-397, 2005, IEEE Computer Society, 0-7695-2397-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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19 | Leonardo Amorim, Raimundo S. Barreto, Paulo Romero Martins Maciel, Eduardo Tavares, Meuse N. Oliveira Jr., Arthur Bessa, Ricardo Massa Ferreira Lima |
A Methodology for Software Synthesis of Embedded Real-Time Systems Based on TPN and LSC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 50-62, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Leandro Tonietto, Marcelo Walter, Cláudio Rosito Jung |
Patch-Based Texture Synthesis Using Wavelets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIBGRAPI ![In: 18th Brazilian Symposium on Computer Graphics and Image Processing (SIBGRAPI 2005), 9-12 October 2005, Natal, RN, Brazil, pp. 383-389, 2005, IEEE Computer Society, 0-7695-2389-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Phil Corbishley, David G. Haigh |
Rules for systematic synthesis of all-transistor analogue circuits by admittance matrix expansion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5966-5969, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Laurent Pottier |
Strategies for the Control of Microsound Synthesis Within the "GMU" Project. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CMMR ![In: Computer Music Modeling and Retrieval, Third International Symposium, CMMR 2005, Pisa, Italy, September 26-28, 2005, Revised Papers, pp. 110-122, 2005, Springer, 3-540-34027-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Rui Zhang, Pallav Gupta, Niraj K. Jha |
Synthesis of Majority and Minority Networks and Its Applications to QCA, TPL and SET Based Nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 229-234, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Geun Rae Cho, Tom Chen 0001 |
Synthesis of single/dual-rail mixed PTL/static logic for low-power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(2), pp. 229-242, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Weidong Wang, Anand Raghunathan, Niraj K. Jha, Sujit Dey |
Resource budgeting for Multiprocess High-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(7), pp. 1010-1019, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Sumit Gupta, Nicolae Savoiu, Nikil D. Dutt, Rajesh K. Gupta 0001, Alexandru Nicolau |
Using global code motions to improve the quality of results for high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(2), pp. 302-312, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim |
Coupling-aware high-level interconnect synthesis [IC layout]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1), pp. 157-164, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Alessandra Nardi, Alberto L. Sangiovanni-Vincentelli |
Synthesis for Manufacturability: A Sanity Check. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 796-803, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen |
Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 604-609, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Francesco Bruschi, Massimo Bombana |
A Design Methodology for the Exploitation of High Level Communication Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 180-185, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada |
High speed layout synthesis for minimum-width CMOS logic cells via Boolean satisfiability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 149-154, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Chris Sullivan, Alex Wilson, Stephen P. G. Chappell |
Using C based logic synthesis to bridge the productivity gap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 349-354, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Chris V. Jones 0001, Maja J. Mataric |
Synthesis and Analysis of Non-Reactive Controllers for Multi-Robot Sequential Task Domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISER ![In: Experimental Robotics IX, The 9th International Symposium on Experimental Robotics [ISER 2004, Singapore, 18.-21. June 2004], pp. 417-426, 2004, Springer, 978-3-540-28816-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Liang Xiao 0001, Huizhong Wu, Shuchun Tang, Yang Liu |
Modeling and Simulation of Digital Scene Image Synthesis Using Image Intensified CCD Under Different Weathers in Scene Matching Simulation System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsiaSim ![In: Systems Modeling and Simulation: Theory and Applications, Third Asian Simulation Conference, AsiaSim 2004, Jeju Island, Korea, October 4-6, 2004, Revised Selected Papers, pp. 607-616, 2004, Springer, 3-540-24477-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Marcos Alonso, Günter Geiger, Sergi Jordà |
An Internet Browser Plug-in for Real-time Audio Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WEDELMUSIC ![In: 4th International Conference on WEB Delivering of Music (WEDELMUSIC 2004), 13-15 September 2004, Barcelona, Spain, pp. 23-26, 2004, IEEE Computer Society, 0-7695-2157-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | Sina Balkir, Günhan Dündar, Güner Alpaydin |
Evolution Based Synthesis of Analog Integrated Circuits and Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 24-26 June 2004, Seattle, WA, USA, pp. 26-29, 2004, IEEE Computer Society, 0-7695-2145-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | David A. Basin, Yves Deville, Pierre Flener, Andreas Hamfelt, Jørgen Fischer Nilsson |
Synthesis of Programs in Computational Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Program Development in Computational Logic ![In: Program Development in Computational Logic: A Decade of Research Advances in Logic-Based Program Development, pp. 30-65, 2004, Springer, 3-540-22152-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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19 | William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Yang 0006, Marek A. Perkowski |
Quantum logic synthesis by symbolic reachability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 838-841, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
model checking, formal verification, quantum computing, satisfiability, reversible logic |
19 | Kenneth Francken, Georges G. E. Gielen |
A high-level simulation and synthesis environment for ΔΣ modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(8), pp. 1049-1061, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Alex Doboli, Ranga Vemuri |
Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(11), pp. 1556-1568, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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19 | Ramy Iskander, Mohamed Dessouky, Maie Aly, Mahmoud Magdy, Noha Hassan, Noha Soliman, Sami Moussa |
Synthesis of CMOS Analog Cells Using AMIGO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 20297-20302, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
19 | Lech Józwiak, Szymon Bieganski, Artur Chojnacki |
Information-driven Library-based Circuit Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 148-157, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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19 | Anas Al-Rabadi |
Iterative Symmetry Indices Decomposition for Ternary Logic Synthesis in Three-Dimensional Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 16-19 May 2003, Tokyo, Japan, pp. 139-145, 2003, IEEE Computer Society, 0-7695-1918-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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19 | Kamal S. Khouri, Niraj K. Jha |
Leakage power analysis and reduction during behavioral synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(6), pp. 876-885, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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19 | Robert P. Goldman, David J. Musliner, Michael J. S. Pelican |
Exploiting Implicit Representations in Timed Automaton Verification for Controller Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HSCC ![In: Hybrid Systems: Computation and Control, 5th International Workshop, HSCC 2002, Stanford, CA, USA, March 25-27, 2002, Proceedings, pp. 225-238, 2002, Springer, 3-540-43321-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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19 | Aneesh Koorapaty, Lawrence T. Pileggi |
Modular, Fabric-Specific Synthesis for Programmable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 132-141, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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19 | Chih-Wei Jim Chang, Malgorzata Marek-Sadowska |
ATPG-based logic synthesis: an overview. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 786-789, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim |
Coupling-aware high-level interconnect synthesis for low power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 609-613, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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19 | Weidong Wang, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
Input Space Adaptive Embedded Software Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 711-718, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
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19 | Elie Torbey, John P. Knight |
Multiclock selection and synthesis for CDFGs using optimal clock sets and genetic algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(5), pp. 599-607, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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19 | Andrew A. Duncan, David C. Hendry, Peter Gray |
The COBRA-ABS high-level synthesis system for multi-FPGA custom computing machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(1), pp. 218-223, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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19 | Ki-Il Kum, Wonyong Sung |
Combined word-length optimization and high-level synthesis ofdigital signal processing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(8), pp. 921-930, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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19 | Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk |
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 4-6 September 2001, Warsaw, Poland, pp. 46-53, 2001, IEEE Computer Society, 0-7695-1239-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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19 | Josep Carmona 0001, Jordi Cortadella, Enric Pastor |
A structural encoding technique for the synthesis of asynchronous circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 2nd International Conference on Application of Concurrency to System Design (ACSD 2001), 25-30 June 2001, Newcastle upon Tyne, UK, pp. 157-166, 2001, IEEE Computer Society, 0-7695-1071-X. The full citation details ...](Pics/full.jpeg) |
2001 |
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