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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 1863 occurrences of 889 keywords
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Results
Found 3357 publication records. Showing 3357 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
14 | Olivier Aumage, Rutger F. H. Hofman, Henri E. Bal |
NETIBIS: an efficient and dynamic communication system for heterogeneous grids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCGRID ![In: 5th International Symposium on Cluster Computing and the Grid (CCGrid 2005), 9-12 May, 2005, Cardiff, UK, pp. 1101-1108, 2005, IEEE Computer Society, 0-7803-9074-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Shang-Wei Tu, Jing-Yang Jou, Yao-Wen Chang |
RLC coupling-aware simulation for on-chip buses and their encoding for delay reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4134-4137, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Stefano Grivet-Talocia, Igor S. Stievano, Ivan A. Maio, Flavio G. Canavero |
Linear and nonlinear macromodels for power/signal integrity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5754-5757, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Meigen Shen, Li-Rong Zheng 0001, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen |
Case study of interconnect analysis for standing wave oscillator design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 456-459, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Amitava Bhaduri, Ranga Vemuri |
Moment-driven coupling-aware routing methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 390-395, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
coupling-aware, routing, moments |
14 | Kevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker |
On the Feasibility of Optical Circuit Switching for High Performance Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, November 12-18, 2005, Seattle, WA, USA, CD-Rom, pp. 16, 2005, IEEE Computer Society, 1-59593-061-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Dennis Dalessandro, Pete Wyckoff |
A Performance Analysis of the Ammasso RDMA Enabled Ethernet Adapter and its iWARP API. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2005 IEEE International Conference on Cluster Computing (CLUSTER 2005), September 26 - 30, 2005, Boston, Massachusetts, USA, pp. 1-7, 2005, IEEE Computer Society, 0-7803-9485-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Earl E. Swartzlander Jr. |
Three Dimensional System on Chip Technology, invited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 465-470, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Quming Zhou, Kartik Mohanram, Athanasios C. Antoulas |
Structure preserving reduction of frequency-dependent interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 939-942, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
interconnect, model-order reduction, skin effect |
14 | Magdy A. El-Moursy, Eby G. Friedman |
Power characteristics of inductive interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(12), pp. 1295-1306, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Ketan N. Patel, Igor L. Markov |
Error-correction and crosstalk avoidance in DSM busses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(10), pp. 1076-1080, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Andrew B. Kahng, Bao Liu 0001, Ion I. Mandoiu |
Nontree routing for reliability and yield improvement [IC layout]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1), pp. 148-156, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera |
Representative frequency for interconnect R(f)L(f)C extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 691-696, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Nikhil Bansal 0003, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh K. Gupta 0001 |
Interconnect-Aware Mapping of Applications to Coarse-Grain Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 891-899, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Weikuan Yu, Darius Buntinas, Richard L. Graham, Dhabaleswar K. Panda 0001 |
Efficient and Scalable Barrier over Quadrics and Myrinet with a New NIC-Based Collective Message Passing Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Vikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi |
A power aware system level interconnect design methodology for latency-insensitive systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 275-282, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Chanhee Oh, Haldun Haznedar, Martin Gall, Amir Grinshpon, Vladimir Zolotov, Pon Sung Ku, Rajendran Panda |
A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 232-237, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Amit Singh 0001, Arindam Mukherjee 0001, Luca Macchiarulo, Malgorzata Marek-Sadowska |
PITIA: an FPGA for throughput-intensive applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(3), pp. 354-363, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu 0001, Sung-Mo Kang |
Noise-aware interconnect power optimization in domino logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(1), pp. 79-89, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Giuseppe Ciaccio |
Messaging on Gigabit Ethernet: Some Experiments with GAMMA and Other Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Clust. Comput. ![In: Clust. Comput. 6(2), pp. 143-151, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
performance evaluation, MPI, message passing, cluster computing, Gigabit Ethernet, low-latency communication |
14 | Grzegorz Tosik, Frédéric Gaffiot, Zbigniew Lisik, Ian O'Connor, Faress Tissafi-Drissi |
Optical versus Electrical Interconnections for Clock Distribution Networks in New VLSI Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings, pp. 461-470, 2003, Springer, 3-540-20074-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni |
Effects of Temperature in Deep-Submicron Global Interconnect Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings, pp. 90-100, 2003, Springer, 3-540-20074-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Srividya Srinivasaraghavan, Wayne P. Burleson |
Interconnect Effort - A Unification of Repeater Insertion and Logical Effort. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA, pp. 55-61, 2003, IEEE Computer Society, 0-7695-1904-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal |
Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), Anaheim, California, USA, February 8-12, 2003, pp. 341-353, 2003, IEEE Computer Society, 0-7695-1871-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | José Duato, Olav Lysne, Timothy Mark Pinkston, Hermann Hellwagner |
Topic Introduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 929, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Jan-Jan Wu, Da-Wei Wang 0004, Yih-Fang Lin |
Placement of I/O servers to improve parallel I/O performance on switch-based clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 244-251, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
part-time I/O assignment, switch-based clusters, parallel I/O, bipartite matching |
14 | Ketan N. Patel, Igor L. Markov |
Error-correction and crosstalk avoidance in DSM busses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), Monterey, CA, USA, April 5-6, 2003, Proceedings, pp. 9-14, 2003, ACM, 1-58113-627-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
DSM busses, error-correction, crosstalk noise, bus encoding |
14 | Qinwei Xu, Pinaki Mazumder |
Efficient interconnect modeling by Finite Difference Quadrature methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 592-595, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Wendemagegnehu T. Beyene, Chuck Yuan, Joong-Ho Kim, Madhavan Swaminathan |
Modeling and Analysis of Power Distribution Networks for Gigabit Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 235-240, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Macro-modeling, reduced-order modeling and transmission matrix method, power distribution network |
14 | Mehdi Baradaran Tahoori, Subhasish Mitra |
Automatic Configuration Generation for FPGA Interconnect Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 134-144, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Lee Whetsel |
Adapting JTAG for AC Interconnect Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 641-650, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Tomokazu Yoneda, Tetsuo Uchiyama, Hideo Fujiwara |
Area and Time Co-Optimization for System-on-a-Chip based on Consecutive Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 415-422, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
design for testability, system-on-a-chip, test scheduling, test access mechanism, consecutive testability |
14 | Chung-Seok (Andy) Seo, Abhijit Chatterjee |
Free-Space Optical Interconnect for High-Performance MCM Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 294-298, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Jason Cong, Xin Yuan 0005 |
Multilevel global placement with retiming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 208-213, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
physical hierarchy, placement, retiming, deep sub-micron |
14 | Mehrdad Nourani, Amir Attarha |
Signal Integrity: Fault Modeling and Testing in High-Speed SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(4-5), pp. 539-554, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
integrity fault, integrity loss, transfer function matrix, built-in self-test, system-on-chip, test pattern generation, signal integrity, model order reduction, interconnect testing, skew detection, noise detection, high-speed interconnect |
14 | Tomokazu Yoneda, Hideo Fujiwara |
Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(4-5), pp. 487-501, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
consecutive transparency, built-in self test, design for testability, system-on-a-chip, test access mechanism, consecutive testability |
14 | Vikas Chandra, Herman Schmit |
Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 25-26 April 2002, Pittsburgh, PA, USA, pp. 35-40, 2002, IEEE Computer Society, 0-7695-1486-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FPGA Interconnect |
14 | Andrew B. Kahng, Bao Liu 0001, Ion I. Mandoiu |
Non-tree routing for reliability and yield improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 260-266, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Seung Hoon Choi, Kaushik Roy 0001 |
Noise Analysis under Capacitive and Inductive Coupling for High Speed Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 365-369, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Crosstalk, Inductance, Capacitance, Noise Analysis, Noise Margin, High Speed Circuit |
14 | Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy 0001 |
Dynamic Noise Analysis with Capacitive and Inductive Coupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 65-70, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
capacitiance, dynamic noise margin, crosstalk, inductance, noise analysis, deep submicron, noise model |
14 | Jun Chen 0008, Lei He 0001 |
Determination of worst-case crosstalk noise for non-switching victims in GHz+ buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 92-97, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
interconnect design |
14 | Yuanyuan Zhou 0001, Kai Li 0001, Angelos Bilas, Suresh Jagannathan, Cezary Dubnicki, James Philbin |
Experiences with VI Communication for Database Storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 29th International Symposium on Computer Architecture (ISCA 2002), 25-29 May 2002, Anchorage, AK, USA, pp. 257-268, 2002, IEEE Computer Society, 0-7695-1605-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
cluster-based storage, Database storage, Virtual Interface Architecture, processor overhead, Storage system, User-level Communication, storage area network |
14 | Phillip J. Restle, Albert E. Ruehli, Steven G. Walker, George Papadopoulos |
Full-wave PEEC time-domain method for the modeling of on-chipinterconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(7), pp. 877-886, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Courtney R. Gibson, Angelos Bilas |
Shared Virtual Memory Clusters with Next-Generation Interconnection Networks and Wide Compute Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings, pp. 167-181, 2001, Springer, 3-540-43009-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Tomokazu Yoneda, Hideo Fujiwara |
A DFT Method for Core-Based Systems-on-a-Chip Based on Consecutive Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 193-198, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
consecutive transparency, core-based systems-on-a-chip, design for testability, test access mechanism, consecutive testability |
14 | Wei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng |
Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA, pp. 204-209, 2001, IEEE Computer Society, 0-7695-1122-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu 0001, Sung-Mo Kang |
Noise-aware power optimization for on-chip interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000, Rapallo, Italy, July 25-27, 2000, pp. 108-113, 2000, ACM, 1-58113-190-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
14 | Shen Lin, Norman Chang, O. Sam Nakagawa |
Quick On-Chip Self- and Mutual-Inductance Screen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 513-, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
inductance screening, significant frequency, inductive coupling and inductive modeling, signal integrity |
14 | Srikanth Venkataraman, Scott Brady Drummonds |
A Technique for Logic Fault Diagnosis of Interconnect Open Defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada, pp. 313-318, 2000, IEEE Computer Society, 0-7695-0613-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Diagnosis and Debugging, Logic Fault Diagnosis, Interconnect Open Defects, Fault Modeling and Simulation, Dynamic Diagnosis |
14 | Susumu Horiguchi, Takayuki Ooki |
Hierarchical 3D-Torus Interconnection Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 5th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN 2000), 7-10 December 2000, Dallas / Richardson, TX, USA, pp. 50-56, 2000, IEEE Computer Society, 0-7695-0936-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
14 | Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh |
Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 520-525, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
14 | Janet Meiling Wang, Qingjian Yu, Ernest S. Kuh |
Coupled Noise Estimation for Distributed RC Interconnect Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 664-668, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
14 | James D. Meindl |
XXI Century Gigascale Integration (GSI) : The Interconnect Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 88-, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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14 | Aurobindo Dasgupta, Ramesh Karri |
High-reliability, low-energy microarchitecture synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(12), pp. 1273-1280, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
14 | Peter A. Walker, Sumit Ghosh |
On the nature and inadequacies of transport timing delay constructs in VHDL descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(8), pp. 894-915, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
14 | David C. DiNucci |
A Simple and Efficient Process and Communication Abstraction for Network Operating Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CANPC ![In: Communication and Architectural Support for Network-Based Parallel Computing, First International Workshop, CANPC '97, San Antonio, Texas, USA, February 1-2, 1997, Proceedings, pp. 31-45, 1997, Springer, 3-540-62573-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
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14 | Vassilios V. Dimakopoulos, Nikitas J. Dimopoulos |
Leaf Communications in Complete Trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. I ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume I, pp. 347-352, 1996, Springer, 3-540-61626-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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14 | Mario Gerla, B. Kannan, Bruce Kwan, Prasasth Palnati, Simon Walton, Emilio Leonardi, Fabio Neri |
Quality of Service Support in High Speed, Wormhole Routing Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: 1996 International Conference on Network Protocols, ICNP 1996, October 29 - November 1, 1996, Columbus, Ohio, USA, pp. 40-47, 1996, IEEE Computer Society, 0-8186-7453-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
14 | Jatan C. Shah, Sachin S. Sapatnekar |
Wiresizing with Buffer Placement and Sizing for Power-Delay Tradeoffs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 346-351, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
power-delay tradeoffs, dynamic programming, Interconnect, sensitivity, buffer, sizing, repeaters, drivers |
14 | Jiao Fan, D. Zaleta, Chung-Kuan Cheng, S. H. Lee |
Physical models and algorithms for optoelectronic MCM layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(1), pp. 124-135, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
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12 | Hsien-Hsin S. Lee |
Beyond Wires: The Future of Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 44(2), pp. 4-5, March - April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
12 | Scott Levy, Whit Schonbein |
Special Issue on Hot Interconnects 30. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 44(2), pp. 6-7, March - April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Junyong Park, Donghyun Kim 0004 |
Statistical Eye Diagrams for High-Speed Interconnects of Packages: A Review. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 22880-22891, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Vishal Saxena, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar |
Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 71(3), pp. 1632-1637, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
12 | Xiaoxue Yang, Hao Wang, Bing Hu 0002, Chunming Wu 0001 |
ABOI: AWGR-Based Optical Interconnects for Single-Wavelength and Multi-Wavelength. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 32(2), pp. 1124-1139, April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Amoldeep Singh, Karmjit Singh Sandha, Mayank Kumar Rai |
Design and Analysis of Active Feedback RGC-Based Transimpedance Receiver Circuit for Optical Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 33(7), pp. 2450125:1-2450125:24, May 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Hansika Weerasena, Prabhat Mishra 0001 |
Security of Electrical, Optical, and Wireless On-chip Interconnects: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 29(2), pp. 40:1-40:41, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Leonhard Hahn, Tim Pfahler, Tobias Bader, Gerald Gold, Martin Vossiek, Christian Carlowitz |
3D-Printed Dielectric Image Lines towards Chip-to-Chip Interconnects for subTHz-Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2403.03657, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Andrew M. Netherton, Mario Dumont, Zachary Nelson, Jinesh Jhonsa, Alice Mo, Jahyun Koo 0003, David McCarthy, Noah Pestana, Skylar Deckoff-Jones, Christopher V. Poulton, Michael Frankel, Jock Bovington, Luke Theogarajan, John E. Bowers 0001 |
25.1 Short-Reach Silicon Photonic Interconnects with Quantum Dot Mode Locked Laser Comb Sources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 422-424, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
12 | Jahnvi Singh, Nijwm Wary, Pradip Mandal |
Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 73-78, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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12 | Qian Liu, Li Du, Yuan Du |
A 0.90-Tb/s/in 1.29-pJ/b Wireline Transceiver With Single-Ended Crosstalk Cancellation Coding Scheme for High-Density Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(8), pp. 2326-2336, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Dhiman Kakati, Ramesh Kumar Sonkar |
Performance of DSP-assisted gray-coded DP-16-QAM Nyquist-DWDM super-channel transceiver for high-speed long-haul optical interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Photonic Netw. Commun. ![In: Photonic Netw. Commun. 45(1), pp. 37-48, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Lizy Kurian John |
Emerging System Interconnects Enabling More Opportunities Than Ever! ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 43(2), pp. 4-5, March - April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
12 | Scott Levy |
Special Issue on Hot Interconnects 29. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 43(2), pp. 97-98, March - April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | John Kim, Nam Sung Kim |
Special Issue on Emerging System Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 43(2), pp. 6-8, March - April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Suyash Kushwaha, Avirup Dasgupta, Sourajeet Roy, Rohit Sharma |
Fast Multi-ANN Composite Models for Repeater Optimization in Presence of Parametric Uncertainty for on-Chip Hybrid Copper-Graphene Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 131191-131204, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Mark Keran, Anestis Dounavis |
An Analytic RLC Model for Coupled Interconnects Which Uses a Numerical Inverse Laplace Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 31(10), pp. 1497-1508, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Prema Kumar Govindaswamy, Raviteja Kammari, Vijaya Sankara Rao Pasupureddi |
An adaptive link training based hybrid circuit topology for full-duplex on-chip interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 51(8), pp. 3637-3651, August 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Ritika Sharma, Mayank Kumar Rai, Rajesh Khanna |
Structure optimization: Configuring optimum performance of randomly distributed mixed carbon nanotube bundle interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 51(8), pp. 3949-3967, August 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Weihao Ni, Fan Li 0011, Wei Wang, Zhibin Luo, Xingwen Yi, Yi Cai, Zhaohui Li |
Low power consumption reduced state and transition MLSE in optical interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Inf. Sci. ![In: Sci. China Inf. Sci. 66(10), October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Sergi Abadal, Robert Guirado, Hamidreza Taghvaee, Akshay Jain 0001, Elana Pereira de Santana, Peter Haring Bolívar, Mohamed Saeed, Renato Negra, Zhenxing Wang, Kun-Ta Wang, Max C. Lemme, Joshua Klein, Marina Zapater, Alexandre Levisse, David Atienza, Davide Rossi, Francesco Conti 0001, Martino Dazzi, Geethan Karunaratne, Irem Boybat, Abu Sebastian |
Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Wirel. Commun. ![In: IEEE Wirel. Commun. 30(4), pp. 162-169, August 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Zhican Lin, Zhongliang Pan |
Electrical modeling and transmission performance analysis of carbon nanotube-graphene mixed structure interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 141, pp. 105966, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Fa Zou, Zhongliang Pan, Peng Xu |
Modeling and performance analysis of coupled multilayer graphene nanoribbon (MLGNR) interconnects with intercalation doping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 141, pp. 105971, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Gurijala Deepthi, Madhavi Tatineni |
Crosstalk analysis of dielectric inserted side contact multilayer graphene nanoribbon interconnects for ternary logic system using unconditionally stable FDTD model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 133, pp. 105698, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Carmen Mas Machuca, Lena Wosinska, Marco Ruffini, Jiajia Chen 0001 |
Optical Networks and Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2302.07829, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Hansika Weerasena, Prabhat Mishra 0001 |
Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2301.09738, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Tae Yeob Kang, Haebom Lee, Sungho Suh |
SREL: Severity Rating Ensemble Learning for Non-Destructive Fault Diagnosis of Cu Interconnects using S-parameter Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2304.10207, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Venkata Sai Praneeth Karempudi, Janibul Bashir, Ishan G. Thakkar |
An Analysis of Various Design Pathways Towards Multi-Terabit Photonic On-Interposer Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2306.07241, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Ruben S. Luis, Benjamin J. Puttnam, Georg Rademacher, Satoshi Shinada, Tetsuya Hayashi, Tetsuya Nakanishi, Yuki Saito, Tetsu Morishima, Hideaki Furukawa |
Multicore fiber interconnects for multi-terabit spine-leaf datacenter network topologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Opt. Commun. Netw. ![In: J. Opt. Commun. Netw. 15(7), pp. C41-C47, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Tun-Yao Hung, Guan-Hong Chen, Yuan-Zeng Lin, Chi-Wai Chow, Yin-He Jian, Pin-Cheng Kuo, Ching-Wei Peng, Jui-Feng Tsai, Yang Liu 0194, Chien-Hung Yeh |
Wideband and Channel Switchable Mode Division Multiplexing (MDM) Optical Power Divider Supporting 7.682 Tbit/s for On-Chip Optical Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 23(2), pp. 711, January 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Qian Zhang 0092, Sujay Charania, Stefan Rothe, Nektarios Koukourakis, Niels Neumann, Dirk Plettemeier, Jürgen W. Czarske |
Multimode Optical Interconnects on Silicon Interposer Enable Confidential Hardware-to-Hardware Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 23(13), pp. 6076, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Sunghyun Bae, Hyeon-June Kim |
Two-Channel OTDM System for Data-Center Interconnects: A Review. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 23(13), pp. 5908, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Liujun Guo, Wenjing Xu, Haiyong Wang |
Exploiting signal skew to reduce delay uncertainty for chiplet interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 20(13), pp. 20230188, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Moshe Nazarathy, Ioannis Tomkos |
Optical DACs for Ultra-High-Speed Green Photonic Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTON ![In: 23rd International Conference on Transparent Optical Networks, ICTON 2023, Bucharest, Romania, July 2-6, 2023, pp. 1-4, 2023, IEEE, 979-8-3503-0303-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Youqi Ding, O. Varela Pedreira, Melina Lofrano, Houman Zahedmanesh, T. Chavez, Hosain Farr, Ingrid De Wolf, Kris Croes |
Thermomigration-induced void formation in Cu-interconnects - Assessment of main physical parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2023, Monterey, CA, USA, March 26-30, 2023, pp. 1-7, 2023, IEEE, 978-1-6654-5672-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Y. H. Lin, C. C. Lee, C. Y. Liao, M. H. Lin, W. C. Tu, Robin Chen, H. P. Chen, Winston S. Shue, Min Cao |
A Novel Methodology to Predict Process-Induced Warpage in Advanced BEOL Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2023, Monterey, CA, USA, March 26-30, 2023, pp. 1-4, 2023, IEEE, 978-1-6654-5672-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | A. S. Saleh, Houman Zahedmanesh, Hajdin Ceric, Ingrid De Wolf, Kris Croes |
Impact of via geometry and line extension on via-electromigration in nano-interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2023, Monterey, CA, USA, March 26-30, 2023, pp. 1-4, 2023, IEEE, 978-1-6654-5672-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Jorge Mendoza, Jimmy-Bao Le, Choong-Un Kim, Hung-Yun Lin |
Advanced Methods of Detecting Physical Damages in Packaging and BEOL Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2023, Monterey, CA, USA, March 26-30, 2023, pp. 1-6, 2023, IEEE, 978-1-6654-5672-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Michitaka Yamamoto, Seiichi Takamatsu, Toshihiro Itoh |
Stretchable Microscale Patterned Interconnects Formed on Micro-Corrugated Vertical Wavy Structured Substrate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SENSORS ![In: 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, pp. 1-4, 2023, IEEE, 979-8-3503-0387-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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12 | Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Slimane Boutobza, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen |
Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
3DIC ![In: IEEE International 3D Systems Integration Conference, 3DIC 2023, Cork, Ireland, May 10-12, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-1137-2. The full citation details ...](Pics/full.jpeg) |
2023 |
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