Search results for "interconnects"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
14	Olivier Aumage, Rutger F. H. Hofman, Henri E. Bal	NETIBIS: an efficient and dynamic communication system for heterogeneous grids.	CCGRID	2005	DBLP DOI BibTeX RDF
14	Shang-Wei Tu, Jing-Yang Jou, Yao-Wen Chang	RLC coupling-aware simulation for on-chip buses and their encoding for delay reduction.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
14	Stefano Grivet-Talocia, Igor S. Stievano, Ivan A. Maio, Flavio G. Canavero	Linear and nonlinear macromodels for power/signal integrity.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
14	Meigen Shen, Li-Rong Zheng 0001, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen	Case study of interconnect analysis for standing wave oscillator design.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
14	Amitava Bhaduri, Ranga Vemuri	Moment-driven coupling-aware routing methodology.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	coupling-aware, routing, moments
14	Kevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker	On the Feasibility of Optical Circuit Switching for High Performance Computing Systems.	SC	2005	DBLP DOI BibTeX RDF
14	Dennis Dalessandro, Pete Wyckoff	A Performance Analysis of the Ammasso RDMA Enabled Ethernet Adapter and its iWARP API.	CLUSTER	2005	DBLP DOI BibTeX RDF
14	Earl E. Swartzlander Jr.	Three Dimensional System on Chip Technology, invited.	IWSOC	2005	DBLP DOI BibTeX RDF
14	Quming Zhou, Kartik Mohanram, Athanasios C. Antoulas	Structure preserving reduction of frequency-dependent interconnect.	DAC	2005	DBLP DOI BibTeX RDF	interconnect, model-order reduction, skin effect
14	Magdy A. El-Moursy, Eby G. Friedman	Power characteristics of inductive interconnect.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
14	Ketan N. Patel, Igor L. Markov	Error-correction and crosstalk avoidance in DSM busses.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
14	Andrew B. Kahng, Bao Liu 0001, Ion I. Mandoiu	Nontree routing for reliability and yield improvement [IC layout].	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
14	Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera	Representative frequency for interconnect R(f)L(f)C extraction.	ASP-DAC	2004	DBLP DOI BibTeX RDF
14	Nikhil Bansal 0003, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh K. Gupta 0001	Interconnect-Aware Mapping of Applications to Coarse-Grain Reconfigurable Architectures.	FPL	2004	DBLP DOI BibTeX RDF
14	Weikuan Yu, Darius Buntinas, Richard L. Graham, Dhabaleswar K. Panda 0001	Efficient and Scalable Barrier over Quadrics and Myrinet with a New NIC-Based Collective Message Passing Protocol.	IPDPS	2004	DBLP DOI BibTeX RDF
14	Vikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi	A power aware system level interconnect design methodology for latency-insensitive systems.	ICCAD	2004	DBLP DOI BibTeX RDF
14	Chanhee Oh, Haldun Haznedar, Martin Gall, Amir Grinshpon, Vladimir Zolotov, Pon Sung Ku, Rajendran Panda	A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification.	ISQED	2004	DBLP DOI BibTeX RDF
14	Amit Singh 0001, Arindam Mukherjee 0001, Luca Macchiarulo, Malgorzata Marek-Sadowska	PITIA: an FPGA for throughput-intensive applications.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
14	Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu 0001, Sung-Mo Kang	Noise-aware interconnect power optimization in domino logic synthesis.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
14	Giuseppe Ciaccio	Messaging on Gigabit Ethernet: Some Experiments with GAMMA and Other Systems.	Clust. Comput.	2003	DBLP DOI BibTeX RDF	performance evaluation, MPI, message passing, cluster computing, Gigabit Ethernet, low-latency communication
14	Grzegorz Tosik, Frédéric Gaffiot, Zbigniew Lisik, Ian O'Connor, Faress Tissafi-Drissi	Optical versus Electrical Interconnections for Clock Distribution Networks in New VLSI Technologies.	PATMOS	2003	DBLP DOI BibTeX RDF
14	Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni	Effects of Temperature in Deep-Submicron Global Interconnect Optimization.	PATMOS	2003	DBLP DOI BibTeX RDF
14	Srividya Srinivasaraghavan, Wayne P. Burleson	Interconnect Effort - A Unification of Repeater Insertion and Logical Effort.	ISVLSI	2003	DBLP DOI BibTeX RDF
14	Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal	Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.	HPCA	2003	DBLP DOI BibTeX RDF
14	José Duato, Olav Lysne, Timothy Mark Pinkston, Hermann Hellwagner	Topic Introduction.	Euro-Par	2003	DBLP DOI BibTeX RDF
14	Jan-Jan Wu, Da-Wei Wang 0004, Yih-Fang Lin	Placement of I/O servers to improve parallel I/O performance on switch-based clusters.	ICS	2003	DBLP DOI BibTeX RDF	part-time I/O assignment, switch-based clusters, parallel I/O, bipartite matching
14	Ketan N. Patel, Igor L. Markov	Error-correction and crosstalk avoidance in DSM busses.	SLIP	2003	DBLP DOI BibTeX RDF	DSM busses, error-correction, crosstalk noise, bus encoding
14	Qinwei Xu, Pinaki Mazumder	Efficient interconnect modeling by Finite Difference Quadrature methods.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
14	Wendemagegnehu T. Beyene, Chuck Yuan, Joong-Ho Kim, Madhavan Swaminathan	Modeling and Analysis of Power Distribution Networks for Gigabit Applications.	ISQED	2003	DBLP DOI BibTeX RDF	Macro-modeling, reduced-order modeling and transmission matrix method, power distribution network
14	Mehdi Baradaran Tahoori, Subhasish Mitra	Automatic Configuration Generation for FPGA Interconnect Testing.	VTS	2003	DBLP DOI BibTeX RDF
14	Lee Whetsel	Adapting JTAG for AC Interconnect Testing.	ITC	2003	DBLP DOI BibTeX RDF
14	Tomokazu Yoneda, Tetsuo Uchiyama, Hideo Fujiwara	Area and Time Co-Optimization for System-on-a-Chip based on Consecutive Testability.	ITC	2003	DBLP DOI BibTeX RDF	design for testability, system-on-a-chip, test scheduling, test access mechanism, consecutive testability
14	Chung-Seok (Andy) Seo, Abhijit Chatterjee	Free-Space Optical Interconnect for High-Performance MCM Systems.	IWSOC	2003	DBLP DOI BibTeX RDF
14	Jason Cong, Xin Yuan 0005	Multilevel global placement with retiming.	DAC	2003	DBLP DOI BibTeX RDF	physical hierarchy, placement, retiming, deep sub-micron
14	Mehrdad Nourani, Amir Attarha	Signal Integrity: Fault Modeling and Testing in High-Speed SoCs.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	integrity fault, integrity loss, transfer function matrix, built-in self-test, system-on-chip, test pattern generation, signal integrity, model order reduction, interconnect testing, skew detection, noise detection, high-speed interconnect
14	Tomokazu Yoneda, Hideo Fujiwara	Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	consecutive transparency, built-in self test, design for testability, system-on-a-chip, test access mechanism, consecutive testability
14	Vikas Chandra, Herman Schmit	Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach.	ISVLSI	2002	DBLP DOI BibTeX RDF	FPGA Interconnect
14	Andrew B. Kahng, Bao Liu 0001, Ion I. Mandoiu	Non-tree routing for reliability and yield improvement.	ICCAD	2002	DBLP DOI BibTeX RDF
14	Seung Hoon Choi, Kaushik Roy 0001	Noise Analysis under Capacitive and Inductive Coupling for High Speed Circuits.	DELTA	2002	DBLP DOI BibTeX RDF	Crosstalk, Inductance, Capacitance, Noise Analysis, Noise Margin, High Speed Circuit
14	Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy 0001	Dynamic Noise Analysis with Capacitive and Inductive Coupling.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF	capacitiance, dynamic noise margin, crosstalk, inductance, noise analysis, deep submicron, noise model
14	Jun Chen 0008, Lei He 0001	Determination of worst-case crosstalk noise for non-switching victims in GHz+ buses.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF	interconnect design
14	Yuanyuan Zhou 0001, Kai Li 0001, Angelos Bilas, Suresh Jagannathan, Cezary Dubnicki, James Philbin	Experiences with VI Communication for Database Storage.	ISCA	2002	DBLP DOI BibTeX RDF	cluster-based storage, Database storage, Virtual Interface Architecture, processor overhead, Storage system, User-level Communication, storage area network
14	Phillip J. Restle, Albert E. Ruehli, Steven G. Walker, George Papadopoulos	Full-wave PEEC time-domain method for the modeling of on-chipinterconnects.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
14	Courtney R. Gibson, Angelos Bilas	Shared Virtual Memory Clusters with Next-Generation Interconnection Networks and Wide Compute Nodes.	HiPC	2001	DBLP DOI BibTeX RDF
14	Tomokazu Yoneda, Hideo Fujiwara	A DFT Method for Core-Based Systems-on-a-Chip Based on Consecutive Testability.	Asian Test Symposium	2001	DBLP DOI BibTeX RDF	consecutive transparency, core-based systems-on-a-chip, design for testability, test access mechanism, consecutive testability
14	Wei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng	Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses.	VTS	2001	DBLP DOI BibTeX RDF
14	Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu 0001, Sung-Mo Kang	Noise-aware power optimization for on-chip interconnect.	ISLPED	2000	DBLP DOI BibTeX RDF
14	Shen Lin, Norman Chang, O. Sam Nakagawa	Quick On-Chip Self- and Mutual-Inductance Screen.	ISQED	2000	DBLP DOI BibTeX RDF	inductance screening, significant frequency, inductive coupling and inductive modeling, signal integrity
14	Srikanth Venkataraman, Scott Brady Drummonds	A Technique for Logic Fault Diagnosis of Interconnect Open Defects.	VTS	2000	DBLP DOI BibTeX RDF	Diagnosis and Debugging, Logic Fault Diagnosis, Interconnect Open Defects, Fault Modeling and Simulation, Dynamic Diagnosis
14	Susumu Horiguchi, Takayuki Ooki	Hierarchical 3D-Torus Interconnection Network.	ISPAN	2000	DBLP DOI BibTeX RDF
14	Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh	Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks.	DAC	2000	DBLP DOI BibTeX RDF
14	Janet Meiling Wang, Qingjian Yu, Ernest S. Kuh	Coupled Noise Estimation for Distributed RC Interconnect Model.	DATE	1999	DBLP DOI BibTeX RDF
14	James D. Meindl	XXI Century Gigascale Integration (GSI) : The Interconnect Problem.	ARVLSI	1999	DBLP DOI BibTeX RDF
14	Aurobindo Dasgupta, Ramesh Karri	High-reliability, low-energy microarchitecture synthesis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
14	Peter A. Walker, Sumit Ghosh	On the nature and inadequacies of transport timing delay constructs in VHDL descriptions.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
14	David C. DiNucci	A Simple and Efficient Process and Communication Abstraction for Network Operating Systems.	CANPC	1997	DBLP DOI BibTeX RDF
14	Vassilios V. Dimakopoulos, Nikitas J. Dimopoulos	Leaf Communications in Complete Trees.	Euro-Par, Vol. I	1996	DBLP DOI BibTeX RDF
14	Mario Gerla, B. Kannan, Bruce Kwan, Prasasth Palnati, Simon Walton, Emilio Leonardi, Fabio Neri	Quality of Service Support in High Speed, Wormhole Routing Networks.	ICNP	1996	DBLP DOI BibTeX RDF
14	Jatan C. Shah, Sachin S. Sapatnekar	Wiresizing with Buffer Placement and Sizing for Power-Delay Tradeoffs.	VLSI Design	1996	DBLP DOI BibTeX RDF	power-delay tradeoffs, dynamic programming, Interconnect, sensitivity, buffer, sizing, repeaters, drivers
14	Jiao Fan, D. Zaleta, Chung-Kuan Cheng, S. H. Lee	Physical models and algorithms for optoelectronic MCM layout.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
12	Hsien-Hsin S. Lee	Beyond Wires: The Future of Interconnects.	IEEE Micro	2024	DBLP DOI BibTeX RDF
12	Scott Levy, Whit Schonbein	Special Issue on Hot Interconnects 30.	IEEE Micro	2024	DBLP DOI BibTeX RDF
12	Junyong Park, Donghyun Kim 0004	Statistical Eye Diagrams for High-Speed Interconnects of Packages: A Review.	IEEE Access	2024	DBLP DOI BibTeX RDF
12	Vishal Saxena, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar	Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
12	Xiaoxue Yang, Hao Wang, Bing Hu 0002, Chunming Wu 0001	ABOI: AWGR-Based Optical Interconnects for Single-Wavelength and Multi-Wavelength.	IEEE/ACM Trans. Netw.	2024	DBLP DOI BibTeX RDF
12	Amoldeep Singh, Karmjit Singh Sandha, Mayank Kumar Rai	Design and Analysis of Active Feedback RGC-Based Transimpedance Receiver Circuit for Optical Interconnects.	J. Circuits Syst. Comput.	2024	DBLP DOI BibTeX RDF
12	Hansika Weerasena, Prabhat Mishra 0001	Security of Electrical, Optical, and Wireless On-chip Interconnects: A Survey.	ACM Trans. Design Autom. Electr. Syst.	2024	DBLP DOI BibTeX RDF
12	Leonhard Hahn, Tim Pfahler, Tobias Bader, Gerald Gold, Martin Vossiek, Christian Carlowitz	3D-Printed Dielectric Image Lines towards Chip-to-Chip Interconnects for subTHz-Applications.	CoRR	2024	DBLP DOI BibTeX RDF
12	Andrew M. Netherton, Mario Dumont, Zachary Nelson, Jinesh Jhonsa, Alice Mo, Jahyun Koo 0003, David McCarthy, Noah Pestana, Skylar Deckoff-Jones, Christopher V. Poulton, Michael Frankel, Jock Bovington, Luke Theogarajan, John E. Bowers 0001	25.1 Short-Reach Silicon Photonic Interconnects with Quantum Dot Mode Locked Laser Comb Sources.	ISSCC	2024	DBLP DOI BibTeX RDF
12	Jahnvi Singh, Nijwm Wary, Pradip Mandal	Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects.	VLSID	2024	DBLP DOI BibTeX RDF
12	Qian Liu, Li Du, Yuan Du	A 0.90-Tb/s/in 1.29-pJ/b Wireline Transceiver With Single-Ended Crosstalk Cancellation Coding Scheme for High-Density Interconnects.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
12	Dhiman Kakati, Ramesh Kumar Sonkar	Performance of DSP-assisted gray-coded DP-16-QAM Nyquist-DWDM super-channel transceiver for high-speed long-haul optical interconnects.	Photonic Netw. Commun.	2023	DBLP DOI BibTeX RDF
12	Lizy Kurian John	Emerging System Interconnects Enabling More Opportunities Than Ever!	IEEE Micro	2023	DBLP DOI BibTeX RDF
12	Scott Levy	Special Issue on Hot Interconnects 29.	IEEE Micro	2023	DBLP DOI BibTeX RDF
12	John Kim, Nam Sung Kim	Special Issue on Emerging System Interconnects.	IEEE Micro	2023	DBLP DOI BibTeX RDF
12	Suyash Kushwaha, Avirup Dasgupta, Sourajeet Roy, Rohit Sharma	Fast Multi-ANN Composite Models for Repeater Optimization in Presence of Parametric Uncertainty for on-Chip Hybrid Copper-Graphene Interconnects.	IEEE Access	2023	DBLP DOI BibTeX RDF
12	Mark Keran, Anestis Dounavis	An Analytic RLC Model for Coupled Interconnects Which Uses a Numerical Inverse Laplace Transform.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
12	Prema Kumar Govindaswamy, Raviteja Kammari, Vijaya Sankara Rao Pasupureddi	An adaptive link training based hybrid circuit topology for full-duplex on-chip interconnects.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
12	Ritika Sharma, Mayank Kumar Rai, Rajesh Khanna	Structure optimization: Configuring optimum performance of randomly distributed mixed carbon nanotube bundle interconnects.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
12	Weihao Ni, Fan Li 0011, Wei Wang, Zhibin Luo, Xingwen Yi, Yi Cai, Zhaohui Li	Low power consumption reduced state and transition MLSE in optical interconnects.	Sci. China Inf. Sci.	2023	DBLP DOI BibTeX RDF
12	Sergi Abadal, Robert Guirado, Hamidreza Taghvaee, Akshay Jain 0001, Elana Pereira de Santana, Peter Haring Bolívar, Mohamed Saeed, Renato Negra, Zhenxing Wang, Kun-Ta Wang, Max C. Lemme, Joshua Klein, Marina Zapater, Alexandre Levisse, David Atienza, Davide Rossi, Francesco Conti 0001, Martino Dazzi, Geethan Karunaratne, Irem Boybat, Abu Sebastian	Graphene-Based Wireless Agile Interconnects for Massive Heterogeneous Multi-Chip Processors.	IEEE Wirel. Commun.	2023	DBLP DOI BibTeX RDF
12	Zhican Lin, Zhongliang Pan	Electrical modeling and transmission performance analysis of carbon nanotube-graphene mixed structure interconnects.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
12	Fa Zou, Zhongliang Pan, Peng Xu	Modeling and performance analysis of coupled multilayer graphene nanoribbon (MLGNR) interconnects with intercalation doping.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
12	Gurijala Deepthi, Madhavi Tatineni	Crosstalk analysis of dielectric inserted side contact multilayer graphene nanoribbon interconnects for ternary logic system using unconditionally stable FDTD model.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
12	Carmen Mas Machuca, Lena Wosinska, Marco Ruffini, Jiajia Chen 0001	Optical Networks and Interconnects.	CoRR	2023	DBLP DOI BibTeX RDF
12	Hansika Weerasena, Prabhat Mishra 0001	Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey.	CoRR	2023	DBLP DOI BibTeX RDF
12	Tae Yeob Kang, Haebom Lee, Sungho Suh	SREL: Severity Rating Ensemble Learning for Non-Destructive Fault Diagnosis of Cu Interconnects using S-parameter Patterns.	CoRR	2023	DBLP DOI BibTeX RDF
12	Venkata Sai Praneeth Karempudi, Janibul Bashir, Ishan G. Thakkar	An Analysis of Various Design Pathways Towards Multi-Terabit Photonic On-Interposer Interconnects.	CoRR	2023	DBLP DOI BibTeX RDF
12	Ruben S. Luis, Benjamin J. Puttnam, Georg Rademacher, Satoshi Shinada, Tetsuya Hayashi, Tetsuya Nakanishi, Yuki Saito, Tetsu Morishima, Hideaki Furukawa	Multicore fiber interconnects for multi-terabit spine-leaf datacenter network topologies.	J. Opt. Commun. Netw.	2023	DBLP DOI BibTeX RDF
12	Tun-Yao Hung, Guan-Hong Chen, Yuan-Zeng Lin, Chi-Wai Chow, Yin-He Jian, Pin-Cheng Kuo, Ching-Wei Peng, Jui-Feng Tsai, Yang Liu 0194, Chien-Hung Yeh	Wideband and Channel Switchable Mode Division Multiplexing (MDM) Optical Power Divider Supporting 7.682 Tbit/s for On-Chip Optical Interconnects.	Sensors	2023	DBLP DOI BibTeX RDF
12	Qian Zhang 0092, Sujay Charania, Stefan Rothe, Nektarios Koukourakis, Niels Neumann, Dirk Plettemeier, Jürgen W. Czarske	Multimode Optical Interconnects on Silicon Interposer Enable Confidential Hardware-to-Hardware Communication.	Sensors	2023	DBLP DOI BibTeX RDF
12	Sunghyun Bae, Hyeon-June Kim	Two-Channel OTDM System for Data-Center Interconnects: A Review.	Sensors	2023	DBLP DOI BibTeX RDF
12	Liujun Guo, Wenjing Xu, Haiyong Wang	Exploiting signal skew to reduce delay uncertainty for chiplet interconnects.	IEICE Electron. Express	2023	DBLP DOI BibTeX RDF
12	Moshe Nazarathy, Ioannis Tomkos	Optical DACs for Ultra-High-Speed Green Photonic Interconnects.	ICTON	2023	DBLP DOI BibTeX RDF
12	Youqi Ding, O. Varela Pedreira, Melina Lofrano, Houman Zahedmanesh, T. Chavez, Hosain Farr, Ingrid De Wolf, Kris Croes	Thermomigration-induced void formation in Cu-interconnects - Assessment of main physical parameters.	IRPS	2023	DBLP DOI BibTeX RDF
12	Y. H. Lin, C. C. Lee, C. Y. Liao, M. H. Lin, W. C. Tu, Robin Chen, H. P. Chen, Winston S. Shue, Min Cao	A Novel Methodology to Predict Process-Induced Warpage in Advanced BEOL Interconnects.	IRPS	2023	DBLP DOI BibTeX RDF
12	A. S. Saleh, Houman Zahedmanesh, Hajdin Ceric, Ingrid De Wolf, Kris Croes	Impact of via geometry and line extension on via-electromigration in nano-interconnects.	IRPS	2023	DBLP DOI BibTeX RDF
12	Jorge Mendoza, Jimmy-Bao Le, Choong-Un Kim, Hung-Yun Lin	Advanced Methods of Detecting Physical Damages in Packaging and BEOL Interconnects.	IRPS	2023	DBLP DOI BibTeX RDF
12	Michitaka Yamamoto, Seiichi Takamatsu, Toshihiro Itoh	Stretchable Microscale Patterned Interconnects Formed on Micro-Corrugated Vertical Wavy Structured Substrate.	SENSORS	2023	DBLP DOI BibTeX RDF
12	Po-Yao Chuang, Francesco Lorenzelli, Sreejit Chakravarty, Slimane Boutobza, Cheng-Wen Wu, Georges G. E. Gielen, Erik Jan Marinissen	Effective and Efficient Test and Diagnosis Pattern Generation for Many Inter-Die Interconnects in Chiplet-Based Packages.	3DIC	2023	DBLP DOI BibTeX RDF