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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 62 occurrences of 57 keywords
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Results
Found 110 publication records. Showing 108 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
75 | César A. Piña |
Evolution Of The Mosis VLSI Educational Program. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 187-191, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
60 | César A. Piña |
Low Cost IC Prototyping from the MOSIS Service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: IEEE International Conference on Microelectronic Systems Education, MSE 1999, Arlington, Virginia, USA, July 19-21, 1999, pp. 1-3, 1999, IEEE Computer Society, 0-7695-0312-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
45 | Andrzej Rucinski 0002, Barrett Stetson, S. T. P. Brundavani |
A DOT1 & DOT4 MOSIS - Compatible Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 83-84, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
43 | Charles E. Molnar, Ian W. Jones, William S. Coates, Jon K. Lexau |
A FIFO Ring Performance Experiment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 7-10 April 1997, Eindhoven, The Netherlands, pp. 279-289, 1997, IEEE Computer Society, 0-8186-7922-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
FIFO ring performance experiment, high-speed FIFO circuit, asynchronous FIFO, clocked shift register, pulse-like protocol, two-phase clocked design, MOSIS, internal FIFO stages, 3.3 V, 1.67 to 4.8 V, 0.6 micron, pipeline, SPICE, data path, hSpice, circuit delays |
43 | Mark R. Greenstreet |
Implementing a STARI chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 38-43, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
STARI chip, high-speed signaling technique, MOSIS 2/spl mu/ CMOS process, self-timed FIFO, robust compensation, clock skew, digital signal processing chips, CMOS digital integrated circuits, self-timed circuits, synchronous circuits, 2 micron, timing circuits |
43 | Gary C. Moyer, Mark Clements, Wentai Liu, Toby Schaffer, Ralph K. Cavin III |
A technique for high-speed, fine-resolution pattern generation and its CMOS implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 131-149, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high-speed fine-resolution pattern generation, data signals, edge placement, matched delays, MOSIS CMOS technology, 100 ps, 833 Mbit/s, architecture, delays, test pattern generators, network interfaces, CMOS digital integrated circuits, 1.2 micron |
43 | Jason P. Hurst, Adit D. Singh |
A differential built-in current sensor design for high speed IDDQ testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 419-423, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
built-in current sensor design, high speed IDDQ testing, differential architecture, quiescent current detection, BIST environment, n-well technology, MOSIS, 31.25 MHz, VLSI, built-in self test, built-in self-test, integrated circuit testing, design for testability, integrated circuit design, CMOS digital integrated circuits, electric current measurement, 2 micron, electric sensing devices |
43 | Yann Disser, Nils Mosis |
A unified worst case for classical simplex and policy iteration pivot rules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2309.14034, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
43 | Yann Disser, Nils Mosis |
A Unified Worst Case for Classical Simplex and Policy Iteration Pivot Rules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: 34th International Symposium on Algorithms and Computation, ISAAC 2023, December 3-6, 2023, Kyoto, Japan, pp. 27:1-27:17, 2023, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-289-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
43 | Júlia Baligács, Yann Disser, Nils Mosis, David Weckbecker |
An Improved Algorithm for Open Online Dial-a-Ride. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2210.13854, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
43 | Júlia Baligács, Yann Disser, Nils Mosis, David Weckbecker |
An Improved Algorithm for Open Online Dial-a-Ride. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WAOA ![In: Approximation and Online Algorithms - 20th International Workshop, WAOA 2022, Potsdam, Germany, September 8-9, 2022, Proceedings, pp. 154-171, 2022, Springer, 978-3-031-18366-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
43 | Sandra Vosbergen, Ersen B. Colkesen, Joyca Lacroix, Georgio Mosis, Pieter Jan Stappers, Roderik A. Kraaijenhagen, Niels Peek |
Assessment of user needs for self-management services in coronary heart disease: a designerly approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCE ![In: ECCE 2010 - European Conference on Cognitive Ergonomics, Delft, The Netherlands, August 25-27, 2010, Proceedings of the 28th annual conference of the European Association of Cognitive Ergonomics., pp. 343-344, 2010, Mediamatica, Delft University of Technology, The Netherlands / ACM, 978-1-60558-946-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
43 | Georgio Mosis, Albert E. Vlug, Mees Mosseveld, Jeanne P. Dieleman, Bruno C. Stricker, Johan van der Lei, Miriam C. J. M. Sturkenboom |
Application of Information Technology: A Technical Infrastructure to Conduct Randomized Database Studies Facilitated by a General Practice Research Database. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Am. Medical Informatics Assoc. ![In: J. Am. Medical Informatics Assoc. 12(6), pp. 602-607, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Tainá Thomassim Guimarães, Diego Henrique Diemmer Mariani, Lucas Silveira Kupssinskü, Pedro Rossa, Rafael Kenji Horota, Rafael de Freitas, Luiz Roupinha, Branda Eloá Weppo, Aline Weschenfelder, André Luiz Durante Spigolon, Luiz Gonzaga 0001, Maurício Roberto Veronez |
Mosis Lab Hyperspectral - Visualization and Correlation of Hyperspectral Data on Immersive Virtual Reality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2021, Brussels, Belgium, July 11-16, 2021, pp. 5747-5750, 2021, IEEE, 978-1-6654-0369-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
31 | Pedro Rossa, Julia Boesing Ponticelli, Luiz Gonzaga da Silveira Jr., Maurício Roberto Veronez, Caroline Lessio Cazarin, Rafael Kenji Horota, Alysson Soares Aires, Ademir Marques Jr., Eniuce Menezes De Souza, Gabriel Lanzer Kannenberg, Jean Luca de Fraga, Leonardo Santana, Demetrius Nunes Alves |
MOSIS V2: Immersive Virtual Outcrop Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: 2019 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2019, Yokohama, Japan, July 28 - August 2, 2019, pp. 6831-6834, 2019, IEEE, 978-1-5386-9154-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
31 | Pedro Rossa, Rafael Kenji Horota, Ademir Marques Junior, Alysson Soares Aires, Eniuce Menezes De Souza, Gabriel Lanzer Kannenberg, Jean Luca de Fraga, Leonardo Gomes Santana, Demetrius Nunes Alves, Julia Boesing, Luiz Gonzaga Jr., Maurício Roberto Veronez, Caroline Lessio Cazarin |
MOSIS: Immersive Virtual Field Environments for Earth Sciences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VR ![In: IEEE Conference on Virtual Reality and 3D User Interfaces, VR 2019, Osaka, Japan, March 23-27, 2019, pp. 1140-1141, 2019, IEEE, 978-1-7281-1377-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
31 | Bahram Javidi, Xin Shen, Adam S. Markman, Pedro Latorre Carmona, Adolfo Martínez Usó, José Martínez Sotoca, Filiberto Pla, Manuel Martínez-Corral, Genaro Saavedra, Yi-Pai Huang, Adrian Stern |
Multidimensional Optical Sensing and Imaging System (MOSIS): From Macroscales to Microscales. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 105(5), pp. 850-875, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
31 | Luiz Gonzaga Jr., Maurício Roberto Veronez, Demetrius Nunes Alves, Fabiane Bordin, Gabriel Lanzer Kannenberg, Fernando P. Marson, Francisco M. W. Tognoli, Leonardo Campos Inocencio |
MOSIS - Multi-outcrop sharing & interpretation system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: 2017 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2017, Fort Worth, TX, USA, July 23-28, 2017, pp. 5209-5212, 2017, IEEE, 978-1-5090-4951-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
31 | Grzegorz Deptuch |
3DIC multi-project fabrication run being organized by CMC/CMP/MOSIS and Tezzaron. ![Search on Bibsonomy](Pics/bibsonomy.png) |
3DIC ![In: IEEE International Conference on 3D System Integration, 3DIC 2010, Munich, Germany, 16-18 November 2010, pp. 1-10, 2010, IEEE, 978-1-4577-0526-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
31 | Hans Petter Dahle |
MOSIS project data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Combining the Advantages of Product Lines and Open Source ![In: Combining the Advantages of Product Lines and Open Source, 02.04. - 05.04.2008, 2008, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP BibTeX RDF |
|
31 | César A. Piña |
MOSIS: IC Prototyping and Low Volume Production Service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2001 International Conference on Microelectronics Systems Education, MSE 2001, Las Vegas, NV, USA, July 17-18, 2001, pp. 4-, 2001, IEEE Computer Society, 0-7695-1156-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Toby Schaffer, Andy Stanaski, Alan Glaser, Paul D. Franzon |
The NCSU Cadence Design Kit for IC Fabrication through MOSIS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: IEEE International Conference on Microelectronic Systems Education, MSE 1999, Arlington, Virginia, USA, July 19-21, 1999, pp. 88-89, 1999, IEEE Computer Society, 0-7695-0312-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
31 | Ronald F. Ayres |
A narrative history and description of MOSIS software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Softw. ![In: J. Syst. Softw. 43(1), pp. 67-82, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
31 | M. Weatherford |
MOSIS eyes the future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 17(2), pp. 80, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
31 | Jennifer Peltier, Wes Hansford |
Low cost, prototype ASIC and MCM fabrication and assembly from the MOSIS service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 1997 IEEE International Conference on Microelectronic Systems Education, MSE '97, Arlington, VA, USA, July 21-23, 1997, pp. 68-69, 1997, IEEE Computer Society, 0-8186-7996-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
31 | John Staudhammer |
Educational use of MOSIS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 1997 IEEE International Conference on Microelectronic Systems Education, MSE '97, Arlington, VA, USA, July 21-23, 1997, pp. 147-148, 1997, IEEE Computer Society, 0-8186-7996-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
31 | Felix Breitenecker, G. Schuster |
Modular Parallelization in the Simulation Project HYBSYS - The Mosis System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROSIM ![In: Eurosim 1992, Simulation Congress, Proceedings of the 1992 EUROSIM Conference, Capri, Italy, September 28 - October 4, 1992., pp. 129-134, 1992, Elsevier, 0-444-89331-8. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP BibTeX RDF |
|
31 | Yehuda Afek, Ronald F. Ayres, David Booth, Danny Cohen, Kathie Fry, Rick Gillespie, Joel Goldberg, Joe Green, David Hollenberg, George Lewicki, Terri Lewis, Lee Richardson, Barden Smith, Victoria Svoboda, Vance Tyree, Jasmin Witthoft |
Chips and Boards Through MOSIS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: Spring COMPCON'85, Digest of Papers, Thirtieth IEEE Computer Society International Conference, San Francisco, California, USA, February 25-28, 1985, pp. 184-186, 1985, IEEE Computer Society, 0-8186-0613-4. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP BibTeX RDF |
|
29 | James E. Stine, Johannes Grad, Ivan D. Castellanos, Jeff M. Blank, Vibhuti B. Dave, Mallika Prakash, Nick Iliev, Nathan Jachimiec |
A Framework for High-Level Synthesis of System-on-Chip Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2005 International Conference on Microelectronics Systems Education, MSE 2005, Anaheim, CA, USA, June 12-13, 2005, pp. 67-68, 2005, IEEE Computer Society, 0-7695-2374-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Paul E. Hasler, AiChen Low |
Programmable Low Dropout Voltage Regulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 459-462, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Johannes Grad, James E. Stine |
A Standard Cell Library for Student Projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 98-99, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Andreas Svendsen, Gøran K. Olsen, Jan Endresen, Thomas Moen, Erik Carlson, Kjell-Joar Alme, Øystein Haugen |
The Future of Train Signaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MoDELS ![In: Model Driven Engineering Languages and Systems, 11th International Conference, MoDELS 2008, Toulouse, France, September 28 - October 3, 2008. Proceedings, pp. 128-142, 2008, Springer, 978-3-540-87874-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
MoSiS, Train, model-driven development, signaling, DSL, interlocking |
15 | Eduardo Conrad Jr., Fernando da Rocha Paixão Cortes, Sergio Bampi, Alessandro Girardi |
Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 105-110, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
TAT, TST, association of transistors, measurements, device modeling |
15 | Fernando da Rocha Paixão Cortes, Sergio Bampi |
A 40mhz 70db gain variable gain amplifier design using the gm/id design method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 76-80, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Variable Gain Amplifier (VGA), cmos analog design, rf front-end, amplifier |
15 | Bradley A. Minch |
A simple class-AB transconductor in CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 69-72, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal |
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 294-299, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Nathaniel Ross Pinckney, Thomas Barr, Michael Dayringer, Matthew McKnett, Nan Jiang 0009, Carl Nygaard, David Money Harris, Joel Stanley, Braden Phillips |
A MIPS R2000 implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 102-107, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
RISC, MIPS |
15 | César Augusto Prior, Cesar Ramos Rodrigues, João Baptista dos Santos Martins, André Luiz Aita, Filipe Costa Beber Vieira |
Design of an integrated low power high CMRR instrumentation amplifier for biomedical applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 71-75, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
higth CMRR, low power, analog integrated circuits, current mode, instrumentation amplifier |
15 | Alexander Fish, Tomer Rothschild, Avichay Hodes, Yonatan Shoshan, Orly Yadid-Pecht |
Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2834-2837, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Bradley A. Minch |
Low-Voltage Wilson Current Mirrors in CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2220-2223, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Paul E. Hasler, Christopher M. Twigg |
An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 177-180, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Hisako Adachi, Shinji Nakamura |
Efficient Designs for Adder Comparator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISS ![In: Proceedings of the 41st Annual Conference on Information Sciences and Systems, CISS 2007, 14-16 March 2007, Johns Hopkins University, Department of Electrical Engineering, Baltimore, MD, USA, pp. 754, 2007, IEEE, 1-4244-1037-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Koichi Itoh, Masashi Yamazaki, Shinji Nakamura, Yasuo Nagazumi |
An Attempt Towards Charge-Domain Logic (CDL). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISS ![In: Proceedings of the 41st Annual Conference on Information Sciences and Systems, CISS 2007, 14-16 March 2007, Johns Hopkins University, Department of Electrical Engineering, Baltimore, MD, USA, pp. 732-736, 2007, IEEE, 1-4244-1037-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Sridhar Rajagopal, Joseph R. Cavallaro |
Truncated Online Arithmetic with Applications to Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(10), pp. 1240-1252, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Dynamic truncation, finite precision, communication systems, online arithmetic |
15 | James Moritz, Yichuang Sun |
100MHz, 6th order, leap-frog gm-C high Q bandpass filter and on-chip tuning scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar |
Power-adaptive operational amplifier with positive-feedback self biasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Volnei A. Pedroni, Ricardo U. Pedroni |
PLL-less clock multiplier with self-adjusting phase symmetry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Jesús Ezequiel Molinar-Solís, Felipe Gomez-Castañeda, Jose A. Moreno-Cadenas, Víctor Hugo Ponce Ponce |
Very fast programmable CNN based on FG-inverter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Timothy D. Strong, Steven M. Martin, Robert F. Franklin, Richard B. Brown |
Integrated electrochemical neurosensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Montree Siripruchyanun |
A Low-Voltage, Low-Power Current-mode Automatic Gain Control (AGC) for Battery-Powered Equipment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2006), 17-19 January 2006, Kuala Lumpur, Malaysia, pp. 410-413, 2006, IEEE Computer Society, 0-7695-2500-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Shweta Chary, Michael L. Bushnell |
Analog Macromodeling for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 818-823, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Jianwen Zhu, Fang Fang, Qianying Tang |
Calligrapher: a new layout-migration engine for hard intellectual property libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(9), pp. 1347-1361, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Shinji Nakamura, Yasuo Nagazumi |
Programmable matched filter by charge-domain operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4421-4424, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Vishal Gupta 0003, Gabriel A. Rincón-Mora |
A low dropout, CMOS regulator with high PSR over wideband frequencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4245-4248, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Gaurav Gulati, Erik Brunvand |
Design of a cell library for asynchronous microengines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 385-389, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
CMOS cell library, microprogramed control, asynchronous control, self-timed systems |
15 | Qianying Tang, Jianwen Zhu |
Two-Dimensional Layout Migration by Soft Constraint Satisfaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 35-39, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Fang Fang, Jianwen Zhu |
Automatic process migration of datapath hard IP libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 887-892, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Arunkumar Balasundaram, Angelo Pereira, Jun-Cheol Park, Vincent John Mooney III |
Golay and wavelet error control codes in VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 563-564, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Ravi Chawla, Guillermo J. Serrano, Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler |
Fully differential floating-gate programmable OTAs with novel common-mode feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 817-820, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul E. Hasler, Bradley A. Minch |
A fully programmable log-domain bandpass filter using multiple-input translinear elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 33-36, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Paul D. Smith, David W. Graham, Ravi Chawla, Paul E. Hasler |
A five-transistor bandpass filter element. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 861-864, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Fang Fang, Jianwen Zhu |
Calligrapher: A New Layout Migration Engine Based on Geometric Closeness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 25-30, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Donald W. Bouldin, Adam Miller, Chandra Tan |
Teaching Custom Integrated Circuit Design and Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 139-140, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Gary H. Bernstein, Jay B. Brockman, Peter M. Kogge, Gregory L. Snider, Barbara E. Walvoord |
From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 95-97, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Tetsuya Fujiwara, Yoshihiko Horio, Kazuyuki Aihara |
An integrated multi-scroll circuit with floating-gate MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 180-183, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Timothy Kuan-Ta Lu, Michael W. Baker, Christopher D. Salthouse, Ji-Jon Sit, Serhii M. Zhak, Rahul Sarpeshkar |
A micropower analog VLSI processing channel for bionic ears and speech-recognition front ends. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 41-44, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Han Jung Song, John G. Harris |
A CMOS neural oscillator using negative resistance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 152-155, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Haihua Yan, Adit D. Singh |
Experiments in Detecting Delay Faults using Multiple Higher Frequency Clocks and Results from Neighboring Die. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 105-111, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Alexandre Solomatnikov, Dinesh Somasekhar, Naran Sirisantana, Kaushik Roy 0001 |
Skewed CMOS: noise-tolerant high-performance low-power static circuit family. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(4), pp. 469-476, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Marcos Ferretti, Peter A. Beerel |
Single-Track Asynchronous Pipeline Templates Using 1-of-N Encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 1008-1015, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Albert H. Titus, Anand Gopalan |
A differential summing amplifier for analog VLSI systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 57-60, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Alex Yoondong Park, Steve H. Jen, Bing J. Sheu, Heesook Yoon, In Gyeom Kim |
An efficient parameter extraction method using statistical optimization in S-CMOS deep-submicron/nanometer model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 233-236, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Paul D. Smith, Matt Kucic, Richard Ellis, Paul E. Hasler, David V. Anderson |
Mel-frequency cepstrum encoding in analog floating-gate circuitry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 671-674, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Yi-Cheng Chang, Edwin W. Greeneich |
CMOS auto-ranging PLL for low-voltage wideband systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 779-782, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Andrzej Rucinski 0002, Barbara Dziurla-Rucinska |
Boundary Scan as a Test Solution in Microelectronics Curricula. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 214-218, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
IEEE 1149.4 standard, Education, Boundary scan |
15 | Richard J. Blaikie, Maan M. Alkaisi, Steven M. Durbin, David R. S. Cumming |
Teaching Integrated Circuit and Semiconductor Device Design in New Zealand: The University of Canterbury Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 223-229, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Semiconductor Devices, Education, Integrated Circuit |
15 | Jo C. Ebergen |
Squaring the FIFO in GasP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 11-14 March 2001, Salt Lake City, UT, USA, pp. 194-205, 2001, IEEE Computer Society, 0-7695-1034-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
15 | Kinya Matsuda, Yoshihiko Horio, Kazuyuki Aihara |
A simulated LC oscillator using multi-input floating-gate MOSFETS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 763-766, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
15 | Gin Yee, Carl Sechen |
Clock-delayed domino for dynamic circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(4), pp. 425-430, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
15 | Victor Varshavsky, Vyacheslav Marakhovsky |
Beta-CMOS Artificial Neuron and Implementability Limits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWANN (2) ![In: Engineering Applications of Bio-Inspired Artificial Neural Networks, International Work-Conference on Artificial and Natural Neural Networks, IWANN '99, Alicante, Spain, June 2-4, 1999, Proceedings, Volume II, pp. 117-128, 1999, Springer. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Bill Coates 0001, Jo C. Ebergen, Jon K. Lexau, Scott Fairbanks, Ian W. Jones, Alex Ridgway, David Money Harris, Ivan E. Sutherland |
A Counterflow Pipeline Experiment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 19-22 April 1999, Barcelona, Spain, pp. 161-172, 1999, IEEE Computer Society, 0-7695-0031-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Alexandre F. Tenca, Milos D. Ercegovac |
On the Design of High-Radix On-Line Division for Long Precision. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia, pp. 44-51, 1999, IEEE Computer Society, 0-7695-0116-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Zhen Luo, Margaret Martonosi, Pranav Ashar |
An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 158-167, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Scanline Algorithm, Configurable Hardware, FPGA, DRC |
15 | Jing Shen, Koichi Tanno, Okihiko Ishizuka |
Down Literal Circuit with Neuron-MOS Transistors and Its Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 29th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1999, Freiburg im Breisgau, Germany, May 20-22, 1999, Proceedings, pp. 180-185, 1999, IEEE Computer Society, 0-7695-0161-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Yoshihiko Horio, Izumi Kobayashi, Masato Kawakami, Hiroshi Hayashi, Kazuyuki Aihara |
Switched-capacitor multi-internal-state chaotic neuron circuit with unipolar and bipolar output functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 438-441, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | A. Rasmussen, Mona E. Zaghloul |
The design and fabrication of microfluidic flow sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 136-139, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Louiza Sellami, Robert W. Newcomb |
A MOSFET bridge fluid biosensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 140-143, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Kai He, Gert Cauwenberghs |
An area-efficient analog VLSI architecture for state-parallel Viterbi decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 432-435, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Wuping Chen, Hongwei Duan, S. H. Jones |
Integrated 1.2 um CMOS photodiodes, transimpedance amplifier, 12 bits A/D converter, and DSP interface for microinstrument applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 210-213, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Octavio A. González, Gunhee Han, José Pineda de Gyvez, Edgar Sánchez-Sinencio |
CMOS cryptosystem using a Lorenz chaotic oscillator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 442-445, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Roman Genov, Gert Cauwenberghs |
16-channel single-chip current-mode track-and-hold acquisition system with 100 dB dynamic range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 350-353, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Hoda S. Abdel-Aty-Zohdy, Mahmoud Al-Nsour |
Reinforcement learning neural network circuits for electronic nose. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 379-382, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Lim Chu Aun, S. M. Rezaul Hasan |
An all Digital BiCMOS Phase Lock Loop for VLSI Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 318-320, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Hoda S. Abdel-Aty-Zohdy, Mahmoud Al-Nsour |
Digital Neural Processing Unit for Electronic Nose. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 236-237, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Neural Networks, Reinforcement Learning, ASIC, Digital Design, Electronic Nose |
15 | Robert L. Coultrip |
A CMOS binary pattern classifier based on Parzen's method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Neural Networks ![In: IEEE Trans. Neural Networks 9(1), pp. 2-10, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
15 | William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland |
A FIFO Data Switch Design Experiment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March - 2 April 1998, San Diego, CA, USA, pp. 4-, 1998, IEEE Computer Society, 0-8186-8392-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Data Switch, P**3, Asynchronous, FIFO |
15 | Ross Smith, Karl Fant, Dave Parker, Rick Stephani, Ching-Yi Wang |
An Asynchronous 2-D Discrete Cosine Transform Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March - 2 April 1998, San Diego, CA, USA, pp. 224-, 1998, IEEE Computer Society, 0-8186-8392-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
DCT, asynchronous, threshold logic, bit-serial |
15 | Suhwan Kim, Marios C. Papaefthymiou |
True single-phase energy-recovering logic for low-power, high-speed VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 167-172, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
15 | Tamara I. Ahrens, Thomas H. Lee |
A 1.4-GHz 3-mW CMOS LC low phase noise VCO using tapped bond wire inductances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 16-19, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
15 | Robert H. Caverly |
Development of a CMOS Cell Library for RF Wireless and Telecommunications Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 258-263, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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