Search results for "Spice"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
69	Tobias Thiel	Have I Really Met Timing? - Validating PrimeTime Timing Reports with Spice.	DATE	2004	DBLP DOI BibTeX RDF
68	Linda Ibrahim	Developing the Enterprise SPICE Strategy Using Enterprise SPICE.	SPICE	2013	DBLP DOI BibTeX RDF
68	Sharmistha Kar, Satyabrata Das 0001, Amiya Kumar Rath, Subrata Kumar Kar	Self-assessment Model and Review Technique for SPICE: SMART SPICE.	SPICE	2012	DBLP DOI BibTeX RDF
68	Clênio F. Salviano	Process Improvement in an R&D&I Center Using Enterprise SPICE and SPICE for Research Models.	SPICE	2011	DBLP DOI BibTeX RDF
63	Savithri Sundareswaran, David T. Blaauw, Abhijit Dharchoudhury	A Three-Tier Assertion Technique for Spice Verification of Transistor Level Timing Analysis.	VLSI Design	1999	DBLP DOI BibTeX RDF	spice verification, primary-path, secondary-path, timing analysis, assertion, assertibility
61	Gihan Kim, Minkwang Lee, Jongphil Lee, Kyungwhan Lee	Design of SPICE Experience Factory Model Accumulation and Utilization of Process Assessment Experience.	SERA	2005	DBLP DOI BibTeX RDF
55	R. D. Freeman, S. M. Kang, C. G. Lin-Hendel, M. L. Newby	Automated extraction of SPICE circuit models from symbolic gate matrix layout with pruning.	DAC	1986	DBLP DOI BibTeX RDF	SPICE
54	Kiyotaka Yamamura, Wataru Kuroki, Yasuaki Inoue	Path following circuits - SPICE-oriented numerical methods where formulas are described by circuits $.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
52	J. David Patón-Romero, Moisés Rodríguez, Mario Piattini	A SPICE-Based Maturity Model for the Governance and Management of Green IT.	SPICE	2017	DBLP DOI BibTeX RDF
52	Dirk Pfauder, Tomas Schweigert, Paul Hendriks	SPICE in the Real World: Success for Large Infrastructural Projects with ISO/IEC 15504 Part 6.	SPICE	2017	DBLP DOI BibTeX RDF
52	Tomas Schweigert, Klaudia Dussa-Zieger	Testing in Automotive SPICE and TestSPICE: Synergies and Benefits.	SPICE	2017	DBLP DOI BibTeX RDF
52	Michael Boronowsky, Ieva Mitasiunaite-Besson, Antanas Mitasiunas, David Wewetzer, Tanja Woronowicz	Enterprise SPICE Extension for Smart Specialization Based Regional Innovation Strategy.	SPICE	2017	DBLP DOI BibTeX RDF
52	Linda Ibrahim, Ernest Wallmüller, Wolfgang Daschner	Using Enterprise SPICE in Very Small Entities.	SPICE	2016	DBLP DOI BibTeX RDF
52	Alvaro Fernández del Carpio, Leonardo Bermón Angarita	Towards the Development of a Framework for Encouraging the Learning of SPICE Model by Using Knowledge Graphs.	SPICE	2015	DBLP DOI BibTeX RDF
52	Detlev Hantke	An Approach for Combining SPICE and SCRUM in Software Development Projects.	SPICE	2015	DBLP DOI BibTeX RDF
52	Jérémy Besson, Antanas Mitasiunas, Saulius Ragaisis	Enterprise SPICE Export Extension.	SPICE	2014	DBLP DOI BibTeX RDF
52	Antoni Lluís Mesquida, Antònia Mas Picahaco, Marion Lepmets, Alain Renault	Development of the Project Management SPICE (PMSPICE) Framework.	SPICE	2014	DBLP DOI BibTeX RDF
52	Valentine Casey, Fergal McCaffery	The Development and Current Status of Medi SPICE.	SPICE	2013	DBLP DOI BibTeX RDF
52	Michael Boronowsky, Antanas Mitasiunas, Jonas Ragaisis, Tanja Woronowicz	An Approach to Development of an Application Dependent SPICE Conformant Process Capability Model.	SPICE	2013	DBLP DOI BibTeX RDF
52	Ricardo Eito-Brun	Comparing SPiCE for Space (S4S) and CMMI-DEV: Identifying Sources of Risk from Improvement Models.	SPICE	2013	DBLP DOI BibTeX RDF
52	Alec Dorling, Fergal McCaffery	The Gamification of SPICE.	SPICE	2012	DBLP DOI BibTeX RDF
52	Amalia Alvarez, Santiago Matalonga, Tomás San Feliu Gilabert	A Case Study on Process Composition Using Enterprise SPICE Model.	SPICE	2012	DBLP DOI BibTeX RDF
52	Anna Orecka, Sebastian Dawid, Rafal Dzianach	Best Practices for Achieving Automotive SPICE Capability Level 3.	SPICE	2012	DBLP DOI BibTeX RDF
52	Valentine Casey, Fergal McCaffery	Development of the Medi SPICE PRM.	SPICE	2012	DBLP DOI BibTeX RDF
52	Bernhard Sechser	Functional Safety - SPICE for Professionals?	SPICE	2011	DBLP DOI BibTeX RDF
52	M. S. Sivakumar, Valentine Casey, Fergal McCaffery, Gerry Coleman	Verification & Validation in Medi SPICE.	SPICE	2011	DBLP DOI BibTeX RDF
52	Timo Karasch, Jens Peter Benthaus	Methodical Enhancement of Maturity Level: "SPICE" and "SixSigma" Intertwine.	SPICE	2011	DBLP DOI BibTeX RDF
52	Per Johannessen, Öjvind Halonen, Ola Örsmark	Functional Safety Extensions to Automotive SPICE According to ISO 26262.	SPICE	2011	DBLP DOI BibTeX RDF
52	Celestina Bianco	Agile and SPICE Capability Levels.	SPICE	2011	DBLP DOI BibTeX RDF
48	Yea-Ling Horng, Jing-Reng Huang, Tsin-Yuan Chang	A realistic fault model for flash memories.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	NAND circuits, faulty behavior classification, NAND-type flash memory, SPICE models, flash cell models, circuit-level faulty behavior simulation, testing, fault model, fault modeling, fault simulation, flash memories, flash memories, circuit analysis computing, SPICE, integrated memory circuits
48	Keying Wu, P. K. H. Ng, Xing Dong Jia, Richard M. M. Chen, A. M. Layfield	Performance tuning of a multiprocessor sparse matrix equation solver.	HICSS (1)	1995	DBLP DOI BibTeX RDF	multiprocessor sparse matrix equation solver, sparse matrix equation, linear simultaneous equations, electrical circuit, multiprocessor implementation, parallel direct method, parallel algorithms, circuit analysis computing, SPICE, SPICE, circuit simulation, sparse matrices, performance tuning
48	Mustafa Celik, Andreas C. Cangellaris	A general dispersive multiconductor transmission line model for interconnect simulation in SPICE.	ICCAD	1996	DBLP DOI BibTeX RDF	multiconductor transmission lines, interconnect simulation, Chebyshev approximation, SPICE, transient analysis
47	Bhaskar Vanamali, Fabio Bella, Klaus A. Hörmann	From CMMI to SPICE - Experiences on How to Survive a SPICE Assessment Having Already Implemented CMMI.	COMPSAC	2008	DBLP DOI BibTeX RDF	Systems and Software Process Improvement, SPI Methods and Tools, Case, Industrial Experiences
47	Andrew B. Kahng, Kei Masuko, Sudhakar Muddu	Analytical delay models for VLSI interconnects under ramp input.	ICCAD	1996	DBLP DOI BibTeX RDF	SPICE-computed delay, VLSI routing topologies layout, analytical delay models, arbitrary interconnect trees, interconnect transfer function, performance-driven synthesis, ramp input, source-sink delays, VLSI, Elmore delay, interconnect delays, VLSI interconnects, RLC interconnections
46	Sridhar Tirumala, Yuri Mahotin, Xiao Lin, Victor Moroz, Lee Smith, S. Krishnamurthy, L. Bomholt, Dipu Pramanik	Bringing Manufacturing into Design via Process-Dependent SPICE Models.	ISQED	2006	DBLP DOI BibTeX RDF
46	Rui Tang, Fengming Zhang, Yong-Bin Kim	Quantum-dot cellular automata SPICE macro model.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	QCA macro modeling
46	Rudie van de Haar, Jaap Hoekstra, Roelof H. Klunder	A SPICE model for single electronics.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
46	Andrew C. Jones, Xuebiao Xu, Nick Pittas, W. A. Gray, Nick J. Fiddian, Richard J. White, John S. Robinson, Frank A. Bisby, Sue M. Brandt	SPICE: A Flexible Architecture for Integrating Autonomous Databases to Comprise a Distributed Catalogue of Life.	DEXA	2000	DBLP DOI BibTeX RDF
46	Shenggao Li, Brian Okoon, Mona Mostafa Hella, Mohammed Ismail 0001, Maya Rubeiz	The Implementation of a VHDL-AMS to SPICE Converter.	J. VLSI Signal Process.	1999	DBLP DOI BibTeX RDF
46	Michael J. Van der Tol, Savvas G. Chamberlain	Buried-channel MOSFET model for SPICE.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
46	William Nye, David C. Riley, Alberto L. Sangiovanni-Vincentelli, André L. Tits	DELIGHT.SPICE: an optimization-based system for the design of integrated circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
44	Andrea L. Hartzler, Serena Jinchen Xie, Patrick Wedgeworth, Carolin Spice, Kevin Lybarger, Brian R Wood, Herbert Duber, Gary Hsieh, Angad P. Singh, Kase Cragg, Shoma Goomansingh, Searetha Simons, J. J. Wong, Angeilea' Yancey-Watson	Integrating patient voices into the extraction of social determinants of health from clinical notes: ethical considerations and recommendations.	J. Am. Medical Informatics Assoc.	2023	DBLP DOI BibTeX RDF
44	Caroline Spice, Anjulie Ganti, Houda Benlhabib	So you want to talk about race[1] and genetics?	ICHI	2023	DBLP DOI BibTeX RDF
44	Samuel Mascarenhas, Manuel Guimarães, Rui Prada, João Dias, Pedro Alexandre Santos, Kam Star, Ben Hirsh, Ellis Spice, Rob Kommeren	A Virtual Agent Toolkit for Serious Games Developers.	CIG	2018	DBLP DOI BibTeX RDF
40	Masayuki Tsukisaka, Takashi Nanya	A testable design for asynchronous fine-grain pipeline circuits.	PRDC	2000	DBLP DOI BibTeX RDF	asynchronous fine-grain pipeline circuits, dynamic gates, high-performance datapath design, pipeline latches, scan latch libraries, logic testing, logic CAD, SPICE, CMOS technology, scan path, SPICE simulation, testable design
40	Michel Renovell, P. Huc, Yves Bertrand	Serial transistor network modeling for bridging fault simulation.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	serial transistor network modeling, voting model, biased voting model, relative transistor strength, SPICE pre-simulation, fault simulation procedure, CMOS logic, fault diagnosis, logic testing, integrated circuit testing, digital simulation, circuit analysis computing, CMOS logic circuits, SPICE, integrated circuit modelling, bridging fault simulation
40	Nestoras Tzartzanis, William C. Athas	Design and analysis of a low-power energy-recovery adder.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	energy-recovery adder, frequency range, VLSI, VLSI, delays, logic CAD, circuit analysis computing, integrated circuit design, adders, CMOS logic circuits, CMOS logic circuits, circuit CAD, SPICE, SPICE simulation, delay time, energy dissipation
40	Nagaraj Subramanyam, K. G. Praveen, Ramesh Ramani, D. Suryanarayana	CODAC-a characterization system for digital and analog circuits.	VLSI Design	1995	DBLP DOI BibTeX RDF	CODAC, characterization system, electrical simulator, procedural interface, customized analysis functions, parallel processing, circuit analysis computing, Monte Carlo methods, circuit CAD, SPICE, SPICE, analog circuits, digital circuits, CAD tool, digital integrated circuits, analogue integrated circuits, circuit analysis, Monte Carlo analysis
40	Kai Strunz, Qianli Su	Stochastic formulation of SPICE-type electronic circuit simulation with polynomial chaos.	ACM Trans. Model. Comput. Simul.	2008	DBLP DOI BibTeX RDF	Galerkin projection, electronic circuit, nonsampling stochastic analysis, tolerance analysis, SPICE, circuit simulation, spectral methods, transients, power electronics, stochastic differential equations, polynomial chaos, Circuit modeling
40	Amr M. Bayoumi, Yasser Y. Hanafy	Massive parallelization of SPICE device model evaluation on GPU-based SIMD architectures.	IFMT	2008	DBLP DOI BibTeX RDF	BSIM, parallel computing, graphics processing units, GPGPU, SIMD, SPICE, manycore
40	Fabrizio Fabbrini, Mario Fusani, Giuseppe Lami, Edoardo Sivera	Integrating Joint Reviews with Automotive SPICE Assessments Results.	ICSP	2008	DBLP DOI BibTeX RDF	Joint Reviews, Automotive SPICE, Software Process Improvement, Software Process Assessment
40	Vishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne P. Burleson	NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods.	SLIP	2004	DBLP DOI BibTeX RDF	on-chip, spice-based, network-on-chip, interconnects, signaling
40	Fabio Bella, Klaus A. Hörmann, Bhaskar Vanamali	From CMMI to SPICE - Experiences on How to Survive a SPICE Assessment Having Already Implemented CMMI.	PROFES	2008	DBLP DOI BibTeX RDF	Systems and Software Process Improvement, SPI Methods and Tools, Industrial Experiences and Case Studies, Automotive and Transportation Systems, Lessons Learned, Process Assessment
39	Venkata Rajesh Mekala, Venkata Rakesh Mekala	Methodology for Characterization of NOR-NOR Programmable Logic Array.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	H-Spice
39	Xiaolue Lai, Jaijeet S. Roychowdhury	Advanced tools for simulation and design of oscillators/PLLs.	ASP-DAC	2007	DBLP DOI BibTeX RDF	jitter analysis, automated oscillator, macromodeling technique, amplitude macromodels, injection locking prediction, coupled oscillating systems, SPICE, PLL
39	Masayoshi Oda, Yoshihiro Yamagami, Yoshifumi Nishio, Junji Kawata, Akio Ushida	A new Spice-oriented frequency-domain optimization technique.	ISCAS	2006	DBLP DOI BibTeX RDF
39	Hao Ji, Qingjian Yu, Wayne Wei-Ming Dai	SPICE compatible circuit models for partial reluctance K.	ASP-DAC	2004	DBLP DOI BibTeX RDF
39	Ann Cass, Christian Völcker, Philipp Sutter, Alec Dorling, Hans Stienen	SPiCE in Action - Experiences in Tailoring and Extension.	EUROMICRO	2002	DBLP DOI BibTeX RDF
39	Mayukh Bhattacharya, Pinaki Mazumder	Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
39	Ying Wang, Han Ngee Tan	The Development of Analog SPICE Behavioral Model Based on IBIS Model.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
38	Kanupriya Gulati, John F. Croix, Sunil P. Khatri, Rahm Shastry	Fast circuit simulation on graphics processing units.	ASP-DAC	2009	DBLP DOI BibTeX RDF
36	Antònia Mas, Antoni Lluís Mesquida, Rory V. O'Connor, Terry Rout, Alec Dorling (eds.)	Software Process Improvement and Capability Determination - 17th International Conference, SPICE 2017, Palma de Mallorca, Spain, October 4-5, 2017, Proceedings	SPICE	2017	DBLP DOI BibTeX RDF
36	Kival Chaves Weber, Cristina Filipak Machado, Renato Ferraz Machado, Ana Liddy Magalhães, Ana Marcia Debiasi Duarte, Maria Teresa Villalobos Aguayo, Cristiano Schwening, Rosane Melchionna, José Antonio Antonioni	A Process Reference Model and A Process Assessment Model to Foster R&D&I Management in Organizations: MGPDI.	SPICE	2017	DBLP DOI BibTeX RDF
36	Gabriel S. S. Leal, Wided Guédria, Hervé Panetto, Erik Proper	Towards a Semi-automated Tool for Interoperability Assessment: An Ontology-Based Approach.	SPICE	2017	DBLP DOI BibTeX RDF
36	Fabio Falcini, Giuseppe Lami	Deep Learning in Automotive: Challenges and Opportunities.	SPICE	2017	DBLP DOI BibTeX RDF
36	Anup Shrestha, Aileen Cater-Steel, Mark Toleman, Terry Rout	The Role of International Standards to Corroborate Artefact Development and Evaluation: Experiences from a Design Science Research Project in Process Assessment.	SPICE	2017	DBLP DOI BibTeX RDF
36	Alvaro Fernández del Carpio	A Multi-layer Representation Model for the ISO/IEC 33000 Assessment Framework: Analysing Composition and Behaviour.	SPICE	2017	DBLP DOI BibTeX RDF
36	Tatsuya Nonoyama, Lian Wen, Terry Rout, David Tuffley	Cultural Issues and Impacts of Software Process in Very Small Entities (VSEs).	SPICE	2017	DBLP DOI BibTeX RDF
36	Gerard Marks, Rory V. O'Connor, Paul M. Clarke	The Impact of Situational Context on the Software Development Process - A Case Study of a Highly Innovative Start-up Organization.	SPICE	2017	DBLP DOI BibTeX RDF
36	Mikhel Vunk, Nicolas Mayer, Raimundas Matulevicius	A Framework for Assessing Organisational IT Governance, Risk and Compliance.	SPICE	2017	DBLP DOI BibTeX RDF
36	Béatrix Barafort, Anup Shrestha, Stéphane Cortina	The Evolution of the TIPA Framework: Towards the Automation of the Assessment Process in a Design Science Research Project.	SPICE	2017	DBLP DOI BibTeX RDF
36	Xabier Larrucea, Izaskun Santamaría	Comparing SPI Survival Studies in Small Settings.	SPICE	2017	DBLP DOI BibTeX RDF
36	Nuria Hurtado, Mercedes Ruiz, Cristina Capitas, Elena Orta	Applying Agent-Based Simulation to the Improvement of Agile Software Management.	SPICE	2017	DBLP DOI BibTeX RDF
36	Ebru Gökalp, Umut Sener, P. Erhan Eren	Development of an Assessment Model for Industry 4.0: Industry 4.0-MM.	SPICE	2017	DBLP DOI BibTeX RDF
36	Vincent Ribaud, Vincent Leilde	Relating Student, Teacher and Third-Party Assessments in a Bachelor Capstone Project.	SPICE	2017	DBLP DOI BibTeX RDF
36	Alejandro Calderón 0002, Mercedes Ruiz, Rory V. O'Connor	Coverage of the ISO 21500 Standard in the Context of Software Project Management by a Simulation-Based Serious Game.	SPICE	2017	DBLP DOI BibTeX RDF
36	Özden Özcan Top, Fergal McCaffery	How Does Scrum Conform to the Regulatory Requirements Defined in MDevSPICE®?	SPICE	2017	DBLP DOI BibTeX RDF
36	Murat Salmanoglu, Onur Demirörs, Ahmet Coskunçay, Ali Yildiz	Exploration of a Practical Approach for Assessing the Measurement Capability of Software Organizations.	SPICE	2017	DBLP DOI BibTeX RDF
36	Håvard Myrbakken, Ricardo Colomo Palacios	DevSecOps: A Multivocal Literature Review.	SPICE	2017	DBLP DOI BibTeX RDF
36	Peter H. Carstensen, Otto Vinter	Aspects You Should Consider in Your Action Plan When Implementing an Improvement Strategy.	SPICE	2017	DBLP DOI BibTeX RDF
36	Serhan Olgun, Murat Yilmaz 0001, Paul M. Clarke, Rory V. O'Connor	A Systematic Investigation into the Use of Game Elements in the Context of Software Business Landscapes: A Systematic Literature Review.	SPICE	2017	DBLP DOI BibTeX RDF
36	Elena Orta, Mercedes Ruiz, Alejandro Calderón 0002, Nuria Hurtado	Gamification for Improving IT Service Incident Management.	SPICE	2017	DBLP DOI BibTeX RDF
36	Edward Kabaale, Lian Wen, Zhe Wang 0001, Terry Rout	An Axiom Based Metamodel for Software Process Formalisation: An Ontology Approach.	SPICE	2017	DBLP DOI BibTeX RDF
36	Julián Alberto García-García, Ayman Meidan, Antonio Vázquez Carreño, Manuel Mejías Risoto	A Model-Driven Proposal to Execute and Orchestrate Processes: PLM4BS.	SPICE	2017	DBLP DOI BibTeX RDF
36	Clênio F. Salviano	Evaluation Model of PRO2PI-WORK4E Method for Teaching Software Process Improvement.	SPICE	2017	DBLP DOI BibTeX RDF
36	Milos Jovanovic 0003, Antoni Lluís Mesquida, Antònia Mas, Bojan Lalic	Towards the Development of a Sequential Framework for Agile Adoption.	SPICE	2017	DBLP DOI BibTeX RDF
36	Angel Marcelo Rea-Guaman, Tomás San Feliu Gilabert, José Antonio Calvo-Manzano, Isaac Daniel Sanchez-Garcia	Comparative Study of Cybersecurity Capability Maturity Models.	SPICE	2017	DBLP DOI BibTeX RDF
36	Carmen L. Carvajal, Ana María Moreno 0001	The Maturity of Usability Maturity Models.	SPICE	2017	DBLP DOI BibTeX RDF
36	Silvana Togneri MacMahon, Todd Cooper, Fergal McCaffery	A Proposed Approach to the Revision of IEC 80001-1 Following Annex SL.	SPICE	2017	DBLP DOI BibTeX RDF
36	Béatrix Barafort, Antoni Lluís Mesquida, Antònia Mas	Developing an Integrated Risk Management Process Model for IT Settings in an ISO Multi-standards Context.	SPICE	2017	DBLP DOI BibTeX RDF
36	Linda Ibrahim, Antanas Mitasiunas	Towards a Strategy for Process Improvement Education and Training.	SPICE	2017	DBLP DOI BibTeX RDF
36	Carlos J. Torrecilla Salinas, Tatiana Guardia, Olga De Troyer, Manuel Mejías, Jorge Sedeño	NDT-Agile: An Agile, CMMI-Compatible Framework for Web Engineering.	SPICE	2017	DBLP DOI BibTeX RDF
36	Abiodun Ogunyemi, David Lamas, Jan Stage, Marta Lárusdóttir	Assessment Model for HCI Practice Maturity in Small and Medium Sized Software Development Companies.	SPICE	2017	DBLP DOI BibTeX RDF
36	Sezen Erdem, Onur Demirörs	An Exploratory Study on Usage of Process Mining in Agile Software Development.	SPICE	2017	DBLP DOI BibTeX RDF
36	Diogo Proença, José Borbinha	A Formalization of the ISO/IEC 15504: Enabling Automatic Inference of Capability Levels.	SPICE	2017	DBLP DOI BibTeX RDF
36	Mehvish Rashid, Paul M. Clarke, Rory V. O'Connor	Exploring Knowledge Loss in Open Source Software (OSS) Projects.	SPICE	2017	DBLP DOI BibTeX RDF
36	Paul M. Clarke, Rory V. O'Connor, Terry Rout, Alec Dorling (eds.)	Software Process Improvement and Capability Determination - 16th International Conference, SPICE 2016, Dublin, Ireland, June 9-10, 2016, Proceedings	SPICE	2016	DBLP DOI BibTeX RDF
36	Ebru Gökalp, Onur Demirörs	Developing Process Definition for Financial and Physical Resource Management Process in Government Domain.	SPICE	2016	DBLP DOI BibTeX RDF
36	Edward Kabaale, Lian Wen, Zhe Wang 0001, Terry Rout	Representing Software Process in Description Logics: An Ontology Approach for Software Process Reasoning and Verification.	SPICE	2016	DBLP DOI BibTeX RDF
36	Dina Salah, Richard F. Paige, Paul A. Cairns	A Maturity Model for Integrating Agile Processes and User Centred Design.	SPICE	2016	DBLP DOI BibTeX RDF