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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 60 occurrences of 39 keywords
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Results
Found 39 publication records. Showing 39 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
40 | Marcia G. Méndez-Rivera, Alberto Valdes-Garcia, José Silva-Martínez, Edgar Sánchez-Sinencio |
An On-Chip Spectrum Analyzer for Analog Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(3), pp. 205-219, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
analog IC test, built-in testing, frequency response, switched-capacitor circuits |
37 | Kozo Kinoshita, Kewal K. Saluja |
Built-In Testing of Memory Using an On-Chip Compact Testing Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 35(10), pp. 862-870, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
weight-sensitive faults, random- access memory (RAM), Built-in self-testing (BIST), stuck-at faults, built-in testing (BIT), pattern-sensitive faults, hardware complexity |
37 | Eiji Fujiwara, Nobuo Mutoh, Kohji Matsuoka |
A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 33(6), pp. 578-583, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
self-verification, error-detection ability, group-parity prediction checker, self-testing, Built-in testing, duplication, self-checking checker, fault-detection ability |
32 | Sampath Rangarajan, Donald S. Fussell, Miroslaw Malek |
Built-In Testing of Integrated Circuit Wafers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 39(2), pp. 195-205, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
integrated circuit wafers, silicon wafers, VLSI, integrated circuit testing, automatic testing, built-in testing, production testing |
32 | El Mostapha Aboulhamid, Eduard Cerny |
A Class of Test Generators for Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(10), pp. 957-959, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
test set compression, Anti-self-dual functions, test generator, coding, built-in testing |
28 | Irena Pavlova, Mikael Åkerholm, Johan Fredriksson |
Application of built-in-testing in component-based embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ROSATEA ![In: Proceedings of the 2006 Workshop on Role of Software Architecture for Testing and Analysis, held in conjunction with the ACM SIGSOFT International Symposium on Software Testing and Analysis (ISSTA 2006), ROSATEA 2006, Portland, Maine, USA, July 17-20, 2006, pp. 51-52, 2006, ACM, 1-59593-459-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Alberto Valdes-Garcia, Radhika Venkatasubramanian, Rangakrishnan Srinivasan, José Silva-Martínez, Edgar Sánchez-Sinencio |
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA, pp. 249-254, 2005, IEEE Computer Society, 0-7695-2314-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Marcia G. Méndez-Rivera, José Silva-Martínez, Edgar Sánchez-Sinencio |
On-chip spectrum analyzer for built-in testing analog ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 61-64, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Sami Beydeda |
Research in testing COTS components - built-in testing approaches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: 2005 ACS / IEEE International Conference on Computer Systems and Applications (AICCSA 2005), January 3-6, 2005, Cairo, Egypt, pp. 101, 2005, IEEE Computer Society, 0-7803-8735-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Kozo Kinoshita, Kewal K. Saluja |
Built-in Testing of Memory Using On-chip Compact Testing Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings International Test Conference 1984, Philadelphia, PA, USA, October 1984, pp. 271-281, 1984, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP BibTeX RDF |
|
16 | Sheng Zhang 0008, Sharad C. Seth, Bhargab B. Bhattacharya |
Efficient Test Compaction for Pseudo-Random Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 337-342, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
built-in testing, test-data compression, Test compaction, pseudo-random testing |
16 | Irith Pomeranz, Sudhakar M. Reddy |
A Storage-Based Built-In Test Pattern Generation Method for Scan Circuits Based on Partitioning and Reduction of a Precomputed Test Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(11), pp. 1282-1293, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
scan circuits, Built-in testing, Cartesian product |
16 | Érika F. Cota, Fernanda Lima 0001, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis 0001 |
Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(2), pp. 149-161, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
integrated circuits radiation effects, aerospace testing, built-in-testing, microprocessor testing |
16 | Hal Wasserman, Manuel Blum 0001 |
Software reliability via run-time result-checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 44(6), pp. 826-849, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
self-correcting, fault tolerance, debugging, Fourier transform, concurrent error detection, built-in testing, result-checking |
16 | Manuel Blum 0001, Hal Wasserman |
Reflections on the Pentium Bug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 45(4), pp. 385-393, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Pentium, fault tolerance, reliability, verification, concurrent error detection, Built-in testing, result-checking |
16 | Wojciech Maly, Marek J. Patyra |
Design of ICs applying built-in current testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 3(4), pp. 397-406, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
BIC-testing, Built-in testing, current testing |
16 | William H. McAnney, Jacob Savir |
Built-In Checking of the Correct Self-Test Signature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(9), pp. 1142-1145, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
self-test signature, initial value, signature register, single observation, logic testing, automatic testing, built-in testing |
16 | Melvin A. Breuer, Asad A. Ismaeel |
Roving Emulation as a Fault Detection Mechanism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 35(11), pp. 933-939, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
digital systems testing, roving emulation, simulation, fault detection, emulation, Built-in testing, error latency |
16 | Kewal K. Saluja, Kozo Kinoshita |
Test Pattern Generation for API Faults in RAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 34(3), pp. 284-287, 1985. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
static pattern-sensitive faults, fault detection, Built-in testing, random-access memory, pattern-sensitive faults |
16 | Manjiri L. Karandikar, Snehprabha Lad |
A Review of On-Chip Spectral Analysis for Built-In Testing Using FFT Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICETET ![In: 7th International Conference on Emerging Trends in Engineering & Technology, ICETET 2015, Kobe, Japan, November 18-20, 2015, pp. 7-9, 2015, IEEE, 978-1-4673-8305-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Hari Chauhan, Yongsuk Choi, Marvin Onabajo, In-Seok Jung, Yong-Bin Kim |
Accurate and Efficient On-Chip Spectral Analysis for Built-In Testing and Calibration Approaches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 22(3), pp. 497-506, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Josep Altet, Eduardo Aldrete-Vidrio, Ferran Reverter, Didac Gómez, José Luis González 0001, Marvin Onabajo, José Silva-Martínez, B. Martineau, X. Perpiñà, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Xavier Aragonès, Xavier Jordà, Miquel Vellvehí, Stefan Dilhaire, Salvador Mir, Diego Mateo |
Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014, pp. 1081-1084, 2014, IEEE, 978-1-4799-4134-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Abhijit Chatterjee, Donghoon Han, Vishwanath Natarajan, Shyam Kumar Devarakond, Shreyas Sen, Hyun Woo Choi, Rajarajan Senguttuvan, Soumendu Bhattacharya, Abhilash Goyal, Deuk Lee, Madhavan Swaminathan |
Iterative built-in testing and tuning of mixed-signal/RF systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 27th International Conference on Computer Design, ICCD 2009, Lake Tahoe, CA, USA, October 4-7, 2009, pp. 319-326, 2009, IEEE Computer Society, 978-1-4244-5029-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Eduardo Aldrete-Vidrio, Marvin Onabajo, Josep Altet, Diego Mateo, José Silva-Martínez |
Non-invasive RF built-in testing using on-chip temperature sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2009 IEEE International Test Conference, ITC 2009, Austin, TX, USA, November 1-6, 2009, pp. 1, 2009, IEEE Computer Society, 978-1-4244-4868-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Daniel Brenner, Colin Atkinson 0001, Rainer Malaka, Matthias Merdes, Barbara Paech, Dima Suliman |
Reducing verification effort in component-based software engineering through built-in testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Syst. Frontiers ![In: Inf. Syst. Frontiers 9(2-3), pp. 151-162, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Run-time testing, MORABIT, Built-in test, Integration test |
16 | Daniel Brenner |
Enabling Run-Time System Verification through Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TAIC PART ![In: Testing: Academia and Industry Conference - Practice And Research Techniques (TAIC PART 2006), 29-31 August 2006, Windsor, United Kingdom, pp. 131-136, 2006, IEEE Computer Society, 0-7695-2672-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Daniel Brenner, Colin Atkinson 0001, Barbara Paech, Rainer Malaka, Matthias Merdes, Dima Suliman |
Reducing Verification Effort in Component-Based Software Engineering through Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDOC ![In: Tenth IEEE International Enterprise Distributed Object Computing Conference (EDOC 2006), 16-20 October 2006, Hong Kong, China, pp. 175-184, 2006, IEEE Computer Society, 0-7695-2558-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Alberto Valdes-Garcia, José Silva-Martínez, Edgar Sánchez-Sinencio |
An On-Chip Transfer Function Characterization System for Analog Built-in Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 22nd IEEE VLSI Test Symposium (VTS 2004), 25-29 April 2004, Napa Valley, CA, USA, pp. 261-266, 2004, IEEE Computer Society, 0-7695-2134-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Derek Feltham, Phil Nigh, L. Richard Carley, Wojciech Maly |
Current sensing for built-in testing of CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Computer Design: VLSI in Computers and Processors, ICCD 1988., Proceedings of the 1988 IEEE International Conference on, Rye Brook, NY, USA, October 3-5, 1988, pp. 454-457, 1988, IEEE, 0-8186-0872-2. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
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16 | Eiji Fujiwara, Kohji Matsuoka |
A Self-Checking Generalized Prediction Checker and Its Use for Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(1), pp. 86-93, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
16 | Hideo Tamamoto, Hirotomo Sakusabe, Yuichi Narita |
A built-in testing scheme for ic memories by considering address decoder and cell array separately. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Syst. Comput. Jpn. ![In: Syst. Comput. Jpn. 18(10), pp. 25-34, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
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16 | Parag K. Lala |
On Built-In Testing of VLSI Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings International Test Conference 1986, Washington, D.C., USA, September 1986, pp. 719-721, 1986, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP BibTeX RDF |
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16 | El Mostapha Aboulhamid, Eduard Cerny |
Built-In Testing of One-Dimensional Unilateral Iterative Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 33(6), pp. 560-564, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
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16 | Wilfried Daehn, Joachim Mucha |
Hardware Test Pattern Generation for Built-In Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings International Test Conference 1981, Philadelphia, PA, USA, October 1981, pp. 110-120, 1981, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP BibTeX RDF |
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13 | Wen-Ben Jone, Anita Gleason |
Analysis of Hamming count compaction scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 2(4), pp. 373-384, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
index vector, spectral coefficients, Built-in self test, compaction, syndrome |
10 | Irith Pomeranz, Sudhakar M. Reddy, Yervant Zorian |
A Test Interface for Built-In Test of Non-Isolated Scanned Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 371-378, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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10 | Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis |
Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(9), pp. 1079-1086, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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10 | Wen-Ben Jone, Christos A. Papachristou, M. Pereira |
A Scheme for Overlaying Concurrent Testing of VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 531-536, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
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5 | Mohammad Azam, Krishna R. Pattipati, Ann Patterson-Hine |
Optimal sensor allocation for fault detection and isolation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMC (2) ![In: Proceedings of the IEEE International Conference on Systems, Man & Cybernetics: The Hague, Netherlands, 10-13 October 2004, pp. 1309-1314, 2004, IEEE, 0-7803-8566-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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