Search results for "cache-coherence"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
121	Shigeki Shibayama, Kazumasa Hamaguchi, Toshiyuki Fukui, Yoshiaki Sudo, Tomohiko Shimoyama, Shuichi Nakamura	An Optical Bus Computer Cluster with a deferred cache coherence protocol.	ICPADS	1996	DBLP DOI BibTeX RDF	Optical Bus Computer Cluster, deferred cache coherence protocol, optical star-coupler, one-hop simultaneous broadcasting, wavelength multiplexing, deferred cache coherence, coherence maintenance, protocols, wavelength-division multiplexing, optical interconnections, cache storage
110	Jaydeep Marathe, Frank Mueller 0001	Source-Code-Correlated Cache Coherence Characterization of OpenMP Benchmarks.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	simulation, Cache memories, SMPs, program instrumentation, coherence protocols, dynamic binary rewriting
99	Qing Yang 0001, George Thangadurai, Laxmi N. Bhuyan	Design of an Adaptive Cache Coherence Protocol for Large Scale Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	adaptive cache coherence protocol, cache-based multiprocessor, cache coherence scheme, memoryarchitecture, protocols, multiprocessor interconnection networks, multistage interconnection network, buffer storage, hierarchical network
96	Ralf Kattner, M. Eger, Christian Müller-Schloer	Modeling Cache Coherence Overhead with Geometric Objects.	CONPAR	1994	DBLP DOI BibTeX RDF	cache coherence verhead, cache coherence block size, modeling, Shared memory multiprocessor, geometric objects
88	H. Sarojadevi, S. K. Nandy 0001, Srinivasan Balakrishnan	On the Correctness of Program Execution When Cache Coherence Is Maintained Locally at Data-Sharing Boundaries in Distributed Shared Memory Multiprocessors.	Int. J. Parallel Program.	2004	DBLP DOI BibTeX RDF	programmer-centric framework, release consistency memory model, performance evaluation, cache coherence, Distributed shared-memory multiprocessor
86	Hock-Beng Lim, Pen-Chung Yew	An Integrated Framework for Compiler-Directed Cache Coherence and Data Prefetching.	LCPC	1998	DBLP DOI BibTeX RDF	Compiler-directed Cache Coherence, Memory Latency Hiding, Shared-memory Multiprocessors, Data Prefetching
82	Jaydeep Marathe, Frank Mueller 0001, Bronis R. de Supinski	A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks.	ICS	2005	DBLP DOI BibTeX RDF	SMPs, program instrumentation, coherence protocols, hardware performance monitoring, cache analysis, dynamic binary rewriting
80	Frank E. B. Ophelders, Marco Bekooij, Henk Corporaal	A tuneable software cache coherence protocol for heterogeneous MPSoCs.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	performance, design, reliability
78	Satish Chandra 0001, Brad Richards, James R. Larus	Teapot: A Domain-Specific Language for Writing Cache Coherence Protocols.	IEEE Trans. Software Eng.	1999	DBLP DOI BibTeX RDF	distributed systems, verification, Domain-specific languages, continuations, cache coherence
77	Jaehyuk Huh 0001, Jichuan Chang, Doug Burger, Gurindar S. Sohi	Coherence decoupling: making use of incoherence.	ASPLOS	2004	DBLP DOI BibTeX RDF	coherence decoupling, coherence misses, speculative cache lookup, false sharing
77	Hui Li, Kenneth C. Sevcik	Exploiting cache affinity in software cache coherence.	International Conference on Supercomputing	1994	DBLP DOI BibTeX RDF
76	Srivatsan Srinivasan, Parminder Singh Chhabra, Praveen Kumar Jaini, Adnan Aziz, Lizy Kurian John	Formal Verification of a Snoop-Based Cache Coherence Protocol Using Symbolic Model Checking.	VLSI Design	1999	DBLP DOI BibTeX RDF
76	Bo Zhang 0016, Binoy Ravindran	Brief announcement: queuing or priority queuing? on the design of cache-coherence protocols for distributed transactional memory.	PODC	2010	DBLP DOI BibTeX RDF	distributed queuing, transactional memory, cache-coherence protocols
76	Hock-Beng Lim, Pen-Chung Yew	Efficient Integration of Compiler-Directed Cache Coherence and Data Prefetching.	IPDPS	2000	DBLP DOI BibTeX RDF	Compiler-directed Cache Coherence, Shared-memory Multiprocessors, Data Prefetching, Memory System Design
72	Lynn Choi, Pen-Chung Yew	Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impact on Cache Performance.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	Compiler, shared-memory multiprocessors, data-flow analysis, cache coherence, interprocedural analysis
71	John H. Kelm, Daniel R. Johnson, William Tuohy, Steven S. Lumetta, Sanjay J. Patel	Cohesion: a hybrid memory model for accelerators.	ISCA	2010	DBLP DOI BibTeX RDF	computer architecture, cache coherence, accelerator
71	Alberto Ros 0001, Manuel E. Acacio, José M. García 0001	An efficient cache design for scalable glueless shared-memory multiprocessors.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	L2, directory structure, glueless shared-memory multiprocessors, cache, cache coherence, memory wall
70	Jaydeep Marathe, Anita Nagarajan, Frank Mueller 0001	Detailed cache coherence characterization for OpenMP benchmarks.	ICS	2004	DBLP DOI BibTeX RDF	SMPs, program instrumentation, coherence protocols, cache analysis, dynamic binary rewriting
70	Sangman Moh, Jae-Hong Shim, Yang-Dong Lee, Jeong-A Lee, Beom-Joon Cho	Design and Evaluation of a Cache Coherence Adapter for the SMP Nodes Interconnected via Xcent-Net.	ISCIS	2003	DBLP DOI BibTeX RDF
69	Donglai Dai, Dhabaleswar K. Panda 0001	Exploiting the Benefits of Multiple-Path Network DSM Systems: Architectural Alternatives and Performance Evaluation.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	directory-based protocols and cache coherence, interconnection networks, Parallel architecture, performance modeling, network interface, distributed shared-memory systems
68	Albert Meixner, Daniel J. Sorin	Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures.	HPCA	2007	DBLP DOI BibTeX RDF
67	Ahmed Louri, Avinash Karanth Kodi	An Optical Interconnection Network and a Modified Snooping Protocol for the Design of Large-Scale Symmetric Multiprocessors (SMPs).	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF	parallel optical interconnects, scalable optical networks, cache coherence, SMPs
66	Fong Pong, Michel Dubois 0001	Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	relaxed memory consistency models, delayed consistency, symbolic state model, verification, Shared-memory multiprocessor
66	Carla Diacui Medeiros Berkenbrock, Celso Massaki Hirata	Supporting Cache Coherence in Mobile Cooperative Systems.	NCA	2008	DBLP DOI BibTeX RDF	Mobile Cooperative Work, Cache Coherence
66	Hong Pan, Huimin Lin, Yi Lv	Model Checking Data Consistency for Cache Coherence Protocols.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	value-passing, symbolic transition graphs, model checking, concurrent systems, cache coherence protocols
66	Rana Ejaz Ahmed	Energy-Aware Cache Coherence Protocol for Chip-Multiprocessors.	CCECE	2006	DBLP DOI BibTeX RDF
65	Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich, Evan Speight	Architectural Support for Uniprocessor and Multiprocessor Active Memory Systems.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	Active memory systems, address remapping, flexible memory controller architecture, distributed shared memory, cache coherence protocol
64	Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai	Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols.	Conf. Computing Frontiers	2007	DBLP DOI BibTeX RDF	interconnect, power, SMP, cache coherence protocol
64	Mirko Loghi, Massimo Poncino, Luca Benini	Cache coherence tradeoffs in shared-memory MPSoCs.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	low power, multiprocessor, system-on-chip, Cache coherence
64	Lynn Choi, Pen-Chung Yew	Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	performance evaluation, compiler, Computer architecture, shared-memory multiprocessors, cache coherence, memory systems
64	Sang Lyul Min, Jean-Loup Baer	Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	cache contents reuse, scalable cache coherence, multiple privatecaches, compile-time marking, hardware-based local incoherence detection, program flow, parallel programming, shared memory multiprocessors, storage management, clocks, trace-driven simulation, buffer storage, timestamps, references
64	Hoichi Cheong, Alexander V. Veidenbaum	A version control approach to Cache coherence.	ICS	1989	DBLP DOI BibTeX RDF	parallel task execution, software-directed cache coherence, version control
60	Félix García Carballeira, Jesús Carretero 0001, Alejandro Calderón 0001, José María Pérez, José Daniel García	An Adaptive Cache Coherence Protocol Specification for Parallel Input/Output Systems.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF
60	Qing Yang 0001, George Thangadurai, Laxmi N. Bhuyan	An adaptive cache coherence scheme for hierarchical shared-memory multiprocessors.	SPDP	1990	DBLP DOI BibTeX RDF
60	Jichuan Chang, Gurindar S. Sohi	Cooperative Caching for Chip Multiprocessors.	ISCA	2006	DBLP DOI BibTeX RDF
60	Muhamed F. Mudawar	Scalable cache memory design for large-scale SMT architectures.	WMPI	2004	DBLP DOI BibTeX RDF	scalable multiported cache memory, simultaneous multithreaded architectures
60	Mirko Loghi, Martin Letis, Luca Benini, Massimo Poncino	Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	low power, multiprocessor, system-on-chip, cache coherence
60	Giorgio Delzanno	Constraint-Based Verification of Parameterized Cache Coherence Protocols.	Formal Methods Syst. Des.	2003	DBLP DOI BibTeX RDF	constraints, abstractions, symbolic model checking, cache coherence protocols
60	Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti	Virtual tree coherence: Leveraging regions and in-network multicast trees for scalable cache coherence.	MICRO	2008	DBLP DOI BibTeX RDF
59	Mark A. Heinrich, Vijayaraghavan Soundararajan, John L. Hennessy, Anoop Gupta	A Quantitative Analysis of the Performance and Scalability of Distributed Shared Memory.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	flexible node controller, bitvector, dynamic pointer allocation, controller occupancy, distributed shared memory, performance comparison, FLASH, Cache coherence protocols, MAGIC, COMA, SCI, scalable multiprocessors
59	Ricardo Bianchini, Leonidas I. Kontothanassis	Algorithms for categorizing multiprocessor communication under invalidate and update-based coherence protocols.	Annual Simulation Symposium	1995	DBLP DOI BibTeX RDF	shared-memory multiprocessor communication, invalidate-based cache coherence protocols, update-based cache coherence protocols, reference patterns, sharing patterns, useless data traffic, data traffic categorization, parallel programming, parallel programs, virtual machines, transaction processing, shared memory systems, coherence, cache storage, telecommunication traffic, cache misses, simulation algorithms, update transactions, memory protocols
59	Noel Eisley, Li-Shiuan Peh, Li Shang	In-Network Cache Coherence.	MICRO	2006	DBLP DOI BibTeX RDF
58	David J. Lilja, Pen-Chung Yew	Improving Memory Utilization in Cache Coherence Directories.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	memory utilization, cache coherence directories, large-scale shared memorymultiprocessors, software-directed schemes, compile-time memory disambiguation, dynamically tagged directory, high-level sharing information, configurationmanagement, discrete event simulation, compiler optimizations, program compilers, shared memory systems, trace-driven simulations, buffer storage, storage allocation, interprocedural analysis
58	E. Allen Emerson, Vineet Kahlon	Rapid Parameterized Model Checking of Snoopy Cache Coherence Protocols.	TACAS	2003	DBLP DOI BibTeX RDF
58	Kazuki Joe, Akira Fukuda	Applying the Semi-Markov Memory and Cache Coherence Interference Model to an Updating Based Cache Coherence Protocol.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
56	Bo Zhang 0016, Binoy Ravindran	Brief Announcement: Relay: A Cache-Coherence Protocol for Distributed Transactional Memory.	OPODIS	2009	DBLP DOI BibTeX RDF
56	Ricardo Fernández Pascual, José M. García 0001, Manuel E. Acacio, José Duato	Fault-Tolerant Cache Coherence Protocols for CMPs: Evaluation and Trade-Offs.	HiPC	2008	DBLP DOI BibTeX RDF
56	Hock-Beng Lim, Pen-Chung Yew	A Compiler-Directed Cache Coherence Scheme Using Data Prefetching.	IPPS	1997	DBLP DOI BibTeX RDF
56	Harjinder S. Sandhu, Benjamin Gamsa, Songnian Zhou	The Shared Regions Approach to Software Cache Coherence on Multiprocessors.	PPoPP	1993	DBLP DOI BibTeX RDF	C++
56	Ervan Darnell, John M. Mellor-Crummey, Ken Kennedy	Automatic software cache coherence through vectorization.	ICS	1992	DBLP DOI BibTeX RDF
56	Thuy Duong Vu, Li Zhang 0034, Chris R. Jesshope	The Verification of the On-Chip COMA Cache Coherence Protocol.	AMAST	2008	DBLP DOI BibTeX RDF	on-chip COMA cache coherence protocol, location consistency, verification, Abstract State Machine
56	Hoichi Cheong	Life span strategy - a compiler-based approach to cache coherence.	ICS	1992	DBLP DOI BibTeX RDF	compiler-based cache coherence, fast selective invalidation, inter-task-level temporal locality, life span strategy, parallel task execution, simple invalidation, time-stamp approach, version control, Doacross loop
56	Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha	In-Network Snoop Ordering (INSO): Snoopy coherence on unordered interconnects.	HPCA	2009	DBLP DOI BibTeX RDF
55	Konstantinos Aisopos, Chien-Chun Chou, Li-Shiuan Peh	Extending open core protocol to support system-level cache coherence.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	coherence extensions, ocp, open core protocol, specification, mpsocs
54	Hongbo Zeng, Jun Wang, Ge Zhang 0007, Weiwu Hu	An interconnect-aware power efficient cache coherence protocol for CMPs.	IPDPS	2008	DBLP DOI BibTeX RDF
54	Masafumi Takahashi, Hiroyuki Takano, Emi Kaneko, Seigo Suzuki	A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor.	HPCA	1996	DBLP DOI BibTeX RDF
54	Fong Pong, Michel Dubois 0001	A New Approach for the Verification of Cache Coherence Protocols.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF	symbolic expansion, formal verification, finite state machine, shared-memory multiprocessor, Cache coherence protocol
53	Demid Borodin, Ben H. H. Juurlink	A Low-Cost Cache Coherence Verification Method for Snooping Systems.	DSD	2008	DBLP DOI BibTeX RDF
53	Susan S. Owicki, Anant Agarwal	Evaluating the Performance of Software Cache Coherence.	ASPLOS	1989	DBLP DOI BibTeX RDF
52	John P. Sustersic, Ali R. Hurson	A Quality of Service (QoS) Implementation of Internet Cache Coherence.	AINA (1)	2004	DBLP DOI BibTeX RDF
52	Lubomir Ivanov, Ramakrishna Nunna	Modeling and verification of cache coherence protocols.	ISCAS (5)	2001	DBLP DOI BibTeX RDF
51	Gilles Pokam, Cristiano Pereira, Klaus Danne, Rolf Kassa, Ali-Reza Adl-Tabatabai	Architecting a chunk-based memory race recorder in modern CMPs.	MICRO	2009	DBLP DOI BibTeX RDF	memory race recorder, determinism, deterministic replay
51	Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin K. Qureshi, Andreas Moshovos	A tagless coherence directory.	MICRO	2009	DBLP DOI BibTeX RDF	directory coherence, cache coherence, Bloom filters
51	Blas Cuesta, Antonio Robles, José Duato	Improving Token Coherence by Multicast Coherence Messages.	PDP	2008	DBLP DOI BibTeX RDF	Token Cohence, protocol races, multicast, Cache coherence, SMP
50	Ehsan Atoofian, Amirali Baniasadi	A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors.	IPDPS	2007	DBLP DOI BibTeX RDF
50	Jie Tao 0001, Wolfgang Karl	Impact of Cache Coherence Models on Performance of OpenMP Applications.	Euro-Par	2004	DBLP DOI BibTeX RDF
50	Mats Brorsson	SM-prof: A Tool to Visualise and Find Cache Coherence Performance Bottlenecks in Multiprocessor Programs.	SIGMETRICS	1995	DBLP DOI BibTeX RDF
50	Daniel J. Sorin, Manoj Plakal, Anne Condon, Mark D. Hill, Milo M. K. Martin, David A. Wood 0001	Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol.	IEEE Trans. Parallel Distributed Syst.	2002	DBLP DOI BibTeX RDF	multicast snooping, Cache coherence, protocol verification, protocol specification, memory consistency
50	Jonas Skeppstedt, Per Stenström	Using Dataflow Analysis Techniques to Reduce Ownership Overhead in Cache Coherence Protocols.	ACM Trans. Program. Lang. Syst.	1996	DBLP DOI BibTeX RDF	performance evaluation, cache coherence, dataflow analysis
50	Claude Girault, C. Chatelain, Serge Haddad	Specification and properties of a cache coherence protocol model.	European Workshop on Applications and Theory of Petri Nets	1986	DBLP DOI BibTeX RDF	verification, Petri nets, protocols, specification, multiprocessors, memory hierarchy, cache coherence
49	Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour	A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer.	HPDC	1997	DBLP DOI BibTeX RDF	bus-efficient low-latency network interface, PDSS multicomputer, unprivileged code, cache-to-cache communications, distributed barrier-synchronization mechanism, single-chip implementation, commodity processor, routing, multiprocessor interconnection networks, interconnect, cache coherence protocols
49	Harjinder S. Sandhu, Kenneth C. Sevcik	An Analytic Study of Dynamic Hardware and Software Cache Coherence Strategies.	SIGMETRICS	1995	DBLP DOI BibTeX RDF
47	Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha	In-network coherence filtering: snoopy coherence without broadcasts.	MICRO	2009	DBLP DOI BibTeX RDF
47	Milo M. K. Martin, Mark D. Hill, David A. Wood 0001	Token Coherence: Decoupling Performance and Correctness.	ISCA	2003	DBLP DOI BibTeX RDF
47	Chenjie Yu, Peter Petrov	Aggressive snoop reduction for synchronized producer-consumer communication in energy-efficient embedded multi-processors.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	low-power multiprocessor system, embedded systems, cache coherence
47	Xiaodong Zhang 0001, Yong Yan 0003	Comparative Modeling and Evaluation of CC-NUMA and COMA on Hierarchical Ring Architectures.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF	performance modeling and measurements, the KSR1, shared-memory, Cache coherence, CC-NUMA, COMA, slotted rings
47	John Chapin, Stephen Alan Herrod, Mendel Rosenblum, Anoop Gupta	Memory System Performance of UNIX on CC-NUMA Multiprocessors.	SIGMETRICS	1995	DBLP DOI BibTeX RDF
47	Sudhindra Pandav, Konrad Slind, Ganesh Gopalakrishnan	Counterexample Guided Invariant Discovery for Parameterized Cache Coherence Verification.	CHARME	2005	DBLP DOI BibTeX RDF
47	Anca-Andreea Ivan, Vijay Karamcheti	Flecc: A Flexible Cache Coherence Protocol for Dynamic Component-Based Systems.	IPDPS	2004	DBLP DOI BibTeX RDF
46	Taeweon Suh, Daehyun Kim 0001, Hsien-Hsin S. Lee	Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs.	DAC	2005	DBLP DOI BibTeX RDF	heterogeneous, cache coherence, MPSoC, real-time and embedded systems, inter-processor communication
46	Rajeev Joshi, Leslie Lamport, John Matthews, Serdar Tasiran, Mark R. Tuttle, Yuan Yu	Checking Cache-Coherence Protocols with TLA+.	Formal Methods Syst. Des.	2003	DBLP DOI BibTeX RDF	TLC, model checking, cache coherence, TLA+
46	Jun Pang 0001, Wan J. Fokkink, Rutger F. H. Hofman, Ronald Veldema	Model Checking a Cache Coherence Protocol for a Java DSM Implementation.	IPDPS	2003	DBLP DOI BibTeX RDF	µCRL, Java, model checking, distributed shared memory, cache coherence protocols
46	Inês de Castro Dutra, Vítor Santos Costa, Ricardo Bianchini	The Impact of Cache Coherence Protocols on Parallel Logic Programming Systems.	Computational Logic	2000	DBLP DOI BibTeX RDF	dsm architectures, performance evaluation, parallelism, logic programming, cache coherence protocols
46	Fong Pong, Michel Dubois 0001	Verification Techniques for Cache Coherence Protocols.	ACM Comput. Surv.	1997	DBLP DOI BibTeX RDF	state representation and expansion, finite state machine, shared-memory multiprocessors, cache coherence, protocol verification
45	Masaru Takesue	A tampering protocol for reducing the coherence transactions in regular computation.	ISPAN	1997	DBLP DOI BibTeX RDF	tampering protocol, coherence transactions, regular computation, latency of communication, protocols, multiprocessor, cache-coherence protocol, RTL simulator
45	Hyunhee Kim, Jung Ho Ahn, Jihong Kim 0001	Replication-aware leakage management in chip multiprocessors with private L2 cache.	ISLPED	2010	DBLP DOI BibTeX RDF	leakage power management, chip multiprocessors, L2 caches
45	Wen-Hann Wang, Jean-Loup Baer, Henry M. Levy	Organization and Performance of a Two-Level Virtual-Real Cache Hierarchy.	ISCA	1989	DBLP DOI BibTeX RDF
44	Mirko Loghi, Massimo Poncino	Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions.	DATE	2005	DBLP DOI BibTeX RDF
44	Won-Kee Hong, Nam-Hee Kim, Shin-Dug Kim	Design and Performance Evaluation of an Adaptive Cache Coherence Protocol.	ICPADS	1998	DBLP DOI BibTeX RDF
44	Lynn Choi, Pen-Chung Yew	Compiler and Hardware Support for Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study.	ISCA	1996	DBLP DOI BibTeX RDF
43	Blas Cuesta, Antonio Robles, José Duato	Switch-Based Packing Technique for Improving Token Coherence Scalability.	PDCAT	2008	DBLP DOI BibTeX RDF
43	Rohit Chandra, Kourosh Gharachorloo, Vijayaraghavan Soundararajan, Anoop Gupta	Performance evaluation of hybrid hardware and software distributed shared memory protocols.	International Conference on Supercomputing	1994	DBLP DOI BibTeX RDF
43	Rong-Yuh Hwang	An Efficient Technique of Instruction Scheduling on a Superscalar-Based Mulprocessor.	IPPS	1997	DBLP DOI BibTeX RDF	FLASH multiprocessor, block data transfer, multiple communication protocols, embedded protocol processor, protocol, shared memory, prefetching, cache storage, FLASH, cache coherence protocol, multiprocessor architecture, MAGIC
43	John Heinlein, Kourosh Gharachorloo, Robert P. Bosch Jr., Mendel Rosenblum, Anoop Gupta	Coherent Block Data Transfer in the FLASH Multiprocessor.	IPPS	1997	DBLP DOI BibTeX RDF	FLASH multiprocessor, block data transfer, multiple communication protocols, embedded protocol processor, protocol, shared memory, prefetching, cache storage, FLASH, cache coherence protocol, multiprocessor architecture, MAGIC
43	Yunseok Rhee, Joonwon Lee	A Scalable Cache Coherent Architecture for Large-Scale Mesh-Connected Multiprocessors.	ISPAN	1997	DBLP DOI BibTeX RDF	mesh-interconnect, directory-based protocol, multiprocessor, wormhole routing, cache coherence, dimension ordered routing
43	Hongbo Zeng, Kun Huang, Ming Wu, Weiwu Hu	Concerning with On-Chip Network Features to Improve Cache Coherence Protocols for CMPs.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
43	H. Sarojadevi, S. K. Nandy 0001, Srinivasan Balakrishnan	Enforcing Cache Coherence at Data Sharing Boundaries without Global Control: A Hardware-Software Approach (Research Note).	Euro-Par	2002	DBLP DOI BibTeX RDF
43	David M. Brooks, Margaret Martonosi	Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware.	CANPC	1999	DBLP DOI BibTeX RDF
43	Seungjoon Park, David L. Dill	Verification of Cache Coherence Protocols by Aggregation of Distributed Transactions.	Theory Comput. Syst.	1998	DBLP DOI BibTeX RDF
43	Farnaz Mounes-Toussi, David J. Lilja	The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF