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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 121 occurrences of 98 keywords
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Results
Found 415 publication records. Showing 415 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
27 | Antti Mäntyniemi, Timo Rahkonen, Juha Kostamovaara |
A high resolution digital CMOS time-to-digital converter based on nested delay locked loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 537-540, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
25 | Nishant Chandra, Apoorva Kumar Yati, A. B. Bhattacharyya |
Extended-Sakurai-Newton MOSFET Model for Ultra-Deep-Submicrometer CMOS Digital Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 247-252, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Robert Bogdan Staszewski, Khurram Muhammad, Dirk Leipold |
Digital RF Processing Techniques for SoC Radios, invited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 217-222, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Jeff Y. F. Hsieh, Teresa H.-Y. Meng |
Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 21(3), pp. 195-207, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Tonia G. Morris, Denise M. Wilson, Stephen P. DeWeerth |
Analog VLSI circuits for manufacturing inspection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 241-257, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
analog VLSI circuits, manufacturing inspection, programmable structuring elements, oriented edge detection, high speed preprocessors, serial/parallel processing, focal-plane processing, vertical bipolar phototransistors, digital CMOS process, adaptive image threshold, 2.0 micron, computer vision, VLSI, edge detection, mathematical morphology, machine vision, manufacture, morphological operations, selective attention, massively parallel architectures, CMOS analogue integrated circuits, automatic optical inspection, focal planes, analogue processing circuits |
22 | Maitham Shams, Mohamed I. Elmasry |
Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 563-568, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Zeynep Toprak Deniz, Yusuf Leblebici |
Design and realization of a modular 200 MSample/s 12-bit pipelined A/D converter block using deep-submicron digital CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 841-844, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Kazuya Shimizu, Masato Kaneta, HaiJun Lin, Haruo Kobayashi 0001, Nobukazu Takai, Masao Hotta |
A Time-to-Digital Converter with small circuitry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 109-110, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Saleh Abdel-Hafeez, Shadi M. Harb, William R. Eisenstadt |
High speed digital CMOS divide-by-N fequency divider. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 592-595, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Maitham Shams, Mohamed I. Elmasry |
A formulation for quick evaluation and optimization of digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 326-329, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Haluk Konuk, F. Joel Ferguson |
Oscillation and sequential behavior caused by opens in the routing in digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(11), pp. 1200-1210, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | Atila Alvandpour, Per Larsson-Edefors, Christer Svensson |
Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 245-249, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
short-circuit current, power consumption, power estimation |
18 | Daniele Bonomi, Giorgio Boselli, Gabriella Trucco, Valentino Liberali |
Effects of digital switching noise on analog voltage references in mixed-signal CMOS ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 226-231, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
crosstalk, mixed-signal ICs |
18 | Tonia Morris, Erica Fletcher, Cyrus Afghahi, Sami Issa, Kevin Connolly, Jean-Charles Korta |
A Column-based Processing Array for High-speed Digital Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 42-56, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
18 | Subhadeep Banik, Daibashish Gangopadhyay, T. K. Bhattacharyya |
A Low Power 1.8 V 4-Bit 400-MHz Flash ADC in 0.18µ Digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 69-74, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Chengming He, Degang Chen 0001, Randall L. Geiger |
A low-voltage compatible two-stage amplifier with ≥120 dB gain in standard digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 353-356, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Bedabrata Pain, Bruce Hancock, Thomas Cunningham, Guang Yang 0003, Suresh Seshadri, Julie Heynssens, Chris Wrigley |
CMOS Digital Imager Design from a System-on-a-chip Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 395-400, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | K. Wayne Current |
Design of a Quaternary Latch Circuit Using a Binary CMOS RS Latch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 377-381, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
quaternary, memory, circuit, latch |
16 | Kurt Schweiger, Horst Zimmermann |
Low-Voltage Low-Power Highly Linear Down-Sampling Mixer in 65nm Digital CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 174-177, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Enrico Macii, Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Massimo Poncino |
Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 298-303, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Sudhakar M. Reddy, Irith Pomeranz, Chen Liu |
On tests to detect via opens in digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 840-845, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
constrained stuck-at tests, test generation, DFT, open defects |
16 | Fikret Dülger, Sher Jiun Fang, Ahmed Nader Mohieldin, Paul Fontaine, Abdellatif Bellaouar, Michel Frechette |
A quad-band receiver for GSM/GPRS/EDGE in 90 nm digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Manuel Delgado-Restituto, Jesús Ruiz-Amaya, José M. de la Rosa 0001, Juan Francisco Fernández-Bootello, Leila Díez, Rocío del Río Fernández, Ángel Rodríguez-Vázquez |
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4626-4629, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Terje N. Andersen, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Bjørnar Hernes, Øystein Moldsvor |
A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 219-222, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Takahito Miyazaki, Masanori Hashimoto, Hidetoshi Onodera |
A performance comparison of PLLs for clock generation using ring oscillator VCO and LC oscillator in a digital CMOS process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 545-546, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Dongsheng Ma, Wing-Hung Ki, Chi-Ying Tsui |
Fast adaptive DC-DC conversion using dual-loop one-cycle control in standard digital CMOS process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 539-540, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Alain-Serge Porret, Thierry Melly, Eric A. Vittoz, Christian C. Enz |
Tradeoffs and design of an ultra low power UHF transceiver integrated in a standard digital CMOS process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000, Rapallo, Italy, July 25-27, 2000, pp. 273-278, 2000, ACM, 1-58113-190-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
low-power, CMOS, low-voltage, RF, transceiver |
16 | Payam Heydari, Massoud Pedram |
Analysis and Optimization of Ground Bounce in Digital CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 121-126, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | José Antonio Sainz, R. Muñoz, J. A. Maiz, L. A. Aguado, Miquel Roca 0001 |
A Crosstalk Sensor Implementation for Measuring Interferences in Digital CMOS VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 3-5 July 2000, Palma de Mallorca, Spain, pp. 45-51, 2000, IEEE Computer Society, 0-7695-0646-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
VLSI, Sensor, CMOS, Crosstalk, Digital |
16 | Massoud Pedram, Qing Wu 0002 |
Battery-Powered Digital CMOS Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 72-76, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Bradley A. Minch, Paul E. Hasler |
A floating-gate technology for digital CMOS processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 400-403, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Uwe Hübner, Heinrich Theodor Vierhaus, Raul Camposano |
Partitioning and analysis of static digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(11), pp. 1292-1310, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
16 | Venkata S. Rangavajjhala, Bharat L. Bhuva, Sherra E. Kerns |
Statistical degradation analysis of digital CMOS IC's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(6), pp. 837-844, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
16 | R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah |
A Low Power Approach to Floating Point Adder Design for DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 27(3), pp. 195-213, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
digital-CMOS, power-consumption-model, VLSI, low-power-design, computer-arithmetic, floating-point, switching-activity |
16 | Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen |
Analysis and design of low-energy flip-flops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001, pp. 52-55, 2001, ACM, 1-58113-371-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
digital CMOS, VLSI, low-power design, flip-flops, low-voltage |
16 | Nestoras Tzartzanis, William C. Athas |
Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 137-153, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
low-power digital CMOS, adiabatic switching, clock-powered logic, energy recovery |
16 | Janardhan H. Satyanarayana, Keshab K. Parhi, Leilei Song, Yun-Nan Chang |
Systematic analysis of bounds on power consumption in pipelined and non-pipelined multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 492-499, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
pipelined multipliers, nonpipelined multipliers, Baugh-Wooley multiplier, binary tree multiplier, Wallace tree multiplier, STDs, sub circuits, energy values, cubic dependence, word length, quadratic dependence, digital CMOS circuits, CMOS adder, low power arithmetic units, power consumption, power consumption, switching activity, state transition diagrams |
16 | W. W. Bachmann, Sorin A. Huss |
Efficient algorithms for multilevel power estimation of VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(2), pp. 238-254, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Pui-Tak So, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun |
Ramp voltage supply using adiabatic charging principle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2152-2155, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Josep Maria Margarit, Lluís Terés, Francisco Serra-Graells |
A Sub-µW fully programmable CMOS DPS for uncooled infrared fast imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1424-1427, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Jussi-Pekka Jansson, Antti Mäntyniemi, Juha Kostamovaara |
A delay line based CMOS time digitizer IC with 13 ps single-shot precision. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4269-4272, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Yijun Zhou, Jiren Yuan |
An 8-Bit, 100-MHz low glitch interpolation DAC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 116-119, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bushnell |
Design of Variable Input Delay Gates for Low Dynamic Power Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 436-445, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Christian Jesús B. Fayomi, Gordon W. Roberts, Mohamad Sawan |
Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: design and chip characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2200-2203, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Mehdi Jafaripanah, Bashir M. Al-Hashimi, Neil M. White |
Adaptive sensor response correction using analog filter compatible with digital technology [load cell sensor applications]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5389-5392, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | F. Hashemi, Khayrollah Hadidi, Abdollah Khoei |
Design of a CMOS image sensor with pixel-level ADC in 0.35µm process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 600-603, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Alex G. Dickinson, Bryan D. Ackland, El-Sayed Eid, David A. Inglis, Eric R. Fossum |
Standard CMOS active pixel image sensors for multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 214-224, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CMOS active pixel image sensors, single chip video cameras, color filter array, document capture, 1024 pixel, multimedia, multimedia systems, CMOS integrated circuits, image sensors, transistors, video cameras, gain |
13 | Chun-Chi Chen, Chao-Lieh Chen, Wei Fang, Yen-Chan Chu |
All-Digital CMOS Time-to-Digital Converter With Temperature-Measuring Capability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 28(9), pp. 2079-2083, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
13 | Elisa Sacco, Jorge Marin, Johan Vergauwen, Georges G. E. Gielen |
Controlled-Oscillator Optimization for Highly-Digital CMOS Time-Based Sensor-to-Digital Converter Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMACD ![In: 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2018, Prague, Czech Republic, July 2-5, 2018, pp. 249-252, 2018, IEEE, 978-1-5386-5153-7. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
13 | Siliang Hua, Donghui Wang, Leiou Wang, Yan Liu, Jiarui Li |
A PVT-insensitive all digital CMOS time-to-digital converter based on looped delay-line with extension scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8483-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
13 | Takamoto Watanabe, Yu Hou, Masaya Miyahara, Akira Matsuzawa |
All-digital 0.016mm2 reconfigurable sensor-ADC using 4CKES-TAD in 65nm digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014, Marseille, France, December 7-10, 2014, pp. 21-24, 2014, IEEE, 978-1-4799-4242-8. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
13 | Jonathan Borremans, Kameswaran Vengattaramane, Vito Giannini, Björn Debaillie, Wim Van Thillo, Jan Craninckx |
A 86 MHz-12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 45(10), pp. 2116-2129, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
13 | Jonathan Borremans, Kameswaran Vengattaramane, Kameswaran Giannini, Jan Craninckx |
A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ/Shot 5ps TDC in 40nm digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010, pp. 480-481, 2010, IEEE, 978-1-4244-6033-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
13 | Takamoto Watanabe, Tomohito Terasawa |
An all-digital ADC/TDC for sensor interface with TAD architecture in 0.18-µm digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009, Yasmine Hammamet, Tunisia, 13-19 December, 2009, pp. 219-222, 2009, IEEE, 978-1-4244-5090-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
13 | Takamoto Watanabe, Shigenori Yamauchi, Tomohito Terasawa |
A 0.0027-mm2 9.5-bit 50-MS/s all-digital A/D converter TAD in 65-nm digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 16th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2009, Yasmine Hammamet, Tunisia, 13-19 December, 2009, pp. 271-274, 2009, IEEE, 978-1-4244-5090-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
13 | Srini Ramaswamy, J. Krishnan, Brett Forejt, J. Joy, M. Burns, Gangadhar Burra |
A High-Performance Digital-Input Class-D Amplifier with Direct Battery Connection in a 90nm Digital CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, pp. 436-437, 2008, IEEE, 978-1-4244-2010-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Young-Chan Jang, Jun-Hyun Bae, Hong-June Park |
A Digital CMOS PWCL With Fixed-Delay Rising Edge and Digital Stability Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 53-II(10), pp. 1063-1067, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Yat-Fong Yung, Amine Bermak |
A Digital CMOS Imager with Pixel Level Analog-to-digital Converter and Reconfigurable SRAM/Counter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 19-21 July 2004, Banff, Alberta, Canada, pp. 33-36, 2004, IEEE Computer Society, 0-7695-2182-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Xavier Redondo, Jofre Pallares, Francisco Serra-Graells |
A 1.2V 130µA 10-bit MOS-Only Log-Domain Sigma Delta Modulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 17-20, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Mohammad Danaie, Hamed Aminzadeh, Sasan Naseh |
On the Linearization of MOSFET Capacitors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1943-1946, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Rajarshi Mukhopadhyay, S. W. Yoon, Y. Park, Chang-Ho Lee, S. Nuttinck, Joy Laskar |
Investigation of inductors for digital Si-CMOS technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | A. Seedher, Preetam Tadeparthy, K. A. S. Satheesh, V. T. Anuroop |
Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5545-5548, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Kris Tiri, David D. Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede |
A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 222-227, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
security IC, encryption, smart card, side-channel attack, differential power analysis, countermeasure |
12 | Gabriella Trucco, Giorgio Boselli, Valentino Liberali |
A Study of Crosstalk Through Bonding and Package Parasitics in CMOS Mixed Analog-Digital Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 138-147, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Gabriella Trucco, Giorgio Boselli, Valentino Liberali |
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 129-134, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
crosstalk, mixed-signal ICs |
12 | Huseyin Dine, Franco Maloberti |
An 8-bit current mode ripple folding A/D converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 981-984, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | V. Boonsobhak, Apisak Worapishet |
A pixel-level ADC with improved performance trade-off for high-speed CMOS imagers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (1) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 581-584, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
10 | Hooman Farkhani, Mohammad Maymandi-Nejad, Manoj Sachdev |
A fully digital ADC using a new delay element with enhanced linearity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2406-2409, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
10 | Hamed Aminzadeh, Mohammad Danaie, Reza Lotfi |
Design of high-resolution MOSFET-only pipelined ADCs with digital calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 427-432, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
10 | Alistair Kitchen, Abdesselam Bouzerdoum, Amine Bermak |
Time Domain Analogue to Digital Conversion in a Digital Pixel Sensor Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 2nd IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), 28-30 January 2004, Perth, Australia, pp. 108-114, 2004, IEEE Computer Society, 0-7695-2081-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
10 | Jesper Steensgaard |
High-resolution mismatch-shaping digital-to-analog converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 516-519, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
10 | Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen |
A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 528-531, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
10 | Chun-Chi Chen, Chao-Lieh Chen, Yen-Chan Chu, Guan-Yu Lin |
An Area-Effective High-Resolution All-Digital CMOS Time-Domain Smart Temperature Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 43(2), pp. 1144-1156, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
10 | Ang Yuan, Huidong Zhao, Xiao Wang, Zhi Li, Shushan Qiao |
An Ultra-Low Leakage and Wide-Range Voltage Level Shifter for Low-Power Digital CMOS VLSIs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 71(3), pp. 1406-1410, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
10 | Woojun Choi, Jan A. Angevare, Injun Park, Kofi A. A. Makinwa, Youngcheol Chae |
A 0.9-V 28-MHz Highly Digital CMOS Dual-RC Frequency Reference With ±200 ppm Inaccuracy From -40 °C to 85 °C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 57(8), pp. 2418-2428, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
10 | Fuyue Qian, Ye Li, Xiaowei Zhang, Jianxiong Xi, Lenian He |
An all-digital CMOS temperature sensor with a wide supply voltage range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 19(19), pp. 20220280, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
10 | Chunfeng Bai, Donghai Qiao, Heming Zhao |
A Compact Single-Transistor Current Source for Analog Design in Nanometer Digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(12), pp. 3508-3512, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
10 | Jagdeep Kaur Sahani, Anil Singh, Alpana Agarwal |
A 2.3 mW Multi-Frequency Clock Generator with -137 dBc/Hz Phase Noise VCO in 180 nm Digital CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 29(8), pp. 2050130:1-2050130:15, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Hamed Aminzadeh, Mohammad Mahdi Valinezhad |
0.7-V supply, 21-nW All-MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 102, pp. 104841, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Mst Shamim Ara Shawkat, Nicole McFarlane |
A Digital CMOS Silicon Photomultiplier Using Perimeter Gated Single Photon Avalanche Diodes With Asynchronous AER Readout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-I(12), pp. 4818-4828, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
10 | Seyed Mahmoud Anisheh, Hamed Abbasizadeh, Hossein Shamsi, Chitra Dadkhah, Kang-Yoon Lee |
98-dB Gain Class-AB OTA With 100 pF Load Capacitor in 180-nm Digital CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 17772-17779, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Di Li 0003, Chunlong Fei, Xiaopeng Wu, Yintang Yang |
A 6-bit digital CMOS variable gain attenuator with large dynamic range and high linearity-in-dB for ultrasound imaging applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 83, pp. 32-38, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Mantas Sakalas, Jens Wagner, Niko Joram, Frank Ellinger |
Design Approach for a Broadband Class-D Power Amplifier for Low Power Application in a 28 nm Digital CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRIME ![In: 15th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2019, Lausanne, Switzerland, July 15-18, 2019, pp. 157-160, 2019, IEEE, 978-1-7281-3549-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Daniel S. Truesdell, Benton H. Calhoun |
A 640 pW 22 pJ/sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25°C Resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019, pp. 1-4, 2019, IEEE, 978-1-5386-9395-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Dang Cong Thinh, Le Thanh Toi, Hoang Trang |
Technology Education Challenges and Solution to Design a Process Design Kit for Digital CMOS Technology in Vietnam. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIT ![In: 19th International Symposium on Communications and Information Technologies, ISCIT 2019, Ho Chi Minh City, Vietnam, September 25-27, 2019, pp. 381-385, 2019, IEEE, 978-1-7281-5009-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Kang-Lun Chiu, Hsun-Wei Chan, Wei-Che Lee, Chang-Ting Wu, Henry Lopez Davila, Hung-Chih Liu, Meng-Yuan Huang, Chun-Yi Liu 0001, Tsai-Hua Lee, Hsin-Ting Chang, Chih-Wei Jen, Nien-Hsiang Chang, Pei-Yun Tsai, Yen-Cheng Kuan, Shyh-Jye Jou |
A Millimeter Wave Digital CMOS Baseband Transceiver for Wireless LAN Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019, pp. 275-278, 2019, IEEE, 978-1-7281-5106-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Ankur Pokhara, Biswajit Mishra, Purvi Patel |
All-Digital CMOS On-Chip Temperature Sensor with Time-Assisted Analytical Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers, pp. 749-763, 2019, Springer, 978-981-32-9766-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
10 | Tong Fang, Runjiang Dou, Liyuan Liu, Jian Liu 0021, Nanjian Wu |
A 25 fps 32 × 24 Digital CMOS Terahertz Image Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018, pp. 87-90, 2018, IEEE, 978-1-5386-6413-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Gustavo Della Colletta, Luis Henrique de Carvalho Ferreira, Sameer R. Sonkusale, Giseli V. Rocha |
A 20-nW 0.25-V Inverter-Based Asynchronous Delta-Sigma Modulator in 130-nm Digital CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 25(12), pp. 3455-3463, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Anil Singh, Veena Rawat, Alpana Agarwal |
Low-power 10-bit 100 MS/s pipelined ADC in digital CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 11(6), pp. 589-596, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Shaan Sengupta, Hyunkyu Ouh, Matthew L. Johnston |
An all-digital CMOS ambient light sensor using a single photon avalanche diode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE SENSORS ![In: 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29 - November 1, 2017, pp. 1-3, 2017, IEEE, 978-1-5090-1012-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Rodrigo A. S. Braga, Luis Henrique de Carvalho Ferreira, Gustavo Della Colletta, Odilon O. Dutra |
Calibration-less Nauta OTA operating at 0.25-V power supply in a 130-nm digital CMOS process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 8th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2017, Bariloche, Argentina, February 20-23, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-5859-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
10 | Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd |
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 51(2), pp. 378-390, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Hans G. Kerkhoff, Hassan Ebrahimi |
Investigation of Intermittent Resistive Faults in Digital CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 25(3), pp. 1640023:1-1640023:17, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Brian Aull |
Geiger-Mode Avalanche Photodiode Arrays Integrated to All-Digital CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 16(4), pp. 495, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Thomas Polzer, Andreas Steininger |
A general approach for comparing metastable behavior of digital CMOS gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Kosice, Slovakia, April 20-22, 2016, pp. 56-61, 2016, IEEE, 978-1-5090-2467-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Xijiang Lin, Sudhakar M. Reddy, Janusz Rajski |
Transistor stuck-on fault detection tests for digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 21th IEEE European Test Symposium, ETS 2016, Amsterdam, Netherlands, May 23-27, 2016, pp. 1-6, 2016, IEEE, 978-1-4673-9659-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Kiichi Niitsu, Atsuki Kobayashi, Yudai Ogawa, Matsuhiko Nishizawa, Kazuo Nakazato |
Design of an energy-autonomous, disposable, supply-sensing biosensor using bio fuel cell and 0.23-V 0.25-µm zero-Vth all-digital CMOS supply-controlled ring oscillator with inductive transmitter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016, pp. 23-24, 2016, IEEE, 978-1-4673-9569-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Asli Yelkenci, Okan Zafer Batur, Baykal Sarioglu |
Ultra low power all-digital CMOS sensor read out circuit for optically powered biomedical systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISP-BMEI ![In: 9th International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, CISP-BMEI 2016, Datong, China, October 15-17, 2016, pp. 1766-1770, 2016, IEEE, 978-1-5090-3710-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
10 | Hassan Ebrahimi, Alireza Rohani, Hans G. Kerkhoff |
Detecting intermittent resistive faults in digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016, Storrs, CT, USA, September 19-20, 2016, pp. 87-90, 2016, IEEE Computer Society, 978-1-5090-3623-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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