Search results for "fault-free"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
47	Hiroshi Masuyama, Toshihiko Sasama, Hiroyuki Hashimoto	The maximum dimensional fault-free subcube allocatable in faulty hypercube.	ICCCN	1995	DBLP DOI BibTeX RDF	maximum dimensional fault-free subcube, reconfiguration problem, fault-free (n-2)-subcube, parallel algorithms, hypercube networks, degradation, faulty hypercube, n-cube
45	Hiroyuki Hashimoto, Hiroshi Masuyama, Toshihiko Sasama	Fault tolerant subcube allocation in hypercube.	ISPAN	1996	DBLP DOI BibTeX RDF	subcube allocation, fault-free subcubes, fault tolerant, parallel architectures, fault tolerant computing, hypercube, hypercube networks, degradation, faulty hypercubes
41	Jang-Ping Sheu, Yuh-Shyan Chen	Tolerating Faults in Faulty Hypercubes Using Maximal Fault-Free Subcube-Ring.	Euro-Par	1995	DBLP DOI BibTeX RDF
39	Vishal Suthar, Shantanu Dutt	Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions.	VTS	2006	DBLP DOI BibTeX RDF
38	Sung-Ming Yen, Seungjoo Kim, Seongan Lim, Sang-Jae Moon	RSA Speedup with Residue Number System Immune against Hardware Fault Cryptanalysis.	ICISC	2001	DBLP DOI BibTeX RDF	Fault infective CRT, Fault tolerance, Cryptography, Fault detection, Side channel attack, Factorization, Chinese remainder theorem (CRT), Residue number system, Physical cryptanalysis, Hardware fault cryptanalysis
38	Naim Ben-Hamida, Khaled Saab 0001, David Marche, Bozena Kaminska	A perturbation based fault modeling and simulation for mixed-signal circuits.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	analog circuit fault simulation, perturbation fault model, fault abstraction, structural fault modeling, perturbation estimation, fault observation, hierarchical analog fault simulator, complexity, test generation, CMOS, mixed-signal circuits, mixed analogue-digital integrated circuits, functional fault modeling, physical defects
37	Zhen Jiang, Jie Wu 0001	Fault-Tolerant Broadcasting in 2-D Wormhole-Routed Meshes.	J. Supercomput.	2003	DBLP DOI BibTeX RDF	communication distance, fault tolerance, broadcast, meshes, wormhole routing
33	Junwei Hou, Abhijit Chatterjee	Concurrent transient fault simulation for analog circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
33	Vishal Suthar, Shantanu Dutt	High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	built-in self-tester (BISTer), roving tester (ROTE), FPGAs, functional testing, on-line testing, diagnosability
30	Irith Pomeranz, Sudhakar M. Reddy	A Same/Different Fault Dictionary: An Extended Pass/Fail Fault Dictionary with Improved Diagnostic Resolution.	DATE	2008	DBLP DOI BibTeX RDF
30	Chauchin Su, Shenshung Chiang, Shyh-Jye Jou	Impulse response fault model and fault extraction for functional level analog circuit diagnosis.	ICCAD	1995	DBLP DOI BibTeX RDF	Testing, Diagnosis, Analog Circuit
30	Marcelo M. de Azevedo, Nader Bagherzadeh, Shahram Latifi	Fault-diameter of the star-connected cycles interconnection network.	HICSS (2)	1995	DBLP DOI BibTeX RDF	star-connected cycles interconnection network, maximum diameter, fault-free, fixed constant, fault tolerance, reliability, graph theory, parallel architectures, fault tolerant computing, graph, multiprocessor interconnection networks, vertex connectivity, fault-diameter
29	Xian Cheng, Oliver C. Ibe	Reliability of a Class of Multistage Interconnection Networks.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	extra-stage interconnectionnetworks, fault-free path, input-output pair, networkreliability, broadcast reliability, recursive expression, lower bound, probability, multiprocessor interconnection networks, upper bound, multistage interconnection networks, tight bounds, reliability theory, terminal reliability
28	Ngoc Chi Nguyen, Vo Dinh Minh Nhat, Sungyoung Lee	Fault Free Shortest Path Routing on the de Bruijn Networks.	ICN (2)	2005	DBLP DOI BibTeX RDF
27	Irith Pomeranz, Sudhakar M. Reddy	A delay fault model for at-speed fault simulation and test generation.	ICCAD	2006	DBLP DOI BibTeX RDF
27	Vladimir Hahanov, Anna Babich	Test Generation and Fault Simulation Methods on the Basis of Cubic Algebra for Digital Devices.	DSD	2001	DBLP DOI BibTeX RDF
27	Dong Xiang, Jia-Guang Sun, Jie Wu 0001, Krishnaiyan Thulasiraman	Fault-Tolerant Routing in Meshes/Tori Using Planarly Constructed Fault Blocks.	ICPP	2005	DBLP DOI BibTeX RDF	extended local safety, unsafe systems, mesh/torus, fault-tolerant routing, Computational power
27	Sung-Ming Yen, Seungjoo Kim, Seongan Lim, Sang-Jae Moon	RSA Speedup with Chinese Remainder Theorem Immune against Hardware Fault Cryptanalysis.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	fault infective CRT, fault tolerance, cryptography, fault detection, side channel attack, factorization, Chinese Remainder Theorem (CRT), residue number system, physical cryptanalysis, hardware fault cryptanalysis, denial of service attack
27	Rajendra V. Boppana, Suresh Chalasani	Fault-tolerant routing with non-adaptive wormhole algorithms in mesh networks.	SC	1994	DBLP DOI BibTeX RDF	block faults, nonadaptive routing, deadlocks, wormhole routing, mesh networks, fault-tolerant routing, multicomputer networks
27	Luca Simoncini, Arthur D. Friedman	Incomplete Fault Coverage In Modular Miltiprocessor Systems.	ACM Annual Conference (1)	1978	DBLP DOI BibTeX RDF
27	Alireza Kavianpour, Arthur D. Friedman	Tradeoffs in system level diagnosis of multiprocessor systems.	AFIPS National Computer Conference	1984	DBLP DOI BibTeX RDF
27	Elias Procópio Duarte Jr., Alessandro Brawerman, Luiz Carlos Pessoa Albini	An Algorithm for Distributed Hierarchical Diagnosis of Dynamic Fault and Repair Events.	ICPADS	2000	DBLP DOI BibTeX RDF
27	Fadi Maamari, Janusz Rajski	The dynamic reduction of fault simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
25	Che-Nan Kuo, Sun-Yuan Hsieh	Fault-Free Cycles in Conditional Faulty Folded Hypercubes.	ICA3PP	2009	DBLP DOI BibTeX RDF	Bipancyclicity, folded hypercubes, fault-tolerant cycle embedding, Hamiltonian cycles, graph-theoretic interconnection networks, pancyclicity
25	Sun-Yuan Hsieh, Gen-Huey Chen, Chin-Wen Ho	Longest Fault-Free Paths in Star Graphs with Edge Faults.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	fault tolerance, embedding, Bipartite graph, star graph, Hamiltonicity, longest path
25	K. H. (Kane) Kim	Systematic Composition and Analyzability of Dependable Networked Embedded Computing Systems.	SRDS	2006	DBLP DOI BibTeX RDF
25	Khaled Day, Abdel Elah Al-Ayyoub	Minimal Fault Diameter for Highly Resilient Product Networks.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	fault tolerance, interconnection networks, node-disjoint paths, product networks, Fault diameter
25	Lakshminarayana Pappu, Michael L. Bushnell, Vishwani D. Agrawal, Mandyam-Komar Srinivas	Statistical path delay fault coverage estimation for synchronous sequential circuits.	VLSI Design	1996	DBLP DOI BibTeX RDF	path delay fault coverage estimation, multi-valued algebra, signal statistics, latch updating, fault diagnosis, logic testing, delays, probability, controllability, controllability, statistical analysis, sequential circuits, observability, observabilities, logic simulation, synchronous sequential circuits, statistical estimation
24	Sung-Ming Yen, Dongryeol Kim, Sang-Jae Moon	Cryptanalysis of Two Protocols for RSA with CRT Based on Fault Infection.	FDTC	2006	DBLP DOI BibTeX RDF	Factorization attack, Fault infective CRT, Cryptography, Chinese remainder theorem (CRT), Residue number system, Hardware fault cryptanalysis
24	Michele Favalli, Piero Olivo, Bruno Riccò	A probabilistic fault model for 'analog' faults in digital CMOS circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1992	DBLP DOI BibTeX RDF
24	Jipeng Zhou	Fault-Tolerant Wormhole Routing with 2 Virtual Channels in Meshes.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	disjoint fault-connected region, fault-tolerant wormhole routing, virtual channel, deadlock freedom
24	Svetlana P. Kartashev, Steven I. Kartashev	Reconfigurable fault-tolerant multicomputer network.	AFIPS National Computer Conference	1983	DBLP DOI BibTeX RDF
24	Chauchin Su, Shyh-Shen Hwang, Shyh-Jye Jou, Yuan-Tzu Ting	Syndrome Simulation And Syndrome Test For Unscanned Interconnects.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	unscanned interconnects, syndrome test methodology, event driven syndrome simulation, boundary scan environment, faulty syndromes, fault-free syndromes, tolerable error rate, partially scanned PCB, board level testing, test pattern generation, boundary scan testing, test length, MCM, set covering problem, simulation algorithm, weighted random patterns, test cost reduction
24	Abhijit Ghosh, Srinivas Devadas, A. Richard Newton	Sequential Test Generation at the Register-Transfer and Logic Levels.	DAC	1990	DBLP DOI BibTeX RDF
23	Dieter Spath, Ulf Osmers	Virtual Reality - An Approach to Improve the Generation of Fault-Free Software for Programmable Logic Controllers (PLC).	ICECCS	1996	DBLP DOI BibTeX RDF	fault free software, instruction list, ladder diagram, virtual reality, programmable logic controllers, programmable controllers, low-level languages
23	Abdullah A. Abonamah, Fadi N. Sibai, N. K. Sharma 0002	Conflict Resolution and Fault-Free Path Selection in Multicast-Connected Cube-Based Networks.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	cube-based, fault-free path selection, probability of failure, fault tolerant computing, multiprocessor interconnection networks, MINs, conflict resolution, simulation results, faults, conflicts, network performance, performance improvement, reconfiguration algorithm, multicast-connected, multicast connections
23	Sun-Yuan Hsieh, Pei-Yu Yu	Fault-free mutually independent Hamiltonian cycles in hypercubes with faulty edges.	J. Comb. Optim.	2007	DBLP DOI BibTeX RDF	Mutually independent Hamiltonian cycles, Hypercubes, Hamiltonian, Graph-theoretic interconnection networks, Fault-tolerant embedding
23	Sun-Yuan Hsieh, Chang-Yu Wu, Chia-Wei Lee	Fault-free Hamiltonian cycles in locally twisted cubes under conditional edge faults.	ICPADS	2007	DBLP DOI BibTeX RDF
22	Farshad Safaei, Ahmad Khonsari, Mahmood Fathy, Mohamed Ould-Khaoua	Performance analysis of fault-tolerant routing algorithm in wormhole-switched interconnections.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	Fault patterns, Software-Based routing, Fault-tolerance, Performance modeling, Adaptive routing, Parallel systems, Virtual channels, Torus, Queuing theory, Deterministic routing
22	Christoforos N. Hadjicostis, George C. Verghese	Coding approaches to fault tolerance in linear dynamic systems.	IEEE Trans. Inf. Theory	2005	DBLP DOI BibTeX RDF
22	Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jutman	Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs.	EDCC	2005	DBLP DOI BibTeX RDF
22	Rajib K. Das	Fault Tolerant Routing in Star Graphs Using Fault Vector.	IWDC	2005	DBLP DOI BibTeX RDF
22	Yuanyuan Yang 0001, Jianchao Wang	Fault-Tolerant Rearrangeable Permutation Network.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	losing-contact fault, Fault tolerance, routing, cluster computing, fault model, permutation, switching networks, Clos networks, rearrangeable
22	Chi-Hsiang Yeh	The Robust Middleware Approach for Transparent and Systematic Fault Tolerance in Parallel and Distributed Systems.	ICPP	2003	DBLP DOI BibTeX RDF
22	Farzan Aminian, Mehran Aminian	Fault Diagnosis of Nonlinear Analog Circuits Using Neural Networks with Wavelet and Fourier Transforms as Preprocessors.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	electronic circuits, neural networks, fault diagnosis, wavelet transform, Fourier transform, analog circuits, nonlinear circuits
22	Elias Procópio Duarte Jr., Aldri L. dos Santos	Network Fault Management Based on SNMP Agent Groups.	ICDCS Workshops	2001	DBLP DOI BibTeX RDF
22	Lakshminarayana Pappu, Michael L. Bushnell, Vishwani D. Agrawal, Mandyam-Komar Srinivas	Statistical Delay Fault Coverage Estimation for Synchronous Sequential Circuits.	J. Electron. Test.	1998	DBLP DOI BibTeX RDF	statistical fault analysis, fault simulation, delay test, path-delay faults, transition faults
22	P. C. Ward, James R. Armstrong	Behavioral Fault Simulation in VHDL.	DAC	1990	DBLP DOI BibTeX RDF
22	Jianxi Fan, Xiaola Lin	The t/k-Diagnosability of the BC Graphs.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	precise diagnosis strategy, pessimistic diagnosis strategy, t/k-diagnosis strategy, BC graph, Möbius cube, hypercube, Diagnosis, diagnosability, crossed cube, twisted cube
22	Dong Xiang, Ai Chen	Fault-Tolerant Routing in 2D Tori or Meshes Using Limited-Global-Safety Information.	ICPP	2002	DBLP DOI BibTeX RDF
22	Shu-Yi Yu, Edward J. McCluskey	Permanent Fault Repair for FPGAs with Limited Redundant Area.	DFT	2001	DBLP DOI BibTeX RDF	Permanent Fault Repair, Adaptive Computing System, Reconfigurable Computing System, Fault Tolerance, FPGA, Recovery
22	Hsien-Sheng Hsiao, Yeh-Hao Chin, Wei-Pang Yang	Reaching Fault Diagnosis Agreement under a Hybrid Fault Model.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	fault diagnosis agreement, mixed fault model, Byzantine agreement, fault-tolerant distributed system, hybrid fault model
22	Shu-Chin Wang, Kuo-Qin Yan	Reaching Fault Diagnosis Agreement on Dual Link Failure Mode.	ICPADS	2000	DBLP DOI BibTeX RDF	Distributed System, Parallel Processing, Fault Diagnosis, Byzantine Agreement, Interactive Consistency
22	Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu, Toshiyuki Matsunaga	A Method of Generating Tests for Marginal Delays an Delay Faults in Combinational Circuits.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	marginal delay, test generation, combinational circuit, gate delay faults
22	Suresh Chalasani, Rajendra V. Boppana	Fault-tolerant wormhole routing in tori.	International Conference on Supercomputing	1994	DBLP DOI BibTeX RDF	performance evaluation, deadlocks, wormhole routing, adaptive routing, fault-tolerant routing, message routing, torus networks, multicomputer networks
21	Mourad Elhadef, Azzedine Boukerche, Hisham Elkadiki	An Adaptive Fault Identification Protocol for an Emergency/Rescue-Based Wireless and Mobile Ad-Hoc Network.	IPDPS	2007	DBLP DOI BibTeX RDF
21	Toru Araki	Optimal Adaptive Fault Diagnosis of Cubic Hamiltonian Graphs.	ISPAN	2004	DBLP DOI BibTeX RDF
21	Mohammad Tehranipoor, Reza M. Rad	Test and recovery for fine-grained nanoscale architectures.	FPGA	2006	DBLP DOI BibTeX RDF
20	Sun-Yuan Hsieh, Che-Nan Kuo, Hui-Ling Huang	Longest Fault-Free Paths in Hypercubes with both Faulty Nodes and Edges.	FGCN (2)	2007	DBLP DOI BibTeX RDF
19	Cees T. A. M. de Laat, Chris Develder, Admela Jukan, Joe Mambretti	Introduction.	Euro-Par	2009	DBLP DOI BibTeX RDF
19	Rajsekhar Adapa, Edward Flanigan, Spyros Tragoudas	A Novel Test Generation Methodology for Adaptive Diagnosis.	ISQED	2008	DBLP DOI BibTeX RDF	Test Generation, Diagnosis, Failure Analysis
19	Anurag Dasgupta, Sukumar Ghosh, Xin Xiao	Probabilistic Fault-Containment.	SSS	2007	DBLP DOI BibTeX RDF
19	Heidar A. Talebi, Rajnikant V. Patel, Khashayar Khorasani	Fault detection and isolation for uncertain nonlinear systems with application to a satellite reaction wheel actuator.	SMC	2007	DBLP DOI BibTeX RDF
19	Michel Morneau, Abdelhakim Khouas	TBSA: Threshold-Based Simulation Accuracy Method for Fast Analog DC Fault Simulation.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	DC fault simulation, analog fault detection, Newton-Raphson algorithm, analog testing
19	Linas Laibinis, Elena Troubitsyna	Refinement of Fault Tolerant Control Systems in B.	SAFECOMP	2004	DBLP DOI BibTeX RDF
19	J. H. Jiang, Wen-Ben Jone, Shih-Chieh Chang, Swaroop Ghosh	Embedded core test generation using broadcast test architecture and netlist scrambling.	IEEE Trans. Reliab.	2003	DBLP DOI BibTeX RDF
19	Giacomo Buonanno, M. Pugassi, Mariagiovanna Sami	A high-level synthesis approach to design of fault-tolerant systems.	VTS	1997	DBLP DOI BibTeX RDF	hardware-software system, design, embedded system, fault tolerant computing, high-level synthesis, reconfiguration, scheduling algorithm, cost, processor, fault-tolerant system
19	Niranjan L. Cooray, Edward W. Czeck	Guaranteed fault detection sequences for single transition faults in finite state machine models using concurrent fault simulation.	J. Electron. Test.	1996	DBLP DOI BibTeX RDF	sequential logic test generation, finite state machine testing, transition fault, distinguishing sequences
19	Michele Favalli, Piero Olivo, Bruno Riccò	Dynamic effects in the detection of bridging faults in CMOS ICs.	J. Electron. Test.	1992	DBLP DOI BibTeX RDF	test invalidation, fault models, fault simulation, Bridging faults
19	Y-Chuang Chen, Meng-Hung Chen, Jimmy J. M. Tan	Maximally Local Connectivity on Augmented Cubes.	ICA3PP	2009	DBLP DOI BibTeX RDF	local connectivity, vertex-disjoint path, augmented cube, fault tolerance, connectivity
19	Andreas Björklund	Optimal Adaptive Fault Diagnosis of Hypercubes.	SWAT	2000	DBLP DOI BibTeX RDF
19	Irith Pomeranz, Sudhakar M. Reddy	LOCSTEP: a logic-simulation-based test generation procedure.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
19	Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch	Delay-Fault Diagnosis by Critical-Path Tracing.	IEEE Des. Test Comput.	1992	DBLP DOI BibTeX RDF
19	Ajit Agrawal	Fault-tolerant computing on trees.	SPDP	1990	DBLP DOI BibTeX RDF
19	Edward H. Bensley, Thomas J. Brando, J. C. Fohlin, Myra Jean Prelle, Ann Wollrath	MITRE's future generation computer architectures program.	OOPSLA/ECOOP Workshop on Object-based Concurrent Programming	1988	DBLP DOI BibTeX RDF
19	Jie Xu 0007, Brian Randell	Roll-forward error recovery in embedded real-time systems.	ICPADS	1996	DBLP DOI BibTeX RDF	roll-forward error recovery, checkpointing schemes, time-critical applications, checkpoint validation steps, fault-free processors, interaction-intensive applications, checkpoint validation, real-time systems, fault tolerant computing, distributed processing, multiprocessing systems, system recovery, embedded real-time systems
19	Guanghua Lin, Nian-Feng Tzeng	Reconfiguration and experiments on a faulty hypercube.	IPPS	1995	DBLP DOI BibTeX RDF	Intel iPSC/860, fault-free nodes, fault tolerant computing, reconfiguration, reconfigurable architectures, hypercube networks, faulty hypercube, subcube
19	Alon Itai, Shay Kutten, Yaron Wolfstahl, Shmuel Zaks	Optimal Distributed t-Resilient Election in Complete Networks.	IEEE Trans. Software Eng.	1990	DBLP DOI BibTeX RDF	optimal distributed t-resilient election, distributed leader election, election algorithm, fault-free network, software engineering, fault tolerant computing, distributed processing, computer networks, message complexity, complete networks
19	Jung-Sheng Fu, Gen-Huey Chen	Cycle embedding in faulty hierarchical cubic networks.	SAC	2002	DBLP DOI BibTeX RDF	hierarchical cubic network, hypercube, hamiltonian cycle, gray code, fault-tolerant embedding
19	Alessandro Brawerman, Elias Procópio Duarte Jr.	An Isochronous Testing Strategy for Hierarchical Adaptive Distributed System-Level Diagnosis.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	hierarchical diagnosis, network fault management, fault-tolerance, distributed systems, distributed diagnosis
18	Andrew A. Chien, Jae H. Kim	Planar-Adaptive Routing: Low-Cost Adaptive Networks for Multiprocessors.	J. ACM	1995	DBLP DOI BibTeX RDF	transmission-order preservation, fault tolerance, parallel processing, interconnection networks, adaptive routing, multicomputers, packet routing
17	Sagar S. Sabade, D. M. H. Walker	Estimation of fault-free leakage current using wafer-level spatial information.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
16	Yves Joannon, Vincent Beroulle, Chantal Robach, Smail Tedjini, Jean-Louis Carbonéro	Decreasing Test Qualification Time in AMS and RF Systems.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF	AMS and RF SoCs, parametric fault injection, behavioral modeling, fault-based test, design validation, VHDL-AMS, qualification
16	Chi-Sing Leung, J. P. F. Sum	A Fault-Tolerant Regularizer for RBF Networks.	IEEE Trans. Neural Networks	2008	DBLP DOI BibTeX RDF
16	Yue Jiang 0001, Bojan Cukic, Tim Menzies	Cost Curve Evaluation of Fault Prediction Models.	ISSRE	2008	DBLP DOI BibTeX RDF
16	Amir Zjajo, José Pineda de Gyvez, Guido Gronthoud	Structural Fault Modeling and Fault Detection Through Neyman-Pearson Decision Criteria for Analog Integrated Circuits.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	structural fault modeling, analog fault modeling, Neyman-Pearson decision, fault detection, analog test, supply current monitoring
16	Farshad Safaei, Mahmood Fathy, Ahmad Khonsari, Mohamed Ould-Khaoua	A Performance Model of Fault-Tolerant Routing Algorithm in Interconnect Networks.	International Conference on Computational Science (1)	2006	DBLP DOI BibTeX RDF
16	Toshinori Sato, Akihiro Chiyonobu	Evaluating the Impact of Fault Recovery on Superscalar Processor Performance.	PRDC	2006	DBLP DOI BibTeX RDF
16	N. Venkateswaran 0002, S. Balaji, V. Sridhar	Fault tolerant bus architecture for deep submicron based processors.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF	deep submicron technology, fault tolerance, interconnect, electromigration
16	Yvan Maidon, Thomas Zimmer, André Ivanov	An Analog Circuit Fault Characterization Methodology.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	analog circuit testing, analog fault diagnosis, analog fault characterization
16	Reza Asgary, Karim Mohammadi	Using Fuzzy Probabilistic Neural Network for Fault Detection in MEMS.	ISDA	2005	DBLP DOI BibTeX RDF
16	Ronald F. DeMara, Kening Zhang	Autonomous FPGA Fault Handling through Competitive Runtime Reconfiguration.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
16	Aditya Sankar Medury, Ingvar Carlson, Atila Alvandpour, John Stensby	Structural Fault Diagnosis in Charge-Pump Based Phase-Locked Loops.	VLSI Design	2005	DBLP DOI BibTeX RDF
16	Paul C. Attie, Anish Arora, E. Allen Emerson	Synthesis of fault-tolerant concurrent programs.	ACM Trans. Program. Lang. Syst.	2004	DBLP DOI BibTeX RDF	fault-tolerance, specification, temporal logic, Concurrent programs, program synthesis
16	Åsmund Tjora, Amund Skavhaug	A General Mathematical Model for Run-Time Distributions in a Passively Replicated Fault Tolerant System.	ECRTS	2003	DBLP DOI BibTeX RDF
16	M. A. El-Gamal	Genetically Evolved Neural Networks for Fault Classification in Analog Circuits.	Neural Comput. Appl.	2002	DBLP DOI BibTeX RDF	Fault grouping, Genetically evolved neural networks, Genetic algorithms, Fault simulation, Analog circuits, Fault classification
16	Khaled Saab 0001, Naim Ben-Hamida, Bozena Kaminska	Closing the gap between analog and digital testing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
16	Khaled Saab 0001, Naim Ben-Hamida, Bozena Kaminska	Closing the gap between analog and digital.	DAC	2000	DBLP DOI BibTeX RDF	hard faults, fault modeling, fault simulation, test vector generation
16	Hin-Sing Siu, Yeh-Hao Chin, Wei-Pang Yang	Byzantine Agreement in the Presence of Mixed Faults on Processors and Links.	IEEE Trans. Parallel Distributed Syst.	1998	DBLP DOI BibTeX RDF	synchronization, Byzantine agreement, fault-tolerant distributed system, hybrid fault model, general network
16	Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu	Diagnosis of Single Gate Delay Faults in Combinational Circuits using Delay Fault Simulation.	Asian Test Symposium	1998	DBLP DOI BibTeX RDF