Search results for "leakage"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
27	Jean-Sébastien Coron, Paul C. Kocher, David Naccache	Statistics and Secret Leakage.	Financial Cryptography	2000	DBLP DOI BibTeX RDF
27	Alireza Vahdatpour, Miodrag Potkonjak	Leakage minimization using self sensing and thermal management.	ISLPED	2010	DBLP DOI BibTeX RDF	delay, thermal management, leakage energy
27	Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino	Aging effects of leakage optimizations for caches.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	memory hierarchy, aging, leakage reduction
27	Simone Medardoni, Davide Bertozzi, Enrico Macii	Power-optimal RTL arithmetic unit soft-macro selection strategy for leakage-sensitive technologies.	ISLPED	2007	DBLP DOI BibTeX RDF	RTL synthesis, leakage-aware, power management, selection strategy
27	Sachin S. Sapatnekar	Book Reviews: Plumbing the Depths of Leakage.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	nanometer CMOS technology, leakage
27	Govind Kabra, Ravishankar Ramamurthy, S. Sudarshan 0001	Redundancy and information leakage in fine-grained access control.	SIGMOD Conference	2006	DBLP DOI BibTeX RDF	query optimization, redundancy, information leakage, fine-grained access control
27	Eric Wong 0002, Jacob R. Minz, Sung Kyu Lim	Decoupling capacitor planning and sizing for noise and leakage reduction.	ICCAD	2006	DBLP DOI BibTeX RDF	3D floorplanning, power supply noise, decoupling capacitors, leakage power reduction
27	Jian-Jia Chen, Heng-Ruey Hsu, Tei-Wei Kuo	Leakage-Aware Energy-Efficient Scheduling of Real-Time Tasks in Multiprocessor Systems.	IEEE Real Time Technology and Applications Symposium	2006	DBLP DOI BibTeX RDF	Leakage-aware scheduling, Real-time and embedded systems and Task partitioning
27	Hari Ananthan, Kaushik Roy 0001	A fully physical model for leakage distribution under process variations in Nanoscale double-gate CMOS.	DAC	2006	DBLP DOI BibTeX RDF	leakage distribution, multiple-gate, tri-gate, process variations, finFET, double-gate
27	Philippe Royannez, Hugh Mair, Franck Dahan, Mike Wagner, Mark Streeter, Laurent Bouetel, Joel Blasquez, H. Clasen, G. Semino, Julie Dong, D. Scott, B. Pitts, Claudine Raibaut, Uming Ko	A design platform for 90-nm leakage reduction techniques.	DAC	2005	DBLP DOI BibTeX RDF	leakage power management, wireless application processor, SoC design
27	Akihito Sakanaka, Seiichirou Fujii, Toshinori Sato	A leakage-energy-reduction technique for highly-associative caches in embedded systems.	SIGARCH Comput. Archit. News	2004	DBLP DOI BibTeX RDF	cache memories, embedded processors, leakage current
27	Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky	Characterization of logic circuit techniques for high leakage CMOS technologies.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	monotonic logic, low power, leakage current
27	Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark	Managing leakage for transient data: decay and quasi-static 4T memory cells.	ISLPED	2002	DBLP DOI BibTeX RDF	4T, decay, memory cell, quasi-static, transient data, leakage power
27	Subir K. Roy, Hiroaki Iwashita, Tsuneo Nakata	Dataflow Analysis for Resource Contention and Register Leakage Properties.	VLSI Design	2000	DBLP DOI BibTeX RDF	Register Leakage, Simulation, Formal Verification, Resource Contention
24	Kyeong-Sik Min, Hun-Dae Choi, H.-Y. Choi, Hiroshi Kawaguchi 0001, Takayasu Sakurai	Leakage-suppressed clock-gating circuit with Zigzag Super Cut-off CMOS (ZSCCMOS) for leakage-dominant sub-70-nm and sub-1-V-VDD LSIs.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
24	Jin Tian, Yang Qiu 0005, Ankun Lin	Generalized Analysis Model of Information Security of Computer System Based on Electromagnetic Topology.	IAS	2009	DBLP DOI BibTeX RDF
24	Meikang Qiu, Laurence Tianruo Yang, Edwin Hsing-Mean Sha	Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC.	CSE (2)	2009	DBLP DOI BibTeX RDF
24	Ehsan Pakbaznia, Massoud Pedram	Design and application of multimodal power gating structures.	ISQED	2009	DBLP DOI BibTeX RDF
24	Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar	Body Bias Voltage Computations for Process and Temperature Compensation.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
24	Zhiyu Liu, Volkan Kursun	Characterization of a Novel Nine-Transistor SRAM Cell.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
24	Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino	A Scalable Algorithmic Framework for Row-Based Power-Gating.	DATE	2008	DBLP DOI BibTeX RDF
24	Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula	Temperature and Process Variations Aware Power Gating of Functional Units.	VLSI Design	2008	DBLP DOI BibTeX RDF
24	Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang	Design and analysis of Thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies.	ISLPED	2007	DBLP DOI BibTeX RDF	FD/SOI, low-power, stability, SRAM
24	Wei Wu 0024, Sheldon X.-D. Tan, Jun Yang 0002, Shih-Lien Lu	Improving the reliability of on-chip data caches under process variations.	ICCD	2007	DBLP DOI BibTeX RDF
24	Anish Muttreja, Niket Agarwal, Niraj K. Jha	CMOS logic design with independent-gate FinFETs.	ICCD	2007	DBLP DOI BibTeX RDF
24	Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie 0001, Narayanan Vijaykrishnan	FPGA routing architecture analysis under variations.	ICCD	2007	DBLP DOI BibTeX RDF
24	Tamer Cakici, Keejong Kim, Kaushik Roy 0001	FinFET Based SRAM Design for Low Standby Power Applications.	ISQED	2007	DBLP DOI BibTeX RDF
24	Maryam Ashouei, Muhammad Mudassar Nisar, Abhijit Chatterjee, Adit D. Singh, Abdulkadir Utku Diril	Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations.	VLSI Design	2007	DBLP DOI BibTeX RDF
24	Sarma B. K. Vrudhula, Sarvesh Bhardwaj	Tutorial T6: Robust Design of Nanoscale Circuits in the Presence of Process Variations.	VLSI Design	2007	DBLP DOI BibTeX RDF
24	Yuan-Pei Lin, See-May Phoong	Window designs for DFT-based multicarrier systems.	IEEE Trans. Signal Process.	2005	DBLP DOI BibTeX RDF
24	Jürgen Fischer, Philip Teichmann, Doris Schmitt-Landsiedel	Scaling trends in adiabatic logic.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	low power, energy recovery, adiabatic computing
24	Pedro Chaparro, José González 0002, Antonio González 0001	Thermal-Aware Clustered Microarchitectures.	ICCD	2004	DBLP DOI BibTeX RDF
24	Debasis Samanta, Ajit Pal	Synthesis of Low Power High Performance Dual-VT PTL Circuits.	VLSI Design	2004	DBLP DOI BibTeX RDF
24	Mohab Anis, Shawki Areibi, Mohamed I. Elmasry	Design and optimization of multithreshold CMOS (MTCMOS) circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
24	Fei Li 0003, Lei He 0001, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy	High Level Area and Current Estimation.	PATMOS	2003	DBLP DOI BibTeX RDF
24	Arman Vassighi, Oleg Semenov, Manoj Sachdev, Ali Keshavarzi	Effect of Static Power Dissipation in Burn-In Environment on Yield of VLSI.	DFT	2002	DBLP DOI BibTeX RDF
24	Anja Niedermeier, Kjetil Svarstad, Frank Bouwens, Jos Hulzink, Jos Huisken	The challenges of implementing fine-grained power gating.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	leakage power minimization, analysis, power management, register-transfer-level, power modeling, power gating
24	Kagan Irez, Jiaping Hu, Charles A. Zukowski	Characteristics of MS-CMOS logic in sub-32nm technologies.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	MSCMOS, gate leakage reduction, hs&ls, logic overhead, upsizing, noise margin, input vector, domino, downsizing
24	Amit Golander, Shlomo Weiss	Checkpoint allocation and release.	ACM Trans. Archit. Code Optim.	2009	DBLP DOI BibTeX RDF	early register release, misprediction, Checkpoint, leakage, out-of-order execution, rollback
24	Alejandro Valero, Julio Sahuquillo, Salvador Petit, Vicente Lorente, Ramon Canal, Pedro López 0001, José Duato	An hybrid eDRAM/SRAM macrocell to implement first-level data caches.	MICRO	2009	DBLP DOI BibTeX RDF	retention time, static and dynamic memory cells, leakage current
24	Sudhanshu Khanna, Benton H. Calhoun	Serial sub-threshold circuits for ultra-low-power systems.	ISLPED	2009	DBLP DOI BibTeX RDF	bit width, serial systems, leakage, ultra low power, sub-threshold
24	Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. Massoud	Dual-threshold pass-transistor logic design.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	dual threshold, pass transistor, low power, leakage
24	Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli	NoC topology synthesis for supporting shutdown of voltage islands in SoCs.	DAC	2009	DBLP DOI BibTeX RDF	shutdown, topology, NoC, leakage power, voltage islands
24	Ilaria Venturini	Oracle Channels.	Trans. Data Hiding Multim. Secur.	2008	DBLP DOI BibTeX RDF	Oracle attacks, Secure watermarking, Information hiding, Covert channels, Information leakage, Subliminal channels, Covert communications
24	Roberto Giorgi, Paolo Bennati	Filtering drowsy instruction cache to achieve better efficiency.	SAC	2008	DBLP DOI BibTeX RDF	low-power, leakage, drowsy cache, filter cache
24	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman	Full Open Defects in Nanometric CMOS.	VTS	2008	DBLP DOI BibTeX RDF	interconnect open, gate leakage current, CMOS
24	Colin D. Walter	Recovering Secret Keys from Weak Side Channel Traces of Differing Lengths.	CHES	2008	DBLP DOI BibTeX RDF	Hidden Markov Models, simple power analysis, SPA, Viterbi Algorithm, Forward-Backward Algorithm, Side channel leakage
24	Yasuhiro Fujii, Ryu Ebisawa, Yumiko Togashi, Takaaki Yamada, Yoshinori Honda, Seiichi Susaki	Third-party approach to controlling digital copiers.	iiWAS	2008	DBLP DOI BibTeX RDF	digital copiers, information leakage, paper documents
24	Seungwhun Paik, Youngsoo Shin	Multiobjective optimization of sleep vector for zigzag power-gated circuits in standard cell elements.	DAC	2008	DBLP DOI BibTeX RDF	sleep vector, zigzag power gating, low power, leakage current, standard-cell
24	Siddharth Garg, Diana Marculescu	On the impact of manufacturing process variations on the lifetime of sensor networks.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	leakage power variability, manufacturing process variations, sensor networks, lifetime
24	Colin D. Walter	Longer Randomly Blinded RSA Keys May Be Weaker Than Shorter Ones.	WISA	2007	DBLP DOI BibTeX RDF	RSA, DPA, power analysis, SPA, Side channel leakage
24	Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino	Timing-driven row-based power gating.	ISLPED	2007	DBLP DOI BibTeX RDF	row-based, clustering, leakage power, power-gating, standard cell, sleep transistor
24	Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti	Throughput of multi-core processors under thermal constraints.	ISLPED	2007	DBLP DOI BibTeX RDF	leakage dependence on temperature, throughput, power, speedup, thermal management, multi-core processors
24	Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki J. Murakami	The effect of temperature on cache size tuning for low energy embedded systems.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	embedded systems, cache memory, low energy, leakage current, temperature-aware design
24	Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar	Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems.	ASP-DAC	2006	DBLP DOI BibTeX RDF	Nonlinear Programming Problem (NLPP), daptive Body Bias (ABB), temperature variations, delay, process variations, leakage, enumeration
24	Mohammad Sharifkhani, Manoj Sachdev	A low power SRAM architecture based on segmented virtual grounding.	ISLPED	2006	DBLP DOI BibTeX RDF	static-random access memory, write power reduction, low-power, SRAM, leakage reduction
24	Bo Fu, Qiaoyan Yu, Paul Ampadu	Energy-delay minimization in nanoscale domino logic.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	delay, energy, leakage, low voltage, domino
24	Ali Bastani, Charles A. Zukowski	Characterization of monotonic static CMOS gates in a 65nm technology.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	gate leakage reduction, low power design
24	A. Madan, S. C. Bose, P. J. George, Chandra Shekhar 0001	Evaluation of Device Parameters of HfO2/SiO2/Si Gate Dielectric Stack for MOSFETs.	VLSI Design	2005	DBLP DOI BibTeX RDF	Direct Tunneling, gate leakage current, high-K gate stack, MOSFETs
24	Ravindra Jejurikar, Rajesh K. Gupta 0001	Dynamic slack reclamation with procrastination scheduling in real-time embedded systems.	DAC	2005	DBLP DOI BibTeX RDF	critical speed, dynamic slack reclamation, task procrastication, real-time systems, leakage power, low power scheduling
24	Jin Hong 0001, Dong Hoon Lee 0002, Seongtaek Chee, Palash Sarkar 0001	Vulnerability of Nonlinear Filter Generators Based on Linear Finite State Machines.	FSE	2004	DBLP DOI BibTeX RDF	nonlinear filter model, Anderson information leakage, Stream cipher, LFSR, CA
24	Michael D. Powell, T. N. Vijaykumar	Pipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise.	ISLPED	2003	DBLP DOI BibTeX RDF	a priori current ramping, pipeline muffling, leakage, decoupling capacitors, inductive noise
24	Colin D. Walter	Seeing through MIST Given a Small Fraction of an RSA Private Key.	CT-RSA	2003	DBLP DOI BibTeX RDF	division chains, randomized exponentiation, Mist, randomary exponentiation, RSA, DPA, blinding, power analysis, smartcard, SPA, Addition chains, DEMA, side channel leakage, SEMA
24	Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf	Energy savings through compression in embedded Java environments.	CODES	2002	DBLP DOI BibTeX RDF	embedded Java, Java, compression, leakage energy
24	Victor V. Zyuban, Stephen V. Kosonocky	Low power integrated scan-retention mechanism.	ISLPED	2002	DBLP DOI BibTeX RDF	balloon latch, data retention, low power, scan, leakage, latch, MTCMOS, subthreshold
24	Adam L. Young, Moti Yung	Towards Signature-Only Signature Schemes.	ASIACRYPT	2000	DBLP DOI BibTeX RDF	Public Key Cryptosystems (PKCS), nested trapdoor, abuse freeness, (subliminal) leakage, design validation proofs, FIPS, digital signature, decryption, Public Key Infrastructure (PKI), NIST
24	Adam L. Young, Moti Yung	Kleptography: Using Cryptography Against Cryptography.	EUROCRYPT	1997	DBLP DOI BibTeX RDF	Cryptanalytic attacks, leakage bandwidth, design and manufacturing of cryptographic devices and software, black-box devices, SETUP mechanisms, RSA, randomness, information hiding, pseudorandomness, Diffie-Hellman, subliminal channels, kleptography, Discrete Log
24	Michael G. McNamer, H. Troy Nagle	ITA: An algorithm for IDDQ testability analysis.	J. Electron. Test.	1996	DBLP DOI BibTeX RDF	integrated circuit testing, testability analysis, I DDQ testing, leakage faults
24	Eric W. MacDonald, Nur A. Touba	Testing domino circuits in SOI technology.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	silicon-on-insulator, SOI technology, dynamic circuit styles, fault modeling analysis, overall fault coverage, parasitic bipolar leakage, CMOS logic, logic testing, integrated circuit testing, automatic testing, fault simulation, CMOS logic circuits, leakage currents, domino circuits
21	Rouwaida Kanj, Rajiv V. Joshi, Sani R. Nassif	Statistical leakage modeling for accurate yield analysis: the CDF matching method and its alternatives.	ISLPED	2010	DBLP DOI BibTeX RDF	sram
21	Heng Yu 0001, Bharadwaj Veeravalli, Yajun Ha	Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems.	DAC	2010	DBLP DOI BibTeX RDF	dynamic scheduling, adaptive applications
21	Ye Zhu 0001, Riccardo Bettati	Information Leakage as a Model for Quality of Anonymity Networks.	IEEE Trans. Parallel Distributed Syst.	2009	DBLP DOI BibTeX RDF
21	Balachander Krishnamurthy, Craig E. Wills	On the leakage of personally identifiable information via online social networks.	WOSN	2009	DBLP DOI BibTeX RDF	privacy, online social networks, personally identifiable information
21	Kar Way Tan, Yimin Lin, Kyriakos Mouratidis	Spatial Cloaking Revisited: Distinguishing Information Leakage from Anonymity.	SSTD	2009	DBLP DOI BibTeX RDF
21	Moni Naor, Gil Segev 0001	Public-Key Cryptosystems Resilient to Key Leakage.	CRYPTO	2009	DBLP DOI BibTeX RDF
21	Jie Gu 0003, John Keane 0001, Sachin S. Sapatnekar, Chris H. Kim	Statistical Leakage Estimation of Double Gate FinFET Devices Considering the Width Quantization Property.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
21	Guillaume Duc, Ronan Keryell	Improving virus protection with an efficient secure architecture with memory encryption, integrity and information leakage protection.	J. Comput. Virol.	2008	DBLP DOI BibTeX RDF
21	Franz Schlögl, Kerstin Schneider-Hornstein, Horst Zimmermann	Gain reduction by gate-leakage currents in regulated cascodes.	DDECS	2008	DBLP DOI BibTeX RDF
21	Howard Chen 0001, Scott Neely, Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah	Statistical Modeling and Analysis of Static Leakage and Dynamic Switching Power.	PATMOS	2008	DBLP DOI BibTeX RDF	Statistical power analysis
21	Stefan Dziembowski, Krzysztof Pietrzak	Leakage-Resilient Cryptography.	FOCS	2008	DBLP DOI BibTeX RDF
21	Anupama R. Subramaniam, Ritu Singhal, Chi-Chao Wang, Yu Cao	Design rule optimization of regular layout for leakage reduction in nanoscale design.	ASP-DAC	2008	DBLP DOI BibTeX RDF
21	Keith Irwin, Ting Yu 0001, William H. Winsborough	Avoiding information leakage in security-policy-aware planning.	WPES	2008	DBLP DOI BibTeX RDF	scheduling, policy, obligations
21	Hong Zhu 0003, Jie Shi, Yuanzhen Wang, Yucai Feng	Controlling Information Leakage of Fine-Grained Access Model in DBMSs.	WAIM	2008	DBLP DOI BibTeX RDF
21	Muntaha Alawneh, Imad M. Abbadi	Sharing but Protecting Content Against Internal Leakage for Organisations. (PDF / PS)	DBSec	2008	DBLP DOI BibTeX RDF
21	Kuen-Yu Tsai, Meng-Fu You, Yi-Chang Lu, Philip C. W. Ng	A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects.	ICCAD	2008	DBLP DOI BibTeX RDF
21	Hao Xu 0010, Ranga Vemuri, Wen-Ben Jone	Run-time Active Leakage Reduction by power gating and reverse body biasing: An eNERGY vIEW.	ICCD	2008	DBLP DOI BibTeX RDF
21	Sherif A. Tawfik, Volkan Kursun	Dynamic wordline voltage swing for low leakage and stable static memory banks.	ISCAS	2008	DBLP DOI BibTeX RDF
21	Linfeng Pan, Minyi Guo, Yanqin Yang, Meng Wang 0005, Zili Shao	A State-Based Predictive Approach for Leakage Reduction of Functional Units.	EUC (1)	2008	DBLP DOI BibTeX RDF
21	Soo Siang Yang, Haider A. F. Mohamed, Mahmoud Moghavvemi, Yeh Huann Goh	Leakage Detection Via Model Based Method.	RAM	2008	DBLP DOI BibTeX RDF
21	Min-Hsiung Hsieh, Shuen-Lin Jeng	Accelerated Discrete Degradation Models for Leakage Current of Ultra-Thin Gate Oxides.	IEEE Trans. Reliab.	2007	DBLP DOI BibTeX RDF
21	Kanak Agarwal, Rahul M. Rao, Dennis Sylvester, Richard B. Brown	Parametric Yield Analysis and Optimization in Leakage Dominated Technologies.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
21	Vishal Khandelwal, Ankur Srivastava 0001	Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
21	Masaru Takesue	A Scheme for Protecting the Information Leakage Via Portable Devices.	SECURWARE	2007	DBLP DOI BibTeX RDF
21	Marko Hoyer, Domenik Helms, Wolfgang Nebel	Modelling the Impact of High Level Leakage Optimization Techniques on the Delay of RT-Components.	PATMOS	2007	DBLP DOI BibTeX RDF
21	Paulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas	Modeling Subthreshold Leakage Current in General Transistor Networks.	ISVLSI	2007	DBLP DOI BibTeX RDF
21	Hidema Tanaka	Information Leakage Via Electromagnetic Emanations and Evaluation of Tempest Countermeasures.	ICISS	2007	DBLP DOI BibTeX RDF	Electromagnetic emanation, EMC, Side-channel attack, Eavesdropping, Tempest
21	Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. Dick, Li Shang, Hai Zhou 0001, Xianlong Hong, Qiang Zhou 0001	3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
21	Jugash Chandarlapati, Mainak Chaudhuri	LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation.	ICCD	2007	DBLP DOI BibTeX RDF
21	Haiyong Wang, Guoliang Shou, Nanjian Wu	A LO-leakage auto-calibrated CMOS IEEE802.11b/g WLAN transceiver.	ISCAS	2007	DBLP DOI BibTeX RDF
21	Ashish Dobhal, Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava 0001	Variability Driven Joint Leakage-Delay Optimization Through Gate Sizing with Provabale Convergence.	VLSI Design	2007	DBLP DOI BibTeX RDF