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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 9462 occurrences of 2787 keywords
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Results
Found 15666 publication records. Showing 15666 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
54 | Xavier Vera, Björn Lisper, Jingling Xue |
Data Caches in Multitasking Hard Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 3-5 December 2003, Cancun, Mexico, pp. 154-165, 2003, IEEE Computer Society, 0-7695-2044-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
54 | Scott McFarling |
Program Optimization for Instruction Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-III Proceedings - Third International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, Massachusetts, USA, April 3-6, 1989., pp. 183-191, 1989, ACM Press, 0-89791-300-0. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
RISC |
54 | Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qureshi, Julien Sebot, Simon C. Steely Jr., Joel S. Emer |
Adaptive insertion policies for managing shared caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008, pp. 208-219, 2008, ACM, 978-1-60558-282-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
set dueling, shared cache, replacement, cache partitioning |
54 | Jun Wang 0001, Xiaoyu Yao, Christopher Mitchell, Peng Gu |
A New Hierarchical Data Cache Architecture for iSCSI Storage Server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 58(4), pp. 433-447, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
54 | Nobuaki Tojo, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki |
Exact and fast L1 cache simulation for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 817-822, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
54 | Xiaoyu Yao, Jun Wang 0001 |
Toward Effective NIC Caching: A Hierarchical Data Cache Architecture for iSCSI Storage Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 34th International Conference on Parallel Processing (ICPP 2005), 14-17 June 2005, Oslo, Norway, pp. 492-499, 2005, IEEE Computer Society, 0-7695-2380-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Evan Speight, Hazim Shafi, Lixin Zhang 0002, Ramakrishnan Rajamony |
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA, pp. 346-356, 2005, IEEE Computer Society, 978-0-7695-2270-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
54 | Xiaomei Ji, Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta 0001 |
Compiler-Directed Cache Assist Adaptivity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISHPC ![In: High Performance Computing, Third International Symposium, ISHPC 2000, Tokyo, Japan, October 16-18, 2000. Proceedings, pp. 88-104, 2000, Springer, 3-540-41128-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
54 | Jih-Kwon Peir, Yongjoon Lee, Windsor W. Hsu |
Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998., pp. 240-250, 1998, ACM Press, 1-58113-107-0. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
54 | Soontae Kim, Jongmin Lee 0002 |
Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 257-262, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
low power, data cache, write buffer |
54 | Guy E. Blelloch, Phillip B. Gibbons, Harsha Vardhan Simhadri |
Low depth cache-oblivious algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2010: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures, Thira, Santorini, Greece, June 13-15, 2010, pp. 189-199, 2010, ACM, 978-1-4503-0079-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
sparse-matrix vector multiply, schedulers, parallel algorithms, multiprocessors, sorting, graph algorithms, cache-oblivious algorithms |
54 | Chuanjun Zhang |
Reducing cache misses through programmable decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 4(4), pp. 5:1-5:31, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
low power, Cache, dynamic optimization |
54 | Yudong Tan, Vincent John Mooney III |
WCRT analysis for a uniprocessor with a unified prioritized cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05), Chicago, Illinois, USA, June 15-17, 2005, pp. 175-182, 2005, ACM, 1-59593-018-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
real-time system, timing analysis, cache design |
54 | Rui Min, Yiming Hu |
Improving Performance of Large Physically Indexed Caches by Decoupling Memory Addresses from Cache Addresses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(11), pp. 1191-1201, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Novel memory architectures, cache, memory systems, TLB, performance enhancement |
54 | Kian-Lee Tan, Jun Cai, Beng Chin Ooi |
An Evaluation of Cache Invalidation Strategies in Wireless Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 12(8), pp. 789-807, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
doze mode, bit-sequences, Mobile computing, energy consumption, access time, disconnection, cache invalidation |
54 | Roberto Giorgi, Paolo Bennati |
Filtering drowsy instruction cache to achieve better efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), Fortaleza, Ceara, Brazil, March 16-20, 2008, pp. 1554-1555, 2008, ACM, 978-1-59593-753-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
low-power, leakage, drowsy cache, filter cache |
54 | Yu Huang 0002, Beihong Jin, Jiannong Cao 0001, Guangzhong Sun, Yulin Feng |
A Selective Push Algorithm for Cooperative Cache Consistency Maintenance over MANETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2007, Taipei, Taiwan, December 17-20, 2007, Proceedings, pp. 650-660, 2007, Springer, 978-3-540-77091-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Cache Status Maintenance, Selective Push, Mobile Ad hoc Networks, Stateful, Cooperative Caching, Cache Consistency |
54 | Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin |
Analyzing data reuse for cache reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 4(4), pp. 851-876, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache polymorphism, compilers, energy consumption, Embedded software, data reuse, cache locality |
54 | Jaehyuk Huh 0001, Changkyu Kim, Hazim Shafi, Lixin Zhang 0002, Doug Burger, Stephen W. Keckler |
A NUCA substrate for flexible CMP cache sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005, Cambridge, Massachusetts, USA, June 20-22, 2005, pp. 31-40, 2005, ACM, 1-59593-167-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache sharing, non-uniform cache architecture, chip-multiprocessor |
54 | Josef Weidendorfer, Carsten Trinitis |
Collecting and Exploiting Cache-Reuse Metrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (2) ![In: Computational Science - ICCS 2005, 5th International Conference, Atlanta, GA, USA, May 22-25, 2005, Proceedings, Part II, pp. 191-198, 2005, Springer, 3-540-26043-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Cache Reuse Metrics, Profiling, Cache Simulation |
54 | Zhijun Wang 0001, Sajal K. Das 0001, Hao Che, Mohan Kumar |
A Scalable Asynchronous Cache Consistency Scheme (SACCS) for Mobile Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 15(11), pp. 983-995, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
stale cache hit, Mobile environments, cache consistency, disconnection, bandwidth utilization |
54 | Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang 0002 |
Compiler-directed cache polymorphism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES-SCOPES ![In: Proceedings of the 2002 Joint Conference on Languages, Compilers, and Tools for Embedded Systems & Software and Compilers for Embedded Systems (LCTES'02-SCOPES'02), Berlin, Germany, 19-21 June 2002, pp. 165-174, 2002, ACM, 1-58113-527-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
cache polymorphism, compilers, energy consumption, embedded software, data reuse, cache locality |
54 | Moinuddin K. Qureshi, M. Aater Suleman, Yale N. Patt |
Line Distillation: Increasing Cache Capacity by Filtering Unused Words in Cache Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 10-14 February 2007, Phoenix, Arizona, USA, pp. 250-259, 2007, IEEE Computer Society, 1-4244-0804-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
54 | Yen-Jen Chang, Chia-Lin Yang, Feipei Lai |
Value-Conscious Cache: Simple Technique for Reducing Cache Access Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 16-21, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
54 | Gi-Ho Park, Kil-Whan Lee, Jae-Hyuk Lee, Tack-Don Han, Shin-Dug Kim |
A Power Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Languages, Compilers, and Tools for Embedded Systems, ACM SIGPLAN Workshop LCTES 2000, Vancouver, BC, Canada, June 18, 2000, Proceedings, pp. 162-177, 2000, Springer, 3-540-41781-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
54 | Chi-Hung Chi, Henry G. Dietz |
Unified Management of Registers and Cache Using Liveness and Cache Bypass. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'89 Conference on Programming Language Design and Implementation (PLDI), Portland, Oregon, USA, June 21-23, 1989, pp. 344-355, 1989, ACM, 0-89791-306-X. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
54 | Rong Xu, Zhiyuan Li 0001 |
A sample-based cache mapping scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05), Chicago, Illinois, USA, June 15-17, 2005, pp. 166-174, 2005, ACM, 1-59593-018-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache bypass, cache mapping, mini cache, trace sampling, profiling, handheld devices |
54 | Shigeki Shibayama, Kazumasa Hamaguchi, Toshiyuki Fukui, Yoshiaki Sudo, Tomohiko Shimoyama, Shuichi Nakamura |
An Optical Bus Computer Cluster with a deferred cache coherence protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 175-182, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Optical Bus Computer Cluster, deferred cache coherence protocol, optical star-coupler, one-hop simultaneous broadcasting, wavelength multiplexing, deferred cache coherence, coherence maintenance, protocols, wavelength-division multiplexing, optical interconnections, cache storage |
54 | Soong Hyun Shin, Cheol Hong Kim, Chu Shik Jhon |
An Effective Instruction Cache Prefetch Policy by Exploiting Cache History Information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing - EUC 2005, International Conference EUC 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings, pp. 57-66, 2005, Springer, 3-540-30807-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Computer architecture, embedded processor, instruction cache, cache prefetching |
50 | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic |
HitME: low power Hit MEmory buffer for embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 335-340, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
50 | Ben H. H. Juurlink |
Unified Dual Data Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 33-40, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Jen-Chu Liu, Wen-Tsuen Chen |
An Efficient Wireless Internet Access Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN ![In: Information Networking, Networking Technologies for Enhanced Internet Services International Conference, ICOIN 2003, Cheju Island, Korea, February 12-14, 2003, Revised Selected Papers, pp. 585-594, 2003, Springer, 3-540-40827-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Brannon Batson, T. N. Vijaykumar |
Reactive-Associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 8-12 September 2001, Barcelona, Spain, pp. 49-60, 2001, IEEE Computer Society, 0-7695-1363-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
50 | Guanghui Liu |
ECC-Cache: A Novel Low Power Scheme to Protect Large-Capacity L2 Caches from Transiant Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IAS ![In: Proceedings of the Fifth International Conference on Information Assurance and Security, IAS 2009, Xi'An, China, 18-20 August 2009, pp. 193-199, 2009, IEEE Computer Society, 978-0-7695-3744-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
50 | Chun-Chieh Lin, Chuen-Liang Chen |
Object Placement for Fully Associative Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC (2) ![In: 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), Shanghai, China, December 17-20, 2008, Volume II: Workshops, pp. 480-485, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
50 | Cheol Hong Kim, Sung-Hoon Shim, Jong Wook Kwak, Sung Woo Chung, Chu Shik Jhon |
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005, Proceedings, pp. 103-111, 2005, Springer, 3-540-26969-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihin |
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 12-16 February 2005, San Francisco, CA, USA, pp. 340-351, 2005, IEEE Computer Society, 0-7695-2275-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | José R. Brunheroto, Valentina Salapura, Fernando F. Redígolo, Dirk Hoenicke, Alan Gara |
Data cache prefetching design space exploration for BlueGene/L supercomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 24-27 October 2005, Rio de Janeiro, Brazil, pp. 201-208, 2005, IEEE Computer Society, 0-7695-2446-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | Seongbeom Kim, Dhruba Chandra, Yan Solihin |
Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September - 3 October 2004, Antibes Juan-les-Pins, France, pp. 111-122, 2004, IEEE Computer Society, 0-7695-2229-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
50 | Ying Zheng, Brian T. Davis, Matthew Jordan |
Performance evaluation of exclusive cache hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2004 IEEE International Symposium on Performance Analysis of Systems and Software, March 10-12, 2004, Austin, Texas, USA, Proceedings, pp. 89-96, 2004, IEEE Computer Society, 0-7803-8385-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
50 | Alaa R. Alameldeen, David A. Wood 0001 |
Adaptive Cache Compression for High-Performance Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pp. 212-223, 2004, IEEE Computer Society, 0-7695-2143-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
50 | Changkyu Kim, Doug Burger, Stephen W. Keckler |
An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), San Jose, California, USA, October 5-9, 2002., pp. 211-222, 2002, ACM Press, 1-58113-574-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Bryan Black, Bohuslav Rychlik, John Paul Shen |
The Block-Based Trace Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 196-207, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
50 | Amir H. Hashemi, David R. Kaeli, Brad Calder |
Efficient Procedure Mapping Using Cache Line Coloring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN '97 Conference on Programming Language Design and Implementation (PLDI), Las Vegas, Nevada, USA, June 15-18, 1997, pp. 171-182, 1997, ACM, 0-89791-907-6. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
50 | Sung-Eui Yoon, Peter Lindstrom 0001 |
Mesh Layouts for Block-Based Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 12(5), pp. 1213-1220, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Mesh and graph layouts, cache-aware and cache-oblivious layouts, metrics for cache coherence, data locality |
50 | W. Lynn Gallagher, Chuan-lin Wu |
Evaluation of a memory hierarchy for the MTS multithreaded processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 346-351, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
memory hierarchy evaluation, MTS multithreaded processor, hardware resource utilization, instruction throughput, multithreaded superscalar processor, multiple instruction streams, multiple functional unit architecture, parameter-driven simulator, SES/workbench, numerical benchmarks, memory system configurations, main memory latency, cache hit rates, realistic multilevel cache hierarchy, parallel processing, VLIW, superscalar processor, instruction cache |
50 | Igor Tatarinov, Alex Rousskov, Valery Soloviev |
Static caching in Web servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1997), September 22-25, 1997 Las Vegas, NV, USA, pp. 410-417, 1997, IEEE Computer Society, 0-8186-8186-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
implementation complexity an, static caching, cache policies, LRU-threshold, LFU, LRU-SIZE, LRU-MIN, LRU-k-threshold, Pitkow/Recker policy, Web document access patterns, request log file, small cache sizes, primary Web servers, CPU overhead, performance analysis, cache performance, log files, online front-ends |
50 | André Seznec, François Bodin |
Skewed-associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE ![In: PARLE '93, Parallel Architectures and Languages Europe, 5th International PARLE Conference, Munich, Germany, June 14-17, 1993, Proceedings, pp. 304-316, 1993, Springer, 3-540-56891-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
skewed-associative cache, cache, microprocessors, set-associative cache |
50 | Alexander Heinecke, Carsten Trinitis, Josef Weidendorfer |
Porting existing cache-oblivious linear algebra HPC modules to larrabee architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 91-92, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
accelerator space-filling curve, openmp, matrix multiplication, cache-oblivious, lu decomposition, manycore |
50 | Anca Mariana Molnos, Sorin Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven |
Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 57(2), pp. 155-172, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Predictability, Multiprocessor, Compositionality, Cache management |
50 | Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem |
Dynamic cache clustering for chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 56-67, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
non-uniform cache architecture (nuca), chip multiprocessor (cmp) |
50 | Kapil Anand, Rajeev Barua |
Instruction cache locking inside a binary rewriter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009, pp. 185-194, 2009, ACM. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cache locking, embedded systems, caches, binary rewriting |
50 | Yutao Zhong 0001, Steven G. Dropsho, Xipeng Shen, Ahren Studer, Chen Ding 0001 |
Miss Rate Prediction Across Program Inputs and Cache Configurations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(3), pp. 328-343, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
optimization, compilers, Cache memories, modeling techniques, performance analysis and design aids |
50 | Lakshmish Ramaswamy, Ling Liu 0001, Arun Iyengar |
Scalable Delivery of Dynamic Content Using a Cooperative Edge Cache Grid. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 19(5), pp. 614-630, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
edge computing, cache clouds, cooperative caching, Dynamic content caching |
50 | Norbert Esser, Renga Sundararajan, Joachim Trescher |
Improving TriMedia Cache Performance by Profile Guided Code Reordering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings, pp. 96-106, 2007, Springer, 978-3-540-73622-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache, profiling, code layout |
50 | Heiko Falk, Sascha Plazar, Henrik Theiling |
Compile-time decided instruction cache locking using worst-case execution paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 143-148, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
WC-path, cache locking, optimization, WCET |
50 | Jichuan Chang, Gurindar S. Sohi |
Cooperative cache partitioning for chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 21th Annual International Conference on Supercomputing, ICS 2007, Seattle, Washington, USA, June 17-21, 2007, pp. 242-252, 2007, ACM, 978-1-59593-768-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cooperative cache partitioning, multiple time-sharing partitions, QoS, fairness, CMP |
50 | Tony Givargis |
Zero cost indexing for improved processor cache performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(1), pp. 3-25, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
index hashing, Cache optimization, design exploration |
50 | Jumnit Hong, Eriko Nurvitadhi, Shih-Lien Lu |
Design, implementation, and verification of active cache emulator (ACE). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 63-72, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA-based emulator, real-time emulation, cache modeling |
50 | Fei Guo, Yan Solihin |
An analytical model for cache replacement policy performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS/Performance ![In: Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS/Performance 2006, Saint Malo, France, June 26-30, 2006, pp. 228-239, 2006, ACM, 1-59593-319-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
analytical model, cache performance, replacement policy |
50 | Le Cai, Yung-Hsiang Lu |
Power reduction of multiple disks using dynamic cache resizing and speed control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 186-190, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
disk rotation speed, power management, disk cache |
50 | Tohru Ishihara, Farzan Fallah |
A non-uniform cache architecture for low power system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 363-368, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
embedded systems, compiler, microprocessor, cache memory |
50 | Ming Zhang 0026, Qing Yang 0001 |
BUCS - A Bottom-Up Cache Structure for Networked Storage Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 33rd International Conference on Parallel Processing (ICPP 2004), 15-18 August 2004, Montreal, Quebec, Canada, pp. 310-317, 2004, IEEE Computer Society, 0-7695-2197-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
cache structure, intelligent controller, networked storage, bus contention |
50 | Jung-Hoon Lee, Seh-Woong Jeong, Shin-Dug Kim, Charles C. Weems |
An Intelligent Cache System with Hardware Prefetching for High Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(5), pp. 607-616, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
dual data cache, prefetching, Memory hierarchy, temporal locality, spatial locality |
50 | Jeffrey B. Rothman, Alan Jay Smith |
Sector Cache Design and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 2000, Proceedings of the 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 29 August - 1 September 2000, San Francisco, California, USA, pp. 124-133, 2000, IEEE Computer Society, 0-7695-0728-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
sector cache, simulation, architecture, workloads, multiprogramming |
50 | David K. Tam, Reza Azimi, Livio Soares, Michael Stumm |
RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009, pp. 121-132, 2009, ACM, 978-1-60558-406-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
miss rate curve, performance monitoring unit, shared cache management, chip multiprocessor, dynamic optimization, multicore processor, shared cache, cache management, cache partitioning, hardware performance counters, online optimization |
50 | Yefim Shuf, Ian M. Steiner |
Characterizing a Complex J2EE Workload: A Comprehensive Analysis and Opportunities for Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 44-53, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
J2EE workload, Java benchmarks, SPECjvm98, SPECjbb2000, Java 2 Enterprise Edition, SPECjAppServer2004, systems research, software research, cache-to-cache modified data transfers, intelligent thread co-scheduling, Java heap, bursty data cache, Java virtual method calls, optimizations, performance analysis, garbage collection, instruction cache, data prefetching, commercial workload |
50 | Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran |
SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 356-361, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
miss rate, simulation, round robin, cache simulation, L1 cache |
50 | Chenjie Yu, Xiangrong Zhou, Peter Petrov |
Low-power inter-core communication through cache partitioning in embedded multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
low-power cache architectures, low-power cache coherence, MPSoC, on-chip communication |
50 | Jinglei Wang, Dongsheng Wang 0002, Yibo Xue, Haixia Wang 0001 |
An Efficient Lightweight Shared Cache Design for Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 8th International Symposium, APPT 2009, Rapperswil, Switzerland, August 24-25, 2009, Proceedings, pp. 28-40, 2009, Springer, 978-3-642-03643-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Directory-based Cache Coherence Protocol, Lightweight Shared Cache, Chip Multiprocessors (CMP) |
50 | Bingsheng He, Qiong Luo 0001 |
Cache-oblivious databases: Limitations and opportunities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 33(2), pp. 8:1-8:42, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
cache-conscious, chip multiprocessors, data caches, simultaneous multithreading, Cache-oblivious |
50 | Stavros Harizopoulos, Anastassia Ailamaki |
Improving instruction cache performance in OLTP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 31(3), pp. 887-920, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Instruction cache, cache misses |
50 | Alberto Ros 0001, Manuel E. Acacio, José M. García 0001 |
An efficient cache design for scalable glueless shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006, pp. 321-330, 2006, ACM, 1-59593-302-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
L2, directory structure, glueless shared-memory multiprocessors, cache, cache coherence, memory wall |
50 | Gerth Stølting Brodal, Rolf Fagerberg |
On the limits of cache-obliviousness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STOC ![In: Proceedings of the 35th Annual ACM Symposium on Theory of Computing, June 9-11, 2003, San Diego, CA, USA, pp. 307-315, 2003, ACM, 1-58113-674-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Cache-oblivious model, tall cache assumption, lower bound, sorting, permuting |
50 | Daranee Hormdee, Jim D. Garside, Stephen B. Furber |
An Asynchronous Victim Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 4-11, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
copy-back cache architecture, asynchronous design, victim cache |
50 | Erez Petrank, Dror Rawitz |
The hardness of cache conscious data placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
POPL ![In: Conference Record of POPL 2002: The 29th SIGPLAN-SIGACT Symposium on Principles of Programming Languages, Portland, OR, USA, January 16-18, 2002, pp. 101-112, 2002, ACM, 1-58113-450-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Cache conscious data placement, cache conscious code rearrangement, computational complexity, memory management, hardness of approximation |
50 | Tsang-Ling Sheu, Chieh-Hsing Yang |
A Novel Hierarchical Cache Architecture for WWW Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN ![In: The 15th International Conference on Information Networking, ICOIN 2001, Beppu City, Oita, Japan, January 31 - February 2, 2001, pp. 863-868, 2001, IEEE Computer Society, 0-7695-0951-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Cache Digest, WWW, Proxy Servers, ICP, Hierarchical Cache |
50 | Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt, Alexandru Nicolau |
Augmenting Loop Tiling with Data Alignment for Improved Cache Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 142-149, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
data cache, Loop tiling, data alignment, cache conflict |
50 | Zhiwen Xu, Xiaoxin Guo, Xiangjiu Che, Zhengxuan Wang, Yunjie Pang |
The Batch Patching Method Using Dynamic Cache of Proxy Cache for Streaming Media. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GCC ![In: Grid and Cooperative Computing - GCC 2005, 4th International Conference, Beijing, China, November 30 - December 3, 2005, Proceedings, pp. 1143-1154, 2005, Springer, 3-540-30510-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | Manuel E. Acacio, José González 0002, José M. García 0001, José Duato |
Owner prediction for accelerating cache-to-cache transfer misses in a cc-NUMA architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, USA, November 16-22, 2002, CD-ROM, pp. 1:1-1:12, 2002, IEEE Computer Society, 0-7695-1524-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi |
Cache decay: exploiting generational behavior to reduce cache leakage power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 28th Annual International Symposium on Computer Architecture, ISCA 2001, Göteborg, Sweden, June 30-July 4, 2001, pp. 240-251, 2001, ACM, 0-7695-1162-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
50 | Richard E. Ladner, Ray Fortna, Bao-Hoang Nguyen |
A Comparison of Cache Aware and Cache Oblivious Static Search Trees Using Program Instrumentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Experimental Algorithmics ![In: Experimental Algorithmics, From Algorithm Design to Robust and Efficient Software [Dagstuhl seminar, September 2000], pp. 78-92, 2000, Springer, 3-540-00346-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
50 | Hui Li, Kenneth C. Sevcik |
Exploiting cache affinity in software cache coherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994, pp. 264-273, 1994, ACM, 0-89791-665-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
50 | Rezaul Alam Chowdhury, Vijaya Ramachandran |
Cache-efficient dynamic programming algorithms for multicores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2008: Proceedings of the 20th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 14-16, 2008, pp. 207-216, 2008, ACM, 978-1-59593-973-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
parallelism, multicore, shared cache, distributed cache, cache-efficiency |
50 | Jaume Abella 0001, Antonio González 0001, Xavier Vera, Michael F. P. O'Boyle |
IATAC: a smart predictor to turn-off L2 cache lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 2(1), pp. 55-77, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
turning off cache lines, low power, Cache memories, L2 cache |
50 | Jamison D. Collins, Dean M. Tullsen |
Runtime identification of cache conflict misses: The adaptive miss buffer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 19(4), pp. 413-439, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
adaptive miss buffer, cache exclusion, prefetching, victim cache, Cache architecture, conflict misses |
50 | Qing Yang 0001, George Thangadurai, Laxmi N. Bhuyan |
Design of an Adaptive Cache Coherence Protocol for Large Scale Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(3), pp. 281-293, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
adaptive cache coherence protocol, cache-based multiprocessor, cache coherence scheme, memoryarchitecture, protocols, multiprocessor interconnection networks, multistage interconnection network, buffer storage, hierarchical network |
50 | Cheol Hong Kim, Jong Wook Kwak, Seong Tae Jhang, Chu Shik Jhon |
Adaptive Block Management for Victim Cache by Exploiting L1 Cache History Information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference EUC 2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings, pp. 1-11, 2004, Springer, 3-540-22906-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Block Management, Low Power, Computer Architecture, Victim Cache |
50 | Kamen Yotov, Thomas Roeder, Keshav Pingali, John A. Gunnels, Fred G. Gustavson |
An experimental comparison of cache-oblivious and cache-conscious programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2007: Proceedings of the 19th Annual ACM Symposium on Parallelism in Algorithms and Architectures, San Diego, California, USA, June 9-11, 2007, pp. 93-104, 2007, ACM, 978-1-59593-667-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache-conscious algorithms, memory hierarchy, memory bandwidth, memory latency, numerical software, cache-oblivious algorithms |
46 | Kun-Lung Wu, Philip S. Yu |
Local Replication for Proxy Web Caches with Hash Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIKM ![In: Proceedings of the 1999 ACM CIKM International Conference on Information and Knowledge Management, Kansas City, Missouri, USA, November 2-6, 1999, pp. 69-76, 1999, ACM, 1-58113-146-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
46 | Maged M. Michael, Ashwini K. Nanda |
Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, Orlando, FL, USA, January 9-12, 1999, pp. 142-151, 1999, IEEE Computer Society, 0-7695-0004-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
46 | Sanjeev Kumar, Christopher B. Wilkerson |
Exploiting Spatial Locality in Data Caches Using Spatial Footprints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 25th Annual International Symposium on Computer Architecture, ISCA 1998, Barcelona, Spain, June 27 - July 1, 1998, pp. 357-368, 1998, IEEE Computer Society, 0-8186-8491-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
46 | Mainak Chaudhuri |
Pseudo-LIFO: the foundation of a new family of replacement policies for last-level caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 401-412, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
chip-multiprocessor, replacement policy, last-level cache |
46 | Nasir Mohyuddin, Rashed Zafar Bhatti, Michel Dubois 0001 |
Controlling leakage power with the replacement policy in slumberous caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 161-170, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
tranquility level, leakage power, replacement policy, drowsy cache |
46 | Johnson Kin, Munish Gupta, William H. Mangione-Smith |
Filtering Memory References to Increase Energy Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(1), pp. 1-15, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
energy-delay, low power, embedded processor, media processor, Filter cache |
46 | Shimin Chen, Anastassia Ailamaki, Phillip B. Gibbons, Todd C. Mowry |
Improving hash join performance through prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 32(3), pp. 17, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
CPU cache performance, CPU cache prefetching, group prefetching, software-pipelined prefetching, Hash join |
46 | Naveen Muralimanohar, Rajeev Balasubramonian |
Interconnect design considerations for large NUCA caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 369-380, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
non-uniform cache architecture, network-on-chip, interconnect, memory hierarchies, cache models |
46 | Stefanos Kaxiras, Polychronis Xekalakis, Georgios Keramidas |
A simple mechanism to adapt leakage-control policies to temperature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 54-59, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hybrid leakage mechanism, thermal adaptation, drowsy cache, cache decay |
46 | Paul Berube, Ashley Zinyk, José Nelson Amaral, Mike H. MacGregor |
The Bank Nth Chance Replacement Policy for FPGA-Based CAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 648-660, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multizone cache, field programmable gate array, cache memories, memory systems, content addressable memories, replacement policy, digital design, Internet routing |
46 | S. Subha |
A two-type data cache model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EIT ![In: 2009 IEEE International Conference on Electro/Information Technology, EIT 2009, Windsor, Ontario, Canada, June 7-9, 2009, pp. 476-481, 2009, IEEE, 978-1-4244-3355-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
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