Search results for "low-voltage"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
29	Ding-Ming Kwai, Ching-Hua Hsiao, Chung-Ping Kuo, Chi-Hsien Chuang, Min-Chung Hsu, Yi-Chun Chen, Yu-Ling Sung, Hsien-Yu Pan, Chia-Hsin Lee, Meng-Fan Chang, Yung-Fa Chou	SRAM Cell Current in Low Leakage Design.	MTDT	2006	DBLP DOI BibTeX RDF
29	Fady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Gilles Sicard	A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applications.	ISLPED	2009	DBLP DOI BibTeX RDF	bose choudhury hocquenghem, design, low power, methodology, logic, energy, cmos, library, circuit, subthreshold, ultra low voltage
29	Martin Margala, Srdjan Dragic, Ahmed El-Abasiry, Samuel Ekpe, Viera Stopjaková	I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test.	IOLTW	2000	DBLP DOI BibTeX RDF	VLSI, Testing, Sensors, Iddq, Ultra-Low-Voltage, Current
29	Christian Falconi, Marco Fratini, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti	Low voltage, low power, compact, high accuracy, high precision PTAT temperature sensor for deep sub-micron CMOS systems.	ISCAS	2008	DBLP DOI BibTeX RDF
29	Leila Koushaeian, Stan Skafidas	A 65nm CMOS low-power, low-voltage bandgapreference with using self-biased composite cascode opamp.	ISLPED	2010	DBLP DOI BibTeX RDF	bandgap voltage reference, self-biased, self-cascode, temperature coefficient, voltage reference
29	Kaushik Bhattacharyya, Pradip Mandal	A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter.	VLSI Design	2008	DBLP DOI BibTeX RDF
29	Yueming Jiang, Edward K. F. Lee	A low voltage low 1/f noise CMOS bandgap reference.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
29	Quoc-Hoang Duong, Trung-Kien Nguyen, Sang-Gug Lee 0001	Low-voltage low-power high dB-linear CMOS exponential function generator using highly-linear V-I converter.	ISLPED	2003	DBLP DOI BibTeX RDF	VGA, dB-linear, exponential V-I converter
29	Juan Antonio Gómez Galán, Ramón González Carvajal, Fernando Muñoz 0001, Antonio Jesús Torralba Silgado, Jaime Ramírez-Angulo	A low-power low-voltage OTA-C sinusoidal oscillator with more than two decades of linear tuning range.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
28	Yngvar Berg, Omid Mirmotahari	Low voltage precharge CMOS logic.	DDECS	2009	DBLP DOI BibTeX RDF
28	Ta-Tao Hsu, Chien-Nan Kuo	Low voltage 2-mW 6~10.6-GHz ultra-wideband CMOS mixer with active balun.	ISCAS	2006	DBLP DOI BibTeX RDF
28	James B. Kuo	Evolution of Bootstrap Techniques in Low-Voltage CMOS Digital VLSI Circuits for SoC Applications, invited.	IWSOC	2005	DBLP DOI BibTeX RDF
28	Pradeep Varma, Ashutosh Chakraborty	Low-Voltage, Double-Edge-Triggered Flip Flop.	PATMOS	2003	DBLP DOI BibTeX RDF
28	Mehdi H. Kazemeini, M. Jamal Deen, Susan Nuseh	Phase noise in a back-gate biased low-voltage VCO.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
28	Hassan O. Elwan, Weinan Gao, Roberto Sadkowski, Mohammed Ismail 0001	A low voltage CMOS class AB operational transconductance amplifier.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
28	Tsung-Yu Yang, Hsin-Lung Tu, Hwann-Kaeo Chiou	Low-voltage high-linear and isolation transformer based mixer for direct conversion receiver.	ISCAS	2006	DBLP DOI BibTeX RDF
28	Koichi Nose, Soo-Ik Chae, Takayasu Sakurai	Voltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage (poster session).	ISLPED	2000	DBLP DOI BibTeX RDF	gate capacitance, low supply voltage, low-power design
28	T. Hasan, Torsten Lehmann, Chee Yee Kwok	A 5V charge pump in a standard 1.8-V 0.18-µm CMOS process.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
28	Liviu Chiaburu, Svante Signell	A method to reduce power consumption in pipelined A/D converters.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
28	David Wolpert 0001, Bo Fu, Paul Ampadu	Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design.	NOCS	2010	DBLP DOI BibTeX RDF	delay borrowing, energy-efficient, interconnect, Temperature, low voltage
28	Yngvar Berg	Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters.	ISMVL	2010	DBLP DOI BibTeX RDF	CMOS, low-voltage, converters
28	Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos	A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	flash adc, nano-cmos, ti comparator, process variation, analog-to-digital converter, low voltage, high speed
28	Hwang-Cherng Chow, Pu-Nan Weng	A Low Voltage Rail-to-Rail OPAMP Design for Biomedical Signal Filtering Applications.	DELTA	2008	DBLP DOI BibTeX RDF	rail-to-rail, current driven bulk, filter, low voltage, biomedical signal
28	Jaydeep P. Kulkarni, Keejong Kim, Sang Phill Park, Kaushik Roy 0001	Process variation tolerant SRAM array for ultra low voltage applications.	DAC	2008	DBLP DOI BibTeX RDF	Schmitt trigger SRAM, low voltage/sub-threshold SRAM, process tolerance
28	Pablo Aguirre, Fernando Silveira	Bias circuit design for low-voltage cascode transistors.	SBCCI	2006	DBLP DOI BibTeX RDF	CMOS, low voltage, analog design
28	Haihua Yan, Gefu Xu, Adit D. Singh	Low Voltage Test in Place of Fast Clock in DDSI Delay Test.	ISQED	2005	DBLP DOI BibTeX RDF	delay test, defect, ATE, low voltage test
28	Jing-Hong Conan Zhan, Jon S. Duster, Kevin T. Kornegay	A comparative study of MOS VCOs for low voltage high performance operation.	ISLPED	2004	DBLP DOI BibTeX RDF	FOM, low power, low voltage, VCO, phase noise, RF design
28	Piet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker 0001	The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults.	VTS	2004	DBLP DOI BibTeX RDF	Very-Low-Voltage testing, Resistive short defects
27	Martin Saint-Laurent, Animesh Datta	A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology.	ISLPED	2010	DBLP DOI BibTeX RDF	clock gater, clock gating cell, local clock buffer, set-reset latch
27	Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo	Design of low-voltage low-power SC filters for high-frequency applications.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
27	Christian Falconi, Arnaldo D'Amico, Marco Faccio	Design of accurate analog circuits for low voltage low power CMOS systems.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
27	S. V. Gopalaiah, A. P. Shivaprasad, Sukanta K. Panigrahi	Design of Low Voltage Low Power CMOS OP-AMPS with Rail-to-Rail Input/Output Swing.	VLSI Design	2004	DBLP DOI BibTeX RDF
27	Derek Ho, Shahriar Mirabbasi	Low-Voltage Low-Power Low-Noise Amplifier for Wireless Sensor Networks.	CCECE	2006	DBLP DOI BibTeX RDF
27	Mohammad Maymandi-Nejad, Manoj Sachdev	DTMOS Technique for Low-Voltage Analog Circuits.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
27	Chutham Sawigun, Jirayuth Mahattanakul	A low-voltage CMOS linear transconductor suitable for analog multiplier application.	ISCAS	2006	DBLP DOI BibTeX RDF
27	Bruno Vaz, Nuno F. Paulino, João Goes, R. Costa, Romero Tavares, Adolfo Steiger-Garção	Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
27	Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, Philippe Renaud, C. Hibert, Philippe Flückiger, G. A. Racine	Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture.	ISQED	2002	DBLP DOI BibTeX RDF
27	Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy 0001, Vivek De	Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits.	DAC	1998	DBLP DOI BibTeX RDF	low power, synthesis, placement, flip-flops, voltage scaling, codec, MPEG4, level converters, design automatian
26	Liangguo Shen, Zushu Yan, Xing Zhang 0002, Yuanfu Zhao, Yuan Wang 0001	Design of High-Performance Voltage Regulators Based on Frequency-Dependent Feedback Factor.	ISCAS	2007	DBLP DOI BibTeX RDF
26	C. S. Lin, J. C. Chang, B. D. Liu	Design for low-power, low-cost, and high-reliability precomputation-based content-addressable memory.	APCCAS (2)	2002	DBLP DOI BibTeX RDF
26	K. Joseph Hass, Jack Venbrux, Prakash Bhatia	Logic Design Considerations for 0.5-Volt CMOS.	ARVLSI	2001	DBLP DOI BibTeX RDF
26	Jun Zhang, Yunling Luo, Qiaobo Wang, Jingjing Li, Zhuqian Gong, Hong-Zhou Tan, Yunliang Long	A low-voltage, low-power subthreshold CMOS voltage reference without resistors and high threshold voltage devices.	APCCAS	2012	DBLP DOI BibTeX RDF
26	Baker Mohammad, Martin Saint-Laurent, Paul Bassett, Jacob A. Abraham	Cache Design for Low Power and High Yield.	ISQED	2008	DBLP DOI BibTeX RDF	reduce voltage swing, sram yield, SRAM 6T cell, cache design, parametric failure
26	Anna Richelli, Luca Mensi, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Pier Luigi Rolandi	A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories.	ISCAS	2007	DBLP DOI BibTeX RDF
26	Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi	Quantum Voltage Comparator for 0.07 mum CMOS Flash A/D Converters.	ISVLSI	2003	DBLP DOI BibTeX RDF
26	Fernando Muñoz 0001, Antonio J. López-Martín, Ramón González Carvajal, Jaime Ramírez-Angulo, Antonio Jesús Torralba Silgado, Meghraj Kachare, Bernardo Palomo Vázquez	Extremely low supply voltage circuits based on quasi-floating gate supply voltage boosting.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
26	Tsung-Sum Lee, Tai-Hua Chen	Two low-voltage fully differential MOSFET-C voltage-controlled oscillators for frequency tuning.	APCCAS (1)	2002	DBLP DOI BibTeX RDF
26	Carl James Debono, Franco Maloberti, Joseph Micallef	On the design of low-voltage, low-power CMOS analog multipliers for RF applications.	IEEE Trans. Very Large Scale Integr. Syst.	2002	DBLP DOI BibTeX RDF
26	Radu M. Secareanu, Bill Peterson, D. Hartman	A low-voltage low-noise digital buffer system.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
25	Tsung-Sum Lee, Chi-Chang Lu, Shen-Hau Yu, Jian-Ting Zhan	A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
25	Sanjay Kumar Wadhwa	A Low Voltage CMOS Proportional-to-Absolute Temperature Current Reference.	VLSI Design	2009	DBLP DOI BibTeX RDF
25	Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro	Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter.	ISCAS	2007	DBLP DOI BibTeX RDF
25	Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro	Low-voltage CMOS syllabic-companding log domain filter.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino	Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Lu Liu, Zhihua Wang 0001	A new high gain low voltage 1.45 GHz CMOS mixer.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
25	Jiquing Cui, Yong Lian, Ming Fu Li	A low voltage dual gate integrated CMOS mixer for 2.4GHz band applications.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
25	Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi	Noise tolerant low voltage XOR-XNOR for fast arithmetic.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	XOR-XNOR circuits, multipliers, noise tolerant, deep submicron, nanometer technology
25	Kiyoo Itoh 0001	Low-voltage memories for power-aware systems.	ISLPED	2002	DBLP DOI BibTeX RDF	DRAM and SRAM cells, gain cells, gate-source/substrate-source back-biasing, memory-rich architectures, multi-Vr, non-volatile RAMs, on-chip voltage converters, peripheral circuits, subthreshold current, testing
25	Kalle Kivekäs, Aarno Pärssinen, Jarkko Jussila, Jussi Ryynänen, Kari Halonen	Design of low-voltage active mixer for direct conversion receivers.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
25	Shinichiro Mutoh, Satoshi Shigematsu, Yoshinori Gotoh, Shinsuke Konaka	Design Method of MTCMOS Power Switch for Low-Voltage High-Speed LSIs.	ASP-DAC	1999	DBLP DOI BibTeX RDF
25	Amr M. Fahim, Mohamed I. Elmasry	A Low-Voltage High-Performance Differential Static Logic (LVDSL) family.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
25	Hiok-Tiaq Ng, David J. Allstot	CMOS current steering logic for low-voltage mixed-signal integrated circuits.	IEEE Trans. Very Large Scale Integr. Syst.	1997	DBLP DOI BibTeX RDF
25	Anna Maria Brosa, Joan Figueras	Characterization of Floating Gate Defects in Analog Cells.	J. Electron. Test.	1999	DBLP DOI BibTeX RDF	floating gate defect, low-power/low-voltage analog circuits, analog testing
25	Carlos Aristoteles De la Cruz-Blas, Antonio J. López-Martín	Compact power-efficient CMOS exponential voltage-to-voltage converter.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Wendan Xu, Donglai Xu, Ian French	An Improved Band-Gap Voltage Reference Circuit Design for Multimedia VLSI Systems Integration Applications.	HSNMC	2004	DBLP DOI BibTeX RDF
25	Yann-Hang Lee, C. Mani Krishna 0001	Voltage-Clock Scaling for Low Energy Consumption in Real-Time Embedded Systems.	RTCSA	1999	DBLP DOI BibTeX RDF
25	Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Amin Quasem Safarian, Reza Lotfi	A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "Slew Boost" technique.	ISLPED	2003	DBLP DOI BibTeX RDF	CMOS analog circuit, Slew Boost technique, class AB, low power, high speed, operational amplifier, pipelined analog to digital converter, ultra low voltage
24	Erhan Ozalevli, Paul E. Hasler	A tunable floating gate CMOS resistor for low-power and low-voltage applications.	ISCAS	2006	DBLP DOI BibTeX RDF
24	Fathi A. Farag, Carlos Galup-Montoro, Márcio C. Schneider	Inverter-based switched current circuit for very low-voltage and low-power applications.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
24	Renato Galembeck, Jader A. De Lima, Márcio C. Schneider	A Gm-C bump equalizer for low-voltage low-power applications.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
24	Yiu Wu, John Ling, Ward J. Helms	A Bandpass Sigma-Delta for Software Low-Power and Low-Voltage Radio by Using PATH Technique.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
24	Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan	Robust analytical gate delay modeling for low voltage circuits.	ASP-DAC	2006	DBLP DOI BibTeX RDF
24	Pui-In Mak, Seng-Pan U., Rui Paulo Martins	Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers.	ISCAS	2006	DBLP DOI BibTeX RDF
24	Farhad Alibeygi Parsan, Ahmad Ayatollahi, Adib Abrishamifar	Investigating the linearity of MOSFET-only switched-capacitor DeltaSigma modulators under low-voltage condition.	DDECS	2009	DBLP DOI BibTeX RDF
24	Belén Calvo, Santiago Celma, Maria Teresa Sanz, Juan Pablo Alegre	Low-Voltage Linearly Tunable CMOS Transconductor with Common-Mode Feedforward.	ISCAS	2007	DBLP DOI BibTeX RDF
24	Jose Luis Ruiz-Chavira, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal, Antonio Jesús Torralba Silgado	Low-Voltage CMOS Single Ended and Fully Differential Amplifier with Programmable Gain.	ISCAS	2007	DBLP DOI BibTeX RDF
24	S. Radiom, B. Sheikholeslami, Hamed Aminzadeh, Reza Lotfi	Folded-current-steering DAC: an approach to low-voltage high-speed high-resolution D/A converters.	ISCAS	2006	DBLP DOI BibTeX RDF
24	Shao-Hua Lee, Yun-Hsueh Chuang, Li-Ren Chi, Sheng-Lyang Jang, Jian-Feng Lee	A Low-Voltage 2.4GHz VCO with 3D Helical Inductors.	APCCAS	2006	DBLP DOI BibTeX RDF
24	Rahul Shukla, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal	A low voltage rail to rail V-I conversion scheme for applications in current mode A/D converters.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
24	S. V. Gopalaiah, A. P. Shivaprasad	Low Voltage CMOS op-amp with Rail-to-Rail Input/Output Swing.	DELTA	2004	DBLP DOI BibTeX RDF
24	Michele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi	A high compliance CMOS current source for low voltage applications.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
24	Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín	Constant-gm constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
24	Takeo Yasuda, Masaaki Yamamoto, Takafumi Nishi	A power-on reset pulse generator for low voltage applications.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
24	Jader A. De Lima, Adriano S. Cordeiro	An accurate low-voltage analog memory-cell with built-in multiplication.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
24	Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin	Floating-gate CMOS differential analog inverter for ultra low-voltage applications.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
24	Yusuhiro Sugimoto, Shigeo Imai	The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearity.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
23	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm	Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
23	Armin Tajalli, Seyed Mojtaba Atarodi	Design considerations for a 1.5-V, 10.7-MHz bandpass gm-C filter in a 0.6µm standard CMOS technology.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
23	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang	Low-swing clock domino logic incorporating dual supply and dual threshold voltages.	DAC	2002	DBLP DOI BibTeX RDF	low swing clock, low power, domino logic, dual supply voltage, dual threshold voltage
23	Tadayoshi Enomoto, Nobuaki Kobayashi	Single-Power-Supply Six-Transistor CMOS SRAM Enabling Low-Voltage Writing, Low-Voltage Reading, and Low Standby Power Consumption.	IEICE Trans. Electron.	2023	DBLP DOI BibTeX RDF
23	Caffey Jindal, Rishikesh Pandey	High Slew-Rate and Very-Low Output Resistance Class-AB Flipped Voltage Follower Cell for Low-Voltage Low-Power Analog Circuits.	Wirel. Pers. Commun.	2022	DBLP DOI BibTeX RDF
23	Jun Shu, Min Cai	A low supply-dependence fully-MOSFET voltage reference for low-voltage and low-power.	APCCAS	2008	DBLP DOI BibTeX RDF
23	Riichiro Takemura, Kiyoo Itoh 0001, Tomonori Sekiguchi	A 0.5-V FD-SOI twin-cell DRAM with offset-free dynamic-VT sense amplifiers.	ISLPED	2006	DBLP DOI BibTeX RDF	FD-SOI, dynamic-VT sense amplifier, low-voltage RAM, twin-cell DRAM
23	Sreenivas Mandava, Sreejit Chakravarty, Sandip Kundu	On Detecting Bridges Causing Timing Failures.	ICCD	1999	DBLP DOI BibTeX RDF	Resistive Bridges, Timing Failures, Transition Fault Model, Delay Test, At-Speed Testing, Low Voltage Testing
23	Hai Chen, Xiaobo Wu, Xiaolang Yan	A BiCMOS Low Voltage Low Distortion Class AB Amplifier.	APCCAS	2006	DBLP DOI BibTeX RDF
23	Pedro Amaral, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção	An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
23	Adnan Harb, Mohamad Sawan	New low-power low-voltage high-CMRR CMOS instrumentation amplifier.	ISCAS (6)	1999	DBLP DOI BibTeX RDF
23	Kurt Schweiger, Heimo Uhrmann, Horst Zimmermann	Low-voltage low-power double bulk mixer for direct conversion receiver in 65nm CMOS.	DDECS	2009	DBLP DOI BibTeX RDF
23	Lyes Bouzerara, Mohand-Tahar Belaroussi	Low-voltage, low-power and high gain CMOS operational transconductance amplifier.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
23	Mustafa Keskin, Un-Ku Moon, Gabor C. Temes	Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator.	ISCAS (1)	2001	DBLP DOI BibTeX RDF