Search results for "cache"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
46	Zhenghong Wang, Ruby B. Lee	A novel cache architecture with enhanced performance and security.	MICRO	2008	DBLP DOI BibTeX RDF
46	Arkaitz Ruiz-Alvarez, Kim M. Hazelwood	Evaluating the impact of dynamic binary translation systems on hardware cache performance.	IISWC	2008	DBLP DOI BibTeX RDF
46	Andreas Bühmann, Theo Härder	Making the Most of Cache Groups.	DASFAA	2007	DBLP DOI BibTeX RDF
46	Ju-Hyun Kim, Gyoung-Hwan Hyun, Hyuk-Jae Lee	Cache Organizations for H.264/AVC Motion Compensation.	RTCSA	2007	DBLP DOI BibTeX RDF
46	Keshavan Varadarajan, S. K. Nandy 0001, Vishal Sharda, Bharadwaj Amrutur, Ravi R. Iyer 0001, Srihari Makineni, Donald Newell	Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions.	MICRO	2006	DBLP DOI BibTeX RDF
46	Mehdi Modarressi, Shaahin Hessabi, Maziar Goudarzi	A Reconfigurable Cache Architecture for Object-Oriented Embedded Systems.	CCECE	2006	DBLP DOI BibTeX RDF
46	Chuanjun Zhang	Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches.	ISCA	2006	DBLP DOI BibTeX RDF
46	Bramha Allu, Wei Zhang 0002	Exploiting the replication cache to improve performance for multiple-issue microprocessors.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF
46	Wei Zhang 0002, Mahmut T. Kandemir, Mustafa Karaköy, Guangyu Chen	Reducing data cache leakage energy using a compiler-based approach.	ACM Trans. Embed. Comput. Syst.	2005	DBLP DOI BibTeX RDF	array-intensive applications, pointer-intensive applications, data caches, energy optimization, Compiler analysis
46	Michael Behar, Avi Mendelson, Avinoam Kolodny	Trace Cache Sampling Filter.	IEEE PACT	2005	DBLP DOI BibTeX RDF
46	Partha Kundu, Murali Annavaram, Trung A. Diep, John Paul Shen	A case for shared instruction cache on chip multiprocessors running OLTP.	SIGARCH Comput. Archit. News	2004	DBLP DOI BibTeX RDF
46	Sung Woo Chung, Hyong-Shik Kim, Chu Shik Jhon	Distance-aware L2 Cache Organizations for Scalable Multiprocessor Systems.	DSD	2003	DBLP DOI BibTeX RDF
46	Hongsong Chen, Zhenzhou Ji, Mingzeng Hu	Orthogonal Design Method for Optimal Cache Configuration.	APPT	2003	DBLP DOI BibTeX RDF
46	Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen	A compiler approach for reducing data cache energy.	ICS	2003	DBLP DOI BibTeX RDF	data caches, energy optimization, compiler analysis
46	Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya, Prasanna Venkatesh Kannan	Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design.	IWSOC	2003	DBLP DOI BibTeX RDF
46	Weiyu Tang, Rajesh K. Gupta 0001, Alexandru Nicolau	Power Savings in Embedded Processors through Decode Filer Cache.	DATE	2002	DBLP DOI BibTeX RDF
46	Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen	Pointer cache assisted prefetching.	MICRO	2002	DBLP DOI BibTeX RDF
46	Shimin Chen, Phillip B. Gibbons, Todd C. Mowry, Gary Valentin	Fractal prefetching B±Trees: optimizing both cache and disk performance.	SIGMOD Conference	2002	DBLP DOI BibTeX RDF
46	Tohru Ishihara, Kunihiro Asada	An Architectural Level Energy Reduction Technique For Deep-Submicron Cache Memories.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
46	Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos	Using dynamic cache management techniques to reduce energy in general purpose processors.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
46	Wen-Hann Wang, Jean-Loup Baer, Henry M. Levy	Organization and Performance of a Two-Level Virtual-Real Cache Hierarchy.	ISCA	1989	DBLP DOI BibTeX RDF
46	Steven A. Przybylski, Mark Horowitz, John L. Hennessy	Characteristics of Performance-Optimal Multi-Level Cache Hierarchies.	ISCA	1989	DBLP DOI BibTeX RDF
46	Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour	A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer.	HPDC	1997	DBLP DOI BibTeX RDF	bus-efficient low-latency network interface, PDSS multicomputer, unprivileged code, cache-to-cache communications, distributed barrier-synchronization mechanism, single-chip implementation, commodity processor, routing, multiprocessor interconnection networks, interconnect, cache coherence protocols
46	Aleksey Pesterev, Nickolai Zeldovich, Robert Tappan Morris	Locating cache performance bottlenecks using data profiling.	EuroSys	2010	DBLP DOI BibTeX RDF	data profiling, debug registers, statistical profiling, cache misses
46	Eddy Z. Zhang, Yunlian Jiang, Xipeng Shen	Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?	PPoPP	2010	DBLP DOI BibTeX RDF	parallel program optimizations, chip multiprocessors, shared cache, thread scheduling
46	Aamer Jaleel, Kevin B. Theobald, Simon C. Steely Jr., Joel S. Emer	High performance cache replacement using re-reference interval prediction (RRIP).	ISCA	2010	DBLP DOI BibTeX RDF	scan resistance, thrashing, shared cache, replacement
46	Chenjie Yu, Peter Petrov	Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms.	DAC	2010	DBLP DOI BibTeX RDF	L2 cache partitioning, off-chip bandwidth reduction
46	Hao-Ping Hung, Ming-Syan Chen	On designing a shortest-path-based cache replacement in a transcoding proxy.	Multim. Syst.	2009	DBLP DOI BibTeX RDF	Cache replacement, Transcoding proxy
46	Nan Guan, Martin Stigge, Wang Yi 0001, Ge Yu 0001	Cache-aware scheduling and analysis for multicores.	EMSOFT	2009	DBLP DOI BibTeX RDF	real-time systems, multicores, schedulability analysis, cache partitioning
46	Chun-Hung Lai, Fu-Ching Yang, Chung-Fu Kao, Ing-Jer Huang	A trace-capable instruction cache for cost efficient real-time program trace compression in SoC.	DAC	2009	DBLP DOI BibTeX RDF	real time, cache, compression, program trace
46	Yon Dohn Chung	A cache invalidation scheme for continuous partial match queries in mobile computing environments.	Distributed Parallel Databases	2008	DBLP DOI BibTeX RDF	Mobile computing, Continuous query, Data broadcasting, Cache invalidation, Partial match query
46	Marc González 0001, Nikola Vujic, Xavier Martorell, Eduard Ayguadé, Alexandre E. Eichenberger, Tong Chen 0001, Zehra Sura, Tao Zhang, Kevin O'Brien, Kathryn M. O'Brien	Hybrid access-specific software cache techniques for the cell BE architecture.	PACT	2008	DBLP DOI BibTeX RDF	memory classification, OpenMP, compiler optimizations, local memories, software cache
46	Raj Sharman, Shiva Shankar Ramanna, Ram Ramesh, Ram D. Gopal	Cache architecture for on-demand streaming on the Web.	ACM Trans. Web	2007	DBLP DOI BibTeX RDF	selective retransmissions, quality of service, Web caching, buffering, edge cache, on-demand streaming
46	Jaehyuk Huh 0001, Changkyu Kim, Hazim Shafi, Lixin Zhang 0002, Doug Burger, Stephen W. Keckler	A NUCA Substrate for Flexible CMP Cache Sharing.	IEEE Trans. Parallel Distributed Syst.	2007	DBLP DOI BibTeX RDF	Multiprocessor systems, cache memories, adaptable architectures
46	Manman Peng, Jiaguang Sun, Yuming Wang	A Phase-Based Self-Tuning Algorithm for Reconfigurable Cache.	ICDS	2007	DBLP DOI BibTeX RDF	reconfigurable cache, self-tuning algorithm, low energy, program phase
46	Mingming Zhang, Xiaotao Chang, Ge Zhang 0007	Reducing cache energy consumption by tag encoding in embedded processors.	ISLPED	2007	DBLP DOI BibTeX RDF	tag encoding, cache, low power design, embedded processors
46	Vilas Sridharan, Hossein Asadi 0001, Mehdi Baradaran Tahoori, David R. Kaeli	Reducing Data Cache Susceptibility to Soft Errors.	IEEE Trans. Dependable Secur. Comput.	2006	DBLP DOI BibTeX RDF	refresh, refetch, Fault tolerance, reliability, cache memories, soft errors, error modeling
46	Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi	Architectural support for operating system-driven CMP cache management.	PACT	2006	DBLP DOI BibTeX RDF	quotas, QoS, cache, interface, fairness, CMP, SLAs, OS
46	Domingo Benitez, Juan C. Moure, Dolores Rexachs, Emilio Luque	Evaluation of the field-programmable cache: performance and energy consumption.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	adaptive processors, reconfigurable cache memory, static and dynamic energy consumption, performance evaluation, run-time adaptation
46	Wen-Chih Peng, Ming-Syan Chen	Design and Performance Studies of an Adaptive Cache Retrieval Scheme in a Mobile Computing Environment.	IEEE Trans. Mob. Comput.	2005	DBLP DOI BibTeX RDF	service handoff, cache retrieval scheme, Mobile computing, mobile database, temporal locality
46	Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar	A way-halting cache for low-energy high-performance systems.	ACM Trans. Archit. Code Optim.	2005	DBLP DOI BibTeX RDF	embedded systems, low power, Cache, dynamic optimization, low energy
46	Liqiang He, Zhiyong Liu	An Effective Cache Overlapping Storage Structure for SMT Processors.	ACIS-ICIS	2005	DBLP DOI BibTeX RDF	cache compress, overlap storage, SMT
46	Xavier Vera, Björn Lisper, Jingling Xue	Data cache locking for higher program predictability.	SIGMETRICS	2003	DBLP DOI BibTeX RDF	data cache analysis, worst-case execution time
46	Chang-Gun Lee, Kwangpo Lee, Joosun Hahn, Yang-Min Seo, Sang Lyul Min, Rhan Ha, Seongsoo Hong, Chang Yun Park, Minsuk Lee, Chong-Sang Kim	Bounding Cache-Related Preemption Delay for Real-Time Systems.	IEEE Trans. Software Eng.	2001	DBLP DOI BibTeX RDF	Real-time system, cache memory, schedulability analysis, fixed-priority scheduling, preemption
46	Yijun Yu, Kristof Beyls, Erik H. D'Hollander	Visualizing the Impact of the Cache on Program Execution.	IV	2001	DBLP DOI BibTeX RDF	cache, data locality, program visualization, loop tiling, reuse distance
46	Nigel P. Topham, Antonio González 0001	Randomized Cache Placement for Eliminating Conflicts.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	Conflict avoidance, performance evaluation, cache architectures
46	Huesung Kim, Arun K. Somani, Akhilesh Tyagi	On Reconfiguring Cache for Computing.	FCCM	1999	DBLP DOI BibTeX RDF	cache, convolution, reconfigurable hardware
46	Li-San Li, Huang-Zhen Chun	Lookahead Cache with Instruction Processing Unit for Filling Memory Gap.	EUROMICRO	1999	DBLP DOI BibTeX RDF	Memory Gap, Lookahead Cache, Instruction Processing Unit
46	Trishul M. Chilimbi, James R. Larus	Using Generational Garbage Collection To Implement Cache-Conscious Data Placement.	ISMM	1998	DBLP DOI BibTeX RDF	cache-conscious data placement, object-oriented programs, profiling, garbage collection
46	Xudong Shi 0003, Feiqi Su, Jih-Kwon Peir, Ye Xia 0001, Zhen Yang	Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility.	ISPASS	2007	DBLP DOI BibTeX RDF	multiple cache organization, single-pass simulation, on-chip storage space, on-chip cache capacity, single-pass stack simulation, global stack, shared stack, per-core private stack, single simulation pass, average memory access time, chip-multiprocessor, data replication, data accessibility, abstract model, reuse distances
46	Yang Li, Lin Zuo, Jun Wei 0001, Hua Zhong 0001, Tao Huang 0001	Sequential Pattern-Based Cache Replacement in Servlet Container.	ICWE	2007	DBLP DOI BibTeX RDF	Servlet Cache, Sequential Patterns, Cache Replacement
46	Rezaul Alam Chowdhury, Vijaya Ramachandran	Cache-oblivious shortest paths in graphs using buffer heap.	SPAA	2004	DBLP DOI BibTeX RDF	buffer heap, cache-aware model, cache-oblivious model, decrease-key, tournament tree, shortest paths, priority queue
46	Eric Rotenberg, Steve Bennett, James E. Smith 0001	Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching.	MICRO	1996	DBLP DOI BibTeX RDF	multiple branch prediction, superscalar processors, instruction cache, trace cache, instruction fetching
46	Yang Zeng, Santosh G. Abraham	Partitioning regular grid applications with irregular boundaries for cache-coherent multiprocessors.	IPPS	1995	DBLP DOI BibTeX RDF	partitioning regular grid applications, irregular boundaries, cache-coherent multiprocessors, regular grid, domain decomposition techniques, message passing multiprocessors, false coherency traffic, cache line, coalescing algorithm, domain decomposition algorithm, Indian Ocean circulation application, KSR1 multiprocessor, coherency traffic, message passing, multiprocessing systems, interprocessor communication
46	Craig B. Stunkel, W. Kent Fuchs	An Analysis of Cache Performance for a Hypercube Multicomputer.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	Intel iPSC/2, processornodes, direct-mapped cache performance, application-specific datapartitioning, communication distribution, communication frequency, system accesses, user code, time distribution, message-passing code, performance evaluation, parallel programming, hypercube networks, storage management, buffer storage, parallel application, hypercube multicomputer, code analysis, cache simulation, address traces, data access patterns
46	Haiming Liu 0001, Michael Ferdman, Jaehyuk Huh 0001, Doug Burger	Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency.	MICRO	2008	DBLP DOI BibTeX RDF
46	Yingjie Zhao, Nong Xiao	Saber: Sequential Access Based cachE Replacement to Reduce the Cache Miss Penalty.	ICYCS	2008	DBLP DOI BibTeX RDF
46	Matteo Frigo, Volker Strumpen	The cache complexity of multithreaded cache oblivious algorithms.	SPAA	2006	DBLP DOI BibTeX RDF
46	Harini Ramaprasad, Frank Mueller 0001	Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns.	IEEE Real-Time and Embedded Technology and Applications Symposium	2005	DBLP DOI BibTeX RDF
46	Mohan G. Kabadi, Ranjani Parthasarathi	Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem.	Asia-Pacific Computer Systems Architecture Conference	2003	DBLP DOI BibTeX RDF
46	Hiroyuki Mizuno, Koichiro Ishibashi	A separated bit-line unified cache: Conciliating small on-chip cache die-area and low miss ratio.	IEEE Trans. Very Large Scale Integr. Syst.	1999	DBLP DOI BibTeX RDF
46	David H. Albonesi	Selective Cache Ways: On-Demand Cache Resource Allocation.	MICRO	1999	DBLP DOI BibTeX RDF
46	David C. Wong 0002, Edward W. Davis, Jeffrey O. Young	A Software Approach to Avoiding Spatial Cache Collisions in Parallel Processor Systems.	IEEE Trans. Parallel Distributed Syst.	1998	DBLP DOI BibTeX RDF	Cache collision, cache offset, highly parallel systems, sequential DO-loops, direct-mapped cache
46	Masaki Aida, Noriyuki Takahashi	Evaluation of the number of destination hosts for data networking and its application to address cache design.	ICCCN	1997	DBLP DOI BibTeX RDF	destination hosts, address cache design, address cache tables capacity, large-scale computer communication networks, packet destination addresses, cache hit probability, aging algorithm, probability, Zipf's law, data networking
46	Amit Agarwal 0001, Hai Li, Kaushik Roy 0001	DRG-cache: a data retention gated-ground cache for low power.	DAC	2002	DBLP DOI BibTeX RDF	gated-ground, low leakage cache, SRAM
46	Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe	Cache modeling for real-time software: beyond direct mapped instruction caches.	RTSS	1996	DBLP DOI BibTeX RDF	direct mapped instruction caches, worst case timing analysis, cache hits, set associative instruction caches, unified caches, cinderella, research, integer-linear-programming, worst case execution time, data caches, cache storage, design tool, memory performance, cache misses, real-time software, tight bound, cache modeling, hardware system
46	Sreeram Duvvuru, Siamak Arya	Evaluation of a branch target address cache.	HICSS (1)	1995	DBLP DOI BibTeX RDF	branch target address cache evaluation, sequential flow, pipeline bubbles, branch penalty, cycles per instruction, multiple instruction issue processors, branch resolution scheme, target instruction fetch, unpredictable branches, fully predicated processor architecture, fetch stage, branch target caching policies, branch target address cache, register-relative branches, performance evaluation, interrupts, interrupt, program compilers, pipeline processing, cache storage, storage allocation, instructions, program control structures, cache sizes
46	Dominique Thiébaut, Harold S. Stone	Improving Disk Cache Hit-Ratios Through Cache Partitioning.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	fully associative cache memories, buffer storage, adaptive algorithm, cache storage, content-addressable storage, cache partitioning, magnetic disc storage, hit-ratios, disk cache, queuing network model
43	Waleed Ali 0001, Siti Mariyam Hj. Shamsuddin	Intelligent Client-Side Web Caching Scheme Based on Least Recently Used Algorithm and Neuro-Fuzzy System.	ISNN (2)	2009	DBLP DOI BibTeX RDF	Client-side web caching, Least Recently Used algorithm, Adaptive neuro-fuzzy inference system
43	Serkan Ozdemir, Arindam Mallik, Ja Chun Ku, Gokhan Memik, Yehea I. Ismail	Variable latency caches for nanoscale processor.	SC	2007	DBLP DOI BibTeX RDF
43	Isabelle Puaut	WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems.	ECRTS	2006	DBLP DOI BibTeX RDF
43	Emre Özer 0001, Resit Sendag, David Gregg	Multiple-Valued Caches for Power-Efficient Embedded Systems.	ISMVL	2005	DBLP DOI BibTeX RDF
43	Michael Zhang, Krste Asanovic	Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors.	ISCA	2005	DBLP DOI BibTeX RDF
43	Se-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy 0001, T. N. Vijaykumar	An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches.	HPCA	2001	DBLP DOI BibTeX RDF
43	Yuan-Shin Hwang, Jia-Jhe Li	Snug set-associative caches: Reducing leakage power of instruction and data caches with no performance penalties.	ACM Trans. Archit. Code Optim.	2007	DBLP DOI BibTeX RDF	Caches, leakage power, drowsy caches, cache decay
43	Sailesh Kumar, John Maschmeyer, Patrick Crowley	Exploiting locality to ameliorate packet queue contention and serialization.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	packet queuing, cache, buffering
42	Junpei Zushi, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Koji Inoue	Improved Policies for Drowsy Caches in Embedded Processors.	DELTA	2008	DBLP DOI BibTeX RDF	Low Power Cache Design, Leakage Energy, Drowsy Cache
42	James E. Bennett, Michael J. Flynn	Prediction Caches for Superscalar Processors.	MICRO	1997	DBLP DOI BibTeX RDF	Prediction cache, Dynamic scheduling, Memory latency, Victim cache, Stream buffer
42	John Cieslewicz, William Mee, Kenneth A. Ross	Cache-conscious buffering for database operators with state.	DaMoN	2009	DBLP DOI BibTeX RDF
42	Eriko Nurvitadhi, Jumnit Hong, Shih-Lien Lu	Active Cache Emulator.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
42	Livio Soares, David K. Tam, Michael Stumm	Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer.	MICRO	2008	DBLP DOI BibTeX RDF
42	Chuanjun Zhang, Bing Xue	Two dimensional highly associative level-two cache design.	ICCD	2008	DBLP DOI BibTeX RDF
42	Chih-Wen Hsueh, Jen-Feng Chung, Lan-Da Van, Chin-Teng Lin	Anticipatory access pipeline design for phased cache.	ISCAS	2008	DBLP DOI BibTeX RDF
42	Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny	The Power of Priority: NoC Based Distributed Cache Coherency.	NOCS	2007	DBLP DOI BibTeX RDF
42	Ismail Kadayif, Mahmut T. Kandemir	Modeling and improving data cache reliability.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	vulnerability factors, reliability, data integrity, soft errors, data caches
42	Subramanian Ramaswamy, Sudhakar Yalamanchili	Improving cache efficiency via resizing + remapping.	ICCD	2007	DBLP DOI BibTeX RDF
42	Chuanjun Zhang	Balanced instruction cache: reducing conflict misses of direct-mapped caches through balanced subarray accesses.	IEEE Comput. Archit. Lett.	2006	DBLP DOI BibTeX RDF
42	Pavlos Petoumenos, Georgios Keramidas, Håkan Zeffer, Stefanos Kaxiras, Erik Hagersten	Modeling Cache Sharing on Chip Multiprocessor Architectures.	IISWC	2006	DBLP DOI BibTeX RDF
42	Xiangrong Zhou, Peter Petrov	Low-power cache organization through selective tag translation for embedded processors with virtual memory support.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF
42	Chia-Lin Yang, Hong-Wei Tseng, Chia-Chiang Ho, Ja-Ling Wu	Software-Controlled Cache Architecture for Energy Efficiency.	IEEE Trans. Circuits Syst. Video Technol.	2005	DBLP DOI BibTeX RDF
42	Rama Sangireddy, Huesung Kim, Arun K. Somani	Low-Power High-Performance Reconfigurable Computing Cache Architectures.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF
42	Gianni Franceschini	Proximity Mergesort: optimal in-place sorting in the cache-oblivious model.	SODA	2004	DBLP BibTeX RDF
42	Kim M. Hazelwood, James E. Smith	Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems.	CGO	2004	DBLP DOI BibTeX RDF
42	Mazen Kharbutli, Keith Irwin, Yan Solihin, Jaejin Lee	Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses.	HPCA	2004	DBLP DOI BibTeX RDF
42	Jie Tao 0001, Josef Weidendorfer	Cache Simulation Based on Runtime Instrumentation for OpenMP Applications.	Annual Simulation Symposium	2004	DBLP DOI BibTeX RDF
42	Jingren Zhou, Kenneth A. Ross	Buffering Database Operations for Enhanced Instruction Cache Performance.	SIGMOD Conference	2004	DBLP DOI BibTeX RDF
42	Chunrong Lai, Shih-Lien Lu	Efficient Victim Mechanism on Sector Cache Organization.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
42	Yen-Jen Chang, Shanq-Jang Ruan, Feipei Lai	Design and analysis of low-power cache using two-level filter scheme.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
42	Sangman Moh, Jae-Hong Shim, Yang-Dong Lee, Jeong-A Lee, Beom-Joon Cho	Design and Evaluation of a Cache Coherence Adapter for the SMP Nodes Interconnected via Xcent-Net.	ISCIS	2003	DBLP DOI BibTeX RDF
42	Hongbo Yang, Ramaswamy Govindarajan, Guang R. Gao, Ziang Hu	Compiler-Assisted Cache Replacement: Problem Formulation and Performance Evaluation.	LCPC	2003	DBLP DOI BibTeX RDF