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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 7713 publication records. Showing 7713 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
25 | Raphael Fonte Boa, Dulcinéia Oliveira da Penha, Alexandre Marques Amaral, Márcio Oliveira Soares de Souza, Carlos Augusto Paiva da Silva Martins, Petr Yakovlevitch Ekel |
RCMP: A Reconfigurable Chip-Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA Workshops ![In: Frontiers of High Performance Computing and Networking - ISPA 2006 Workshops, ISPA 2006 International Workshops, FHPCN, XHPC, S-GRACE, GridGIS, HPC-GTP, PDCE, ParDMCom, WOMP, ISDF, and UPWN, Sorrento, Italy, December 4-7, 2006, Proceedings, pp. 94-103, 2006, Springer, 3-540-49860-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
25 | Simon Kågström, Håkan Grahn, Lars Lundberg |
Experiences from Implementing Multiprocessor Support for an Industrial Operating System Kernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 17-19 August 2005, Hong Kong, China, pp. 365-368, 2005, IEEE Computer Society, 0-7695-2346-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Kyong Jung, Chanik Park |
A Technique to Reduce Preemption Overhead in Real-Time Multiprocessor Task Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 566-579, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Akira Yamawaki 0002, Masahiko Iwane |
Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 8th International Symposium on Parallel Architectures, Algorithms, and Networks, ISPAN 2005, December 7-9. 2005, Las Vegas, Nevada, USA, pp. 324-333, 2005, IEEE Computer Society, 0-7695-2509-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Minkyu Park, Sangchul Han, Heeheon Kim, Seongje Cho, Yookun Cho |
Comparison of Tie-Breaking Policies for Real-Time Scheduling on Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference EUC 2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings, pp. 174-182, 2004, Springer, 3-540-22906-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Jan Madsen, Shankar Mahadevan, Kashif Virk, Mercury Gonzalez |
Network-on-Chip Modeling for System-Level Multiprocessor Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 3-5 December 2003, Cancun, Mexico, pp. 265-274, 2003, IEEE Computer Society, 0-7695-2044-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Pawel Hajto, Marcin Skrzypek |
Wavelet-Neuronal Resource Load Prediction for Multiprocessor Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 5th International Conference, PPAM 2003, Czestochowa, Poland, September 7-10, 2003. Revised Papers, pp. 119-124, 2003, Springer, 3-540-21946-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Robert W. Wisniewski, Bryan S. Rosenburg |
Efficient, Unified, and Scalable Performance Monitoring for Multiprocessor Operating Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2003 Conference on High Performance Networking and Computing, 15-21 November 2003, Phoenix, AZ, USA, CD-Rom, pp. 3, 2003, ACM, 1-58113-695-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Syed Saif Abrar |
High Performance Multiprocessor Architecture Design Methodology for Application-Specific Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2002, 9th International Conference, Bangalore, India, December 18-21, 2002, Proceedings, pp. 102-111, 2002, Springer, 3-540-00303-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Björn Andersson, Jan Jonsson |
Preemptive Multiprocessor Scheduling Anomalies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Lars Lundberg |
Analyzing Fixed-Priority Global Multiprocessor Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: Proceedings of the 8th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2002), 24-27 September 2002, San Jose, CA, USA, pp. 145-153, 2002, IEEE Computer Society, 0-7695-1739-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
25 | Muhammet Fikret Ercan, Ceyda Oguz, Yu-Fai Fung |
Performance Evaluation of Heuristics for Scheduling Pipelined Multiprocessor Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (1) ![In: Computational Science - ICCS 2001, International Conference, San Francisco, CA, USA, May 28-30, 2001. Proceedings, Part I, pp. 61-70, 2001, Springer, 3-540-42232-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Abhishek Chandra, Micah Adler, Prashant J. Shenoy |
Deadline Fair Scheduling: Bridging the Theory and Practice of Proportionate Fair Scheduling in Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: Proceedings of the 7th IEEE Real-Time Technology and Applications Symposium (RTAS 2001), 30 May - 1 June 2001, Taipei, Taiwan, pp. 3-14, 2001, IEEE Computer Society, 0-7695-1134-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | M. Kacarska, Suzana Loskovska, D. Andonov |
The advantages of multiprocessor systems for ACEIT and ICEIT inverse problem solution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 279-282, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Rolf Drechsler, Nicole Drechsler, Elke Mackensen, Tobias Schubert 0001, Bernd Becker 0001 |
Design Reuse by Modularity: A Scalable Dynamical (Re)Configurable Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future, 5-7 September 2000, Maastricht, The Netherlands, pp. 1425-, 2000, IEEE Computer Society, 0-7695-0780-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | V. J. Fazio, R. D. Pose |
Distributed Route Initialization Algorithms for the Monash Secure RISC Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (5) ![In: 30th Annual Hawaii International Conference on System Sciences (HICSS-30), 7-10 January 1997, Maui, Hawaii, USA, pp. 24-33, 1997, IEEE Computer Society, 0-8186-7734-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Kenneth G. Wilson, Kunyung Chang |
The Case for a Single-Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VII Proceedings - Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, Massachusetts, USA, October 1-5, 1996., pp. 2-11, 1996, ACM Press, 0-89791-767-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
25 | Yuguang Wu, Richard R. Muntz |
Stack Evaluation of Arbitrary Set-Associative Multiprocessor Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 6(9), pp. 930-942, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
coherence by invalidation, stack evaluation, simulation, Cache memory, set-associative |
25 | Klaus Gaedke, Hartwig Jeschke, Peter Pirsch |
A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 5(2-3), pp. 159-169, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
25 | Jean-Marc Kuntz |
Performance Evaluation of Cache Memories in Tightly Coupled Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE ![In: PARLE '92: Parallel Architectures and Languages Europe, 4th International PARLE Conference, Paris, France, June 15-18, 1992, Proceedings, pp. 735-750, 1992, Springer, 3-540-55599-4. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
25 | Mark S. Squillante, Randolph D. Nelson |
Analysis of Task Migration in Shared-Memory Multiprocessor Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems, San Diego, California, USA, May 21-24, 1991, pp. 143-155, 1991, ACM, 0-89791-392-2. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
25 | Rajeev Jog, Philip L. Vitale, James R. Callister |
Performance Evaluation of a Commercial Cache-Coherent Shared Memory Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems, University of Colorado, Boulder, Colorado, USA, May 22-25, 1990, pp. 173-182, 1990, ACM, 0-89791-359-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
25 | Xiaodong Zhang 0001, P. Srinivasan |
Distributed task processing performance on a NUMA shared memory multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPDP ![In: Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, SPDP 1990, Dallas, Texas, USA, December 9-13, 1990., pp. 786-789, 1990, IEEE Computer Society, 0-8186-2087-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
25 | Edward Rothberg, Anoop Gupta |
Techniques for improving the performance of sparse matrix factorization on multiprocessor workstations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, pp. 232-241, 1990, IEEE Computer Society, 0-89791-412-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
25 | André Seznec, Yvon Jégou |
Towards a large number of pipeline processors in a tightly coupled multiprocessor using no cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 2nd international conference on Supercomputing, ICS 1988, Saint Malo, France, July 4-8, 1988, pp. 611-620, 1988, ACM, 0-89791-272-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
25 | Bob Beck, Bob Kasten, Shreekant S. Thakkar |
VLSI Assist For a Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), Palo Alto, California, USA, October 5-8, 1987., pp. 10-20, 1987, ACM Press, 0-8186-0805-6. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
25 | Saul A. Kravitz, Rob A. Rutenbar |
Multiprocessor-based placement by simulated annealing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986., pp. 567-573, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
25 | Patrick Valduriez, Georges Gardarin |
Join and Semijoin Algorithms for a Multiprocessor Database Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 9(1), pp. 133-161, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
25 | Terrence R. Mckelvey, Dharma P. Agrawal |
Design of software for distributed/multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1982 National Computer Conference, 7-10 June, 1982, Houston, Texas, USA, pp. 239-249, 1982, AFIPS Press, 0-88283-035-X. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
|
25 | Gerhard Fritsch, Horst Müller |
Parallelization of a minimization problem for multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONPAR ![In: CONPAR 81: Conference on Analysing Problem Classes and Programming for Parallel Computing, Nürnberg, Germany, June 10-12, 1981, Proceedings, pp. 453-463, 1981, Springer, 3-540-10827-0. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
|
25 | John Mitchell, Charles Knadler, Gary Lunsford, Steve Yang |
Multiprocessor performance analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1974 National Computer Conference, 6-10 May 1974, Chicago, Illinois, USA, pp. 399-403, 1974, AFIPS Press, 978-1-4503-7920-5. The full citation details ...](Pics/full.jpeg) |
1974 |
DBLP DOI BibTeX RDF |
|
25 | Magnus Karlsson 0002, Per Stenström |
Performance Evaluation of a Cluster-Based Multiprocessor Built from ATM Switches and Bus-Based Multiprocessor Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 4-13, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
25 | Joseph Pallas, David M. Ungar |
Multiprocessor Smalltalk: A Case Study of a Multiprocessor-Based Programming Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'88 Conference on Programming Language Design and Implementation (PLDI), Atlanta, Georgia, USA, June 22-24, 1988, pp. 268-277, 1988, ACM, 0-89791-269-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
Smalltalk, Smalltalk-80 |
24 | Jong-Myon Kim |
The Impact of Multimedia Extensions for Multimedia Applications on Mobile Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCHI ![In: Computer-Human Interaction, 8th Asia-Pacific Conference, APCHI 2008, Seoul, Korea, July 6-9, 2008, Proceedings, pp. 266-275, 2008, Springer, 978-3-540-70584-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Mobile multimedia computing systems, Multiprocessor arrays, Parallel processing, Multimedia extensions |
24 | Dhiraj D. Kalamkar, Mainak Chaudhuri, Mark A. Heinrich |
Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 242-253, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
active memory cluster, directory protocol thread, active memory address remapping, parallel reduction, coherence protocol extension, software protocol, multi-threaded node, dual-core node, active memory architecture, distributed shared memory, multiprocessor architecture, memory controller, matrix transpose |
24 | Mirko Loghi, Massimo Poncino, Luca Benini |
Cache coherence tradeoffs in shared-memory MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(2), pp. 383-407, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low power, multiprocessor, system-on-chip, Cache coherence |
24 | Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo |
Slack Reclamation for Real-Time Task Scheduling over Dynamic Voltage Scaling Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SUTC (1) ![In: IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC 2006), 5-7 June 2006, Taichung, Taiwan, pp. 358-367, 2006, IEEE Computer Society, 0-7695-2553-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Slack Reclamation, Multiprocessor Scheduling, Energy-Efficient Scheduling, Real-Time Task Scheduling |
24 | Lisa Higham, LillAnne Jackson, Jalal Kawash |
Capturing Register and Control Dependence in Memory Consistency Models with Applications to the Itanium Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DISC ![In: Distributed Computing, 20th International Symposium, DISC 2006, Stockholm, Sweden, September 18-20, 2006, Proceedings, pp. 164-178, 2006, Springer, 3-540-44624-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Multiprocessor memory consistency, register and control dependency, process coordination, Itanium |
24 | Ozcan Ozturk 0001, Guangyu Chen, Mahmut T. Kandemir |
Multi-compilation: capturing interactions among concurrently-executing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006, pp. 157-170, 2006, ACM, 1-59593-302-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multi-compilation, compiler, chip multiprocessor |
24 | Nathan Fisher, James H. Anderson, Sanjoy K. Baruah |
Task Partitioning upon Memory-Constrained Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 17-19 August 2005, Hong Kong, China, pp. 416-421, 2005, IEEE Computer Society, 0-7695-2346-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Memory-constrained systems, Utilization-based schedulability tests, Multiprocessor systems, Partitioned scheduling |
24 | Joël Goossens, Shelby H. Funk, Sanjoy K. Baruah |
Priority-Driven Scheduling of Periodic Task Systems on Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 25(2-3), pp. 187-205, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multiprocessor scheduling, earliest deadline first, periodic tasks |
24 | Allon Adir, Hagit Attiya, Gil Shurek |
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 14(5), pp. 502-515, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
PowerPC architecture, synchronization instructions, models, specification, consistency, Shared memory, multiprocessor systems, out-of-order execution |
24 | C. R. Venugopal, S. S. S. P. Rao |
Impact of Delays in Parallel I/O System: An Empirical Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 5th International Symposium on High Performance Distributed Computing (HPDC '96), Syracuse, NY, USA, August 6-9, 1996., pp. 490-499, 1996, IEEE Computer Society, 0-8186-7582-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel input output system, disk access delays, disk performance, parallel distributed file system, parallel processing, delays, distributed databases, multiprocessing systems, multiprocessor system, software performance evaluation, communication links, application performance, processor speeds, performance benefits |
24 | Michel Dubois 0001, Christoph Scheurich |
Memory Access Dependencies in Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 16(6), pp. 660-673, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
memory access dependencies, logical concurrency model, pipelining, multiprocessing systems, rules, shared-memory multiprocessors, multiprogramming, storage allocation, multiprocessor architectures, private caches |
24 | T. Anthony Marsland, Liming Meng |
Control Bottlenecks in a Network Database Mechine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCI ![In: Advances in Computing and Information - ICCI'90, International Conference on Computing and Information, Niagara Falls, Canada, May 23-26, 1990, Proceedings, pp. 483-492, 1990, Springer, 3-540-53504-7. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
Multiprocessor Database Machines, Network Data Processing, Performance Analysis, Information Processing, Bottlenecks |
24 | Yun Wen, Hua Xu, Jiadong Yang |
A heuristic-based hybrid genetic algorithm for heterogeneous multiprocessor scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 729-736, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
heterogeneous multiprocessor scheduling, genetic algorithm, memetic algorithm, variable neighborhood search |
24 | Hennadiy Leontyev, James H. Anderson |
A hierarchical multiprocessor bandwidth reservation scheme with timing guarantees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 43(1), pp. 60-92, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Multiprocessor scheduling, Containers, Soft real-time, Hierarchical scheduling |
24 | Simon Schliecker, Rolf Ernst |
A recursive approach to end-to-end path latency computation in heterogeneous multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009, pp. 433-442, 2009, ACM, 978-1-60558-628-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
path latency, real-time, multiprocessor |
24 | Xi Zhang 0008, Dongsheng Wang 0002, Yibo Xue, Haixia Wang 0001, Jinglei Wang |
A Novel Cache Organization for Tiled Chip Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 8th International Symposium, APPT 2009, Rapperswil, Switzerland, August 24-25, 2009, Proceedings, pp. 41-53, 2009, Springer, 978-3-642-03643-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Multi-level Directory, Chip Multiprocessor(CMP), Cache Organization, Tiled Architecture |
24 | Alexander Khutoretskij, Sergei Bredikhin |
Distributions and Schedules of CPU Time in a Multiprocessor System When the Users' Utility Functions Are Linear. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 10th International Conference, PaCT 2009, Novosibirsk, Russia, August 31-September 4, 2009. Proceedings, pp. 316-320, 2009, Springer, 978-3-642-03274-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
paid services, scheduling, linear programming, Distribution, multiprocessor system, CPU time, market equilibrium |
24 | Magnus Jahre, Lasse Natvig |
A light-weight fairness mechanism for chip multiprocessor memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009, pp. 1-10, 2009, ACM, 978-1-60558-413-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dynamic miss handling architecture, miss status holding register, fairness, chip multiprocessor, interference, mechanism |
24 | Sanjoy K. Baruah, Nathan Fisher |
Non-migratory feasibility and migratory schedulability analysis of multiprocessor real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 39(1-3), pp. 97-122, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Multiprocessor platforms, Recurrent tasks, Schedulability analysis, Fixed-priority scheduling, Sufficient conditions, Feasibility analysis |
24 | Traian Pop, Paul Pop, Petru Eles, Zebo Peng |
Analysis and Optimisation of Hierarchically Scheduled Multiprocessor Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(1), pp. 37-67, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Static/dynamic communication protocols, Hierarchical schedulers, Multiprocessor embedded systems |
24 | Hiroaki Inoue, Junji Sakai, Sunao Torii, Masato Edahiro |
FIDES: An advanced chip multiprocessor platform for secure next generation mobile terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 8(1), pp. 1:1-1:16, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Secure mobile terminal, chip multiprocessor, SELinux |
24 | Paolo Detti |
Algorithms for multiprocessor scheduling with two job lengths and allocation restrictions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Sched. ![In: J. Sched. 11(3), pp. 205-212, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Multiprocessor scheduling, Polynomial algorithms, High multiplicity |
24 | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 77-86, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
24 | Jian-Jia Chen, Chuan-Yue Yang, Hsueh-I Lu, Tei-Wei Kuo |
Approximation Algorithms for Multiprocessor Energy-Efficient Scheduling of Periodic Real-Time Tasks with Uncertain Task Execution Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real-Time and Embedded Technology and Applications Symposium ![In: Proceedings of the 14th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2008, April 22-24, 2008, St. Louis, Missouri, USA, pp. 13-23, 2008, IEEE Computer Society, 978-0-7695-3146-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Expected Energy Consumption Minimization, Probability, Dynamic Voltage Scaling (DVS), Multiprocessor Scheduling, Energy-Efficient Scheduling |
24 | Yi-Neng Lin, Ying-Dar Lin, Yuan-Cheng Lai |
Thread Allocation in Chip Multiprocessor Based Multithreaded Network Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 22nd International Conference on Advanced Information Networking and Applications, AINA 2008, GinoWan, Okinawa, Japan, March 25-28, 2008, pp. 718-725, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
thread allocation, simulation, modeling, Petri net, chip multiprocessor |
24 | Ce Li, Yang Jiang, Zhenyu Wu, Takahiro Watanabe |
A Multiprocessor System for a Small Size Soccer Robot Control System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 115-118, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
MP, FPGA, multiprocessor, soccer robot |
24 | Christopher Y. Crutchfield, Zoran Dzunic, Jeremy T. Fineman, David R. Karger, Jacob Scott 0001 |
Improved approximations for multiprocessor scheduling under uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2008: Proceedings of the 20th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 14-16, 2008, pp. 246-255, 2008, ACM, 978-1-59593-973-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scheduling under uncertainty, approximation algorithms, multiprocessor scheduling, stochastic scheduling |
24 | Hazem Moussa, Amer Baghdadi, Michel Jézéquel |
Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 429-434, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
flexible LDPC decoder, multiprocessor, NoC, de Bruijn graph |
24 | Sebastian Herbert, Diana Marculescu |
Characterizing chip-multiprocessor variability-tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 313-318, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
frequency islands, chip-multiprocessor, process variability |
24 | Lee Kee Goh, Bharadwaj Veeravalli, Sivakumar Viswanathan |
An Energy-Aware Gradient-Based Scheduling Heuristic for Heterogeneous Multiprocessor Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2007, 14th International Conference, Goa, India, December 18-21, 2007, Proceedings, pp. 331-341, 2007, Springer, 978-3-540-77219-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded systems, power management, dynamic voltage scaling, Energy-aware scheduling, heterogeneous multiprocessor |
24 | Woo-Chul Jeun, Soonhoi Ha |
Effective OpenMP Implementation and Translation For Multiprocessor System-On-Chip without Using OS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 44-49, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
hardware semaphores, parallel programming, OpenMP, shared memory system, multiprocessor system-on-chip |
24 | Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, Li Shang |
Reliable multiprocessor system-on-chip synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 239-244, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synthesis, multiprocessor system-on-chip, thermal |
24 | Chong Sun, Li Shang, Robert P. Dick |
Three-dimensional multiprocessor system-on-chip thermal optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 117-122, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
synthesis, 3D, multiprocessor system-on-chip, thermal |
24 | Christof Pitter, Martin Schoeberl |
Towards a Java multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES 2007, Institute of Computer Engineering, Vienna University of Technology, 26-28 September 2007, Vienna, Austria, pp. 144-151, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Java, multiprocessor, shared memory |
24 | Slo-Li Chu |
Critical Block Scheduling: A Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 20th International Workshop, LCPC 2007, Urbana, IL, USA, October 11-13, 2007, Revised Selected Papers, pp. 261-275, 2007, Springer, 978-3-540-85260-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Critical Block Scheduling, Octans, Chip Multiprocessor (CMP), Processor-in-Memory |
24 | Peng Liu 0027, Guojun Dai, Tingting Fu, Hong Zeng, Xiang Zhang |
A Lazy EDF Interrupt Scheduling Algorithm for Multiprocessor in Parallel Computing Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP ![In: Algorithms and Architectures for Parallel Processing, 7th International Conference, ICA3PP 2007, Hangzhou, China, June 11-14, 2007, Proceedings, pp. 49-59, 2007, Springer, 978-3-540-72904-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Interrupt scheduling, Lazy EDF, Real-time system, Parallel computing, Multiprocessor |
24 | Slo-Li Chu |
Toward to Utilize the Heterogeneous Multiple Processors of the Chip Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2007, Taipei, Taiwan, December 17-20, 2007, Proceedings, pp. 234-246, 2007, Springer, 978-3-540-77091-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Swing Scheduling, Octans, Chip Multiprocessor (CMP), Processor-in-Memory |
24 | Dennis Abts, Abdulla Bataineh, Steve Scott, Greg Faanes, Jim Schwarzmeier, Eric Lundberg, Tim Johnson, Mike Bye, Gerald Schwoerer |
The Cray BlackWidow: a highly scalable vector multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, SC 2007, November 10-16, 2007, Reno, Nevada, USA, pp. 17, 2007, ACM Press, 978-1-59593-764-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
high-radix, architecture, multiprocessor, shared memory, distributed shared memory, vector, fat-tree, MPP |
24 | Carlo Brandolese, William Fornaciari, Luigi Pomante, Fabio Salice, Donatella Sciuto |
Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(5), pp. 508-519, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
embedded systems, metrics, System-on-Chip, multiprocessor systems, heterogeneous systems, codesign |
24 | Mahmut T. Kandemir |
Reducing energy consumption of multiprocessor SoC architectures by exploiting memory bank locality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(2), pp. 410-441, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Banked memory systems, bank locality, compiler optimization, energy consumption, multiprocessor SoC |
24 | Heng-Ruey Hsu, Jian-Jia Chen, Tei-Wei Kuo |
Multiprocessor synthesis for periodic hard real-time tasks under a given energy constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1061-1066, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multiprocessor synthesis, real-time systems, task scheduling, energy-aware systems, task partitioning |
24 | Manuel Saldaña, Lesley Shannon, Paul Chow |
The routability of multiprocessor network topologies in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings, pp. 49-56, 2006, ACM, 1-59593-255-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA, multiprocessor, network-on-chip, topology, interconnect |
24 | Michela Becchi, Patrick Crowley |
Dynamic thread assignment on heterogeneous multiprocessor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006, pp. 29-40, 2006, ACM, 1-59593-302-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
simulation, chip multiprocessor, heterogeneous architectures |
24 | Sathish Gopalakrishnan, Marco Caccamo |
Task Partitioning with Replication upon Heterogeneous Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2006), 4-7 April 2006, San Jose, California, USA, pp. 199-207, 2006, IEEE Computer Society, 0-7695-2516-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Recurring tasks, Fault tolerance, Partitioning, Multiprocessor scheduling, Approximation scheme |
24 | Taeho Kgil, Shaun D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztián Flautner |
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006, pp. 117-128, 2006, ACM, 1-59593-451-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
3D stacking technology, tier 1 server, web/file/streaming server, low power, chip multiprocessor, full-system simulation |
24 | Li Yang 0001, Lu Peng 0001 |
SecCMP: a secure chip-multiprocessor architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASID ![In: Proceedings of the 1st Workshop on Architectural and System Support for Improving Software Dependability, ASID 2006, San Jose, California, USA, October 21, 2006, pp. 72-76, 2006, ACM, 1-59593-576-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
security, fault-tolerance, encryption, chip-multiprocessor |
24 | Xinping Zhu, Wei Qin |
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 53-56, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
fault-tolerance, system-on-chip, network-on-chip, multiprocessor system, run-time verification, retargetable simulation |
24 | Mario Diaz-Nava, Patrick Blouet, Philippe Teninge, Marcello Coppola, Tarek Ben Ismail, Samuel Picchiottino, Robin Wilson |
An Open Platform for Developing Multiprocessor SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 38(7), pp. 60-67, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hardware emulation platform, computing nodes, HW/SW development, microprocessors, multiprocessor systems, MPSoCs, network interfaces |
24 | Peter G. Sassone, D. Scott Wills |
Scaling Up the Atlas Chip-Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(1), pp. 82-87, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Dynamic multithreading, chip-multiprocessor, scaling |
24 | Paolo Detti, Alessandro Agnetis, Gianfranco Ciaschetti |
Polynomial Algorithms for a Two-Class Multiprocessor Scheduling Problem in Mobile Telecommunications Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Sched. ![In: J. Sched. 8(3), pp. 255-273, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multiprocessor scheduling, polynomial algorithms, high-multiplicity |
24 | Ceyda Oguz, Muhammet Fikret Ercan |
A Genetic Algorithm for Hybrid Flow-shop Scheduling with Multiprocessor Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Sched. ![In: J. Sched. 8(4), pp. 323-351, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multiprocessor task scheduling, hybrid flow-shop, genetic algorithm |
24 | Tali Moreshet, R. Iris Bahar, Maurice Herlihy |
Energy reduction in multiprocessor systems using transactional memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 331-334, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multiprocessor, power, transactional memory |
24 | Özgün Paker, Jens Sparsø, Niels Haandbæk, Mogens Isager, Lars Skovby Nielsen |
A Low-Power Heterogeneous Multiprocessor Architecture for Audio Signal Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 37(1), pp. 95-110, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
ASIP-application specific instruction set processor, low power, multiprocessor, heterogeneous, scalable architecture, audio signal processing |
24 | Sanjoy K. Baruah, Giuseppe Lipari |
A Multiprocessor Implementation of the Total Bandwidth Server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
periodic task systems, aperiodic jobs, Real-time systems, multiprocessor scheduling, earliest deadline first |
24 | Xiaofang Wang, Sotirios G. Ziavras |
A Configurable Multiprocessor and Dynamic Load Balancing for Parallel LU Factorization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, parallel processing, multiprocessor, dynamic load balancing, LU factorization |
24 | Sanjoy K. Baruah |
Task Partitioning Upon Heterogeneous Multiprocessor Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real-Time and Embedded Technology and Applications Symposium ![In: 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2004), 25-28 May 2004, Toronto, Canada, pp. 536-543, 2004, IEEE Computer Society, 0-7695-2148-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Approximation algorithms, Partitioning, Multiprocessor scheduling, Periodic tasks |
24 | Mirko Loghi, Massimo Poncino, Luca Benini |
Cycle-accurate power analysis for multiprocessor systems-on-a-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 410-406, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
low power, multiprocessor, system-on-chip |
24 | Weiping Zhu 0001 |
Cluster Queue Structure for Shared-Memory Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 25(3), pp. 215-236, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
queue structure, simulation and multiprocessor, performance evaluation, task scheduling |
24 | Baback A. Izadi, Füsun Özgüner |
Enhanced Cluster k-Ary n-Cube, A Fault-Tolerant Multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(11), pp. 1443-1453, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
spare allocation, augmented multiprocessor, wave switching, Fault tolerance, reconfiguration, hypercube, k-ary n-cube |
24 | Hakan Aydin, Qi Yang |
Energy-Aware Partitioning for Multiprocessor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 113, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Variable voltage scheduling, Power-aware real-time systems, Load balancing, Dynamic voltage scaling, Real-time scheduling, Multiprocessor scheduling, Partitioned scheduling |
24 | Satoshi Fujita, Masayuki Masukawa, Shigeaki Tagashira |
A Fast Branch-and-Bound Scheme for the Multiprocessor Scheduling Problem with Communication Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 32nd International Conference on Parallel Processing Workshops (ICPP 2003 Workshops), 6-9 October 2003, Kaohsiung, Taiwan, pp. 104-, 2003, IEEE Computer Society, 0-7695-2018-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
lower bound on the execution time, Branch-and-bound algorithm, communication time, multiprocessor scheduling problem |
24 | Dongkun Shin, Jihong Kim 0001 |
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 408-413, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
conditional task graph, real-time systems, multiprocessor, dynamic voltage scaling |
24 | Hadas Shachnai, Tami Tamir |
Multiprocessor Scheduling with Machine Allotment and Parallelism Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algorithmica ![In: Algorithmica 32(4), pp. 651-678, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Machine allotments, Parallelizable jobs, Multiprocessor scheduling, Makespan |
24 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya |
Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 28(9), pp. 822-831, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hardware/software codesign, Performance estimation, multiprocessor architectures, architecture exploration, system-level simulation |
24 | Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol, Egbert G. T. Jaspers, Pieter van der Wolf, Om Prakash Gangwal, Adwin H. Timmer |
Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
high-performance media processing, heterogeneous multiprocessor architecture, Scalability, synchronization |
24 | Donatella Sciuto, Fabio Salice, Luigi Pomante, William Fornaciari |
Metrics for design space exploration of heterogeneous multiprocessor embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 55-60, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
heterogeneous multiprocessor Embedded Systems, metrics for Hw/Sw partitioning, system-level design |
24 | Satoshi Fujita, Masayuki Masukawa, Shigeaki Tagashira |
A Fast Branch-and-Bound Algorithm with an Improved Lower Bound for Solving the Multiprocessor Scheduling Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 9th International Conference on Parallel and Distributed Systems, ICPADS 2002, Taiwan, ROC, December 17-20, 2002, pp. 611-616, 2002, IEEE Computer Society, 0-7695-1760-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
lower bound on the execution time, quadratic algorithm, Branch-and-bound algorithm, multiprocessor scheduling problem |
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