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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 157 occurrences of 138 keywords
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Results
Found 461 publication records. Showing 461 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
13 | Meigen Shen, Li-Rong Zheng 0001, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen |
Concurrent Chip Package Design for Global Clock Distribution Network Using Standing Wave Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 573-578, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | María del Milagro Bolado, Hector Posadas, Javier Castillo, Pablo Huerta, Pablo Sánchez, Carlos Sánchez, Häkan Fouren, Francisco Blasco |
Platform Based on Open-Source Cores for Industrial Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1014-1019, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | José Mariano Fernández Nava, Pedro Bañuelos Sánchez |
Stacked Multicell Converter Controlled by DSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONIELECOMP ![In: 14th International Conference on Electronics, Communications, and Computers (CONIELECOMP 2004), 16-18 February 2004, Veracruz, Mexico, pp. 69-74, 2004, IEEE Computer Society, 0-7695-2074-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Said Hamdioui, Georgi Gaydadjiev, Ad J. van de Goor |
The State-of-Art and Future Trends in Testing Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 12th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2004), 9-10 August 2004, San Jose, CA, USA, pp. 54-59, 2004, IEEE Computer Society, 0-7695-2193-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Ho-Ick Suk |
Information Security in Korea IT839 Strategy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIACRYPT ![In: Advances in Cryptology - ASIACRYPT 2004, 10th International Conference on the Theory and Application of Cryptology and Information Security, Jeju Island, Korea, December 5-9, 2004, Proceedings, pp. 430-431, 2004, Springer, 3-540-23975-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Kikuo Okuyama, Wuled Lenggoro, Toru Iwaki |
Nanoparticle Preparation and Its Application - A Nanotechnology Particle Project in Japan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMENS ![In: 2004 International Conference on MEMS, NANO, and Smart Systems (ICMENS 2004), 25-27 August 2004, Banff, Alberta, Canada, pp. 369-372, 2004, IEEE Computer Society, 0-7695-2189-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Chintan Patel, Abhishek Singh 0001, Jim Plusquellic |
Defect detection under Realistic Leakage Models using Multiple IDDQ Measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 319-328, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Sandip Kundu, T. M. Mak, Rajesh Galivanche |
Trends in manufacturing test methods and their implications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 679-687, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Cor Claeys |
Technological Challenges of Advanced CMOS Processing and Their Impact on Design Aspects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 275-, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah |
Is statistical timing statistically significant? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 498, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
13 | Haihua Su, Sachin S. Sapatnekar, Sani R. Nassif |
Optimal decoupling capacitor sizing and placement for standard-cell layout designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(4), pp. 428-436, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Ming-Yueh Tsay, Hong Xu, Chia-wen Wu |
Author co-citation analysis of semiconductor literature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Scientometrics ![In: Scientometrics 58(3), pp. 529-545, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Ming-Yueh Tsay, Hong Xu, Chia-wen Wu |
Journal co-citation analysis of semiconductor literature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Scientometrics ![In: Scientometrics 57(1), pp. 7-25, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Thierry J.-F. Omnés, Gerard Postuma, Jos Verhaegh, Marleen Boonen, Nick Gatherer |
Using SSDE for USB2.0 conformance co-verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 1st ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), 24-26 June 2003, Mont Saint-Michel, France, Proceedings, pp. 113-122, 2003, IEEE Computer Society, 0-7695-1923-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron Egier, Jonathan Rose |
Automatic transistor and physical design of FPGA tiles from an architectural specification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003, pp. 164-172, 2003, ACM, 1-58113-651-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPGA, programmable logic, PLD, automatic layout |
13 | Sergey Smirnov, Hans Kosina, Mihail Nedjalkov, Siegfried Selberherr |
A Zero Field Monte Carlo Algorithm Accounting for the Pauli Exclusion Principle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LSSC ![In: Large-Scale Scientific Computing, 4th International Conference, LSSC 2003, Sozopal, Bulgaria, June 4-8, 2003, Revised Papers, pp. 185-193, 2003, Springer, 3-540-21090-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Roger Barth |
ITRS Commodity Memory Roadmap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 11th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2003), 28-29 July 2003, San Jose, CA, USA, pp. 61-63, 2003, IEEE Computer Society, 0-7695-2004-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Giacomo Giorgi, Filippo De Angelis, Nazzareno Re, Antonio Sgamellotti |
Theoretical Analysis on Mechanisms Implied in Hybrid Integrated Circuit Building. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2003, International Conference, Melbourne, Australia and St. Petersburg, Russia, June 2-4, 2003. Proceedings, Part II, pp. 331-340, 2003, Springer, 3-540-40195-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Arzu Sardarli, Igor M. Filanovsky, R. M. Sardarli, O. A. Samedov, I. Sh. Sadigov, A. I. Aslanov |
Translation of the Phase Transition Temperature in TlInS2 Crystals with Cationic Impurity Doping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMENS ![In: 2003 International Conference on MEMS, NANO, and Smart Systems (ICMENS 2003), 20-23 July 2003, Banff, Alberta, Canada, pp. 218-221, 2003, IEEE Computer Society, 0-7695-1947-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Miguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas, M. Gloanec, E. Leclerc, Bernard Lefebvre |
Broad-band transimpedance amplifier for multigigabit-per-second (40 Gbps) optical communication systems in 0.135µm PHEMT technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 409-412, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Abhijit Prasad, D. M. H. Walker |
Chip Level Power Supply Partitioning for IDDQ Testing Using Built-In Current Sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 140-, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Ananta K. Majhi, Guido Gronthoud, Camelia Hora, Maurice Lousberg, Pop Valer, Stefan Eichenberger |
Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 345-350, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | Kaushik Roy 0001, T. M. Mak, Kwang-Ting Cheng |
Embedded Tutorial: Test Consideration for Nanometer Scale CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 313-318, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
13 | A. V. Mule, Elias N. Glytsis, Thomas K. Gaylord, James D. Meindl |
Electrical and optical clock distribution networks for gigascale microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(5), pp. 582-594, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Stefan Schoen, Helmut Degen, Nuray M. Aykin, Arnold Rudorfer, Xiaowei Yuan |
Siemens AG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Interactions ![In: Interactions 9(2), pp. 87-90, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Kaustav Banerjee, Amit Mehrotra |
Analysis of on-chip inductance effects for distributed RLC interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(8), pp. 904-915, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Chih-Wen Lu, Chung-Len Lee 0001, Chauchin Su, Jwu-E Chen |
Analysis of Application of the IDDQ Technique to the Deep Sub-Micron VLSI Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(1), pp. 89-97, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
VLSI, IDDQ testing, deep sub-micron |
13 | Rajesh Gupta 0001 |
Sustaining an Industry Obsession. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 19(5), pp. 1-, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Juan Antonio Carballo, Sani R. Nassif |
Impact of Technology in Power-Grid-Induced Noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002, pp. 45-54, 2002, Springer, 3-540-44143-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Geoffrey C.-F. Yeap |
Leakage current in low standby power and high performance devices: trends and challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 22-27, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
gate tunneling leakage, low standby power, off-state sub-threshold leakage, system-on-a-ship (SoC), high performance, CMOS technology, leakage current |
13 | Haihua Su, Sachin S. Sapatnekar, Sani R. Nassif |
An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 68-73, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
adjoint sensitivity, optimization, placement, ASICs, decoupling capacitor, power grid noise |
13 | Matthew M. Ziegler, Mircea R. Stan |
A Case for CMOS/nano co-design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 348-352, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Sani R. Nassif, Onsi Fakhouri |
Technology trends in power-grid-induced noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Fourth IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2002), April 6-7, 2002, San Diego, California, USA, Proceedings, pp. 55-59, 2002, ACM. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
power grid noise |
13 | Todor V. Gurov, Paula A. Whitlock, Ivan Dimov 0001 |
Monte Carlo and Quasi-Monte Carlo Algorithms for the Barker-Ferry Equation with Low Complexity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Numerical Methods and Application ![In: Numerical Methods and Applications, 5th International Conference, NMA 2002, Borovets, Bulgaria, August 20-24, 2002, Revised Papers, pp. 108-116, 2002, Springer, 3-540-00608-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Santanu Dutta |
Architecture and design of NX-2700: a programmable single-chip HDTV all-format-decode-and-display processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(2), pp. 313-328, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Peter Meuris, Wim Schoenmaker, Wim Magnus |
Strategy for electromagnetic interconnect modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(6), pp. 753-762, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Hai Zhou 0001, Adnan Aziz |
Buffer minimization in pass transistor logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(5), pp. 693-697, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Santanu Dutta, Rune Jensen, Alf Rieckmann |
Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 18(5), pp. 21-31, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Ralf Brederlow, Werner Weber, Joseph Sauerer, Stéphane Donnay, Piet Wambacq, Maarten Vertregt |
A Mixed-Signal Design Roadmap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 18(6), pp. 34-46, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Thomas L. Sterling |
An Introduction to the Gilgamesh PIM Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference Manchester, UK August 28-31, 2001, Proceedings, pp. 16-32, 2001, Springer, 3-540-42495-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Renato P. Ribas, F. Rudge Barbosa, N. Turatti |
Integrated Circuits Design Teaching Using Professional CAD Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2001 International Conference on Microelectronics Systems Education, MSE 2001, Las Vegas, NV, USA, July 17-18, 2001, pp. 77-, 2001, IEEE Computer Society, 0-7695-1156-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | Stanislaw P. Maj, D. Veal, Rick Duley |
A proposed new high level abstraction for computer technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCSE ![In: Proceedings of the 32rd SIGCSE Technical Symposium on Computer Science Education, SIGCSE 2001, Charlotte, North Carolina, USA, 2001, pp. 199-203, 2001, ACM, 1-58113-329-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
computer technology education, constructivisim, modeling |
13 | Azeez J. Bhavnagarwala, Blanca Austin, Keith A. Bowman, James D. Meindl |
A minimum total power methodology for projecting limits on CMOS GSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(3), pp. 235-251, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Dennis Sylvester, Kurt Keutzer |
A global wiring paradigm for deep submicron design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(2), pp. 242-252, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Santanu Dutta |
Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000, Proceedings, pp. 225-232, 2000, Springer, 3-540-41068-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Kees Veelenturf |
The Road to Better Reliability and Yield Embedded DfM Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 67-68, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
wire spreading, yield prediction, yield improvement, DfM |
13 | Chih-Wen Lu, Chauchin Su, Chung-Len Lee 0001, Jwu E. Chen |
Is IDDQ testing not applicable for deep submicron VLSI in year 2011? ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 338-343, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
deep submicron VLSI, IDDQ current estimation, random process deviations, IDDQ distributions, VLSI, statistical analysis, integrated circuit testing, CMOS integrated circuits, leakage currents, IDDQ testing, statistical approach, standard deviation, input vectors, circuit size |
13 | Aart J. de Geus |
Slap it Together and Ship it! ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 23-24, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
13 | John M. Cohn, Rob A. Rutenbar, Steve J. Young, Chris Malachowsky, Luis Aldaz |
Case studies: Chip design on the bleeding edge (panel session abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 648, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
13 | Carl Pixley, Vigyan Singhal |
Model Checking: A Hardware Design Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 2(3), pp. 288-306, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Automated mathematical methods, Model checking, Formal Verification, Binary decision diagrams, Integrated circuits, Hardware verification |
13 | Octavian-Dumitru Mocanu, Joan Oliver |
Fault-Tolerant Memory Architecture Against Radiation-Dependent Errors: A Mixed Error Control Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 14(1-2), pp. 169-180, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
hamming SEC code, latch-up, memory system, single event upset, built-in current sensor |
13 | M. Giangi, Daniela Mansutti, G. Richelli |
Steady 3D Flow Configurations for the Horizontal Thermal Convection with Thermocapillary Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Sci. Comput. ![In: J. Sci. Comput. 14(2), pp. 179-195, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Numerical simulation, Navier-Stokes, heat-transfer, convection |
13 | Theo A. C. M. Claasen |
The Changing Semiconductor Industry: From Components to Silicon Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1008-, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
13 | Hoda S. Abdel-Aty-Zohdy, Mahmoud Al-Nsour |
Digital Neural Processing Unit for Electronic Nose. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 236-237, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Neural Networks, Reinforcement Learning, ASIC, Digital Design, Electronic Nose |
13 | Hugo De Man |
Design Technology Research and Education for Deep-Submicron Systems of the Next Century. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 8-15, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
13 | Azeez J. Bhavnagarwala, Blanca Austin, James D. Meindl |
Minimum supply voltage for bulk Si CMOS GSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 100-102, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
13 | Xinghai Tang, Vivek De, James D. Meindl |
Intrinsic MOSFET parameter fluctuations due to random dopant placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 5(4), pp. 369-376, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
13 | Wayne Wei-Ming Dai |
Chip Parasitic Extraction and Signal Integrity Verification (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 717-719, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
13 | Aurelio Pellegrini, Luigi Colalongo, Marina Valdinoci, Massimo Rudan |
AC analysis of amorphous silicon devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(11), pp. 1324-1331, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
13 | Steven D. Millman |
Improving quality: Yield versus test coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 5(2-3), pp. 253-261, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
quality, Fault modeling, yield, test economics, physical defects |
13 | Gerhard K. M. Wachutka |
Rigorous thermodynamic treatment of heat generation and conduction in semiconductor device modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(11), pp. 1141-1149, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
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