Search results for "SRAM"

Hits ?▲	Authors	Title	Venue	Year	Link
11	Zihao Xuan, Chang Liu, Yue Zhang, Yuan Li, Yi Kang	A Brain-Inspired ADC-Free SRAM-Based In-Memory Computing Macro With High-Precision MAC for AI Application.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
11	Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li	FAST: A Fully-Concurrent Access SRAM Topology for High Row-Wise Parallelism Applications Based on Dynamic Shift Operations.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
11	Eunhwan Kim, Hyunmyung Oh, Nameun Kang, Jihoon Park, Jae-Joon Kim	A Capacitive Computing-In-Memory Circuit With Low Input Loading SRAM Bitcell and Adjustable ADC Input Range.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
11	Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Jiahao Song, Haoyang Luo, Xin'an Wang, Yuan Wang 0001	A 28nm 32Kb SRAM Computing-in-Memory Macro With Hierarchical Capacity Attenuator and Input Sparsity-Optimized ADC for 4b Mac Operation.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
11	Sunrui Zhang, Xiaole Cui, Feng Wei, Xiaoxin Cui	An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array.	IEEE Trans. Computers	2023	DBLP DOI BibTeX RDF
11	Seyed Hassan Hadi Nemati, Nima Eslami, Mohammad Hossein Moaiyeri	A look-up table-based processing-in-SRAM architecture for energy-efficient search applications.	Comput. Electr. Eng.	2023	DBLP DOI BibTeX RDF
11	Juan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Guillaume Hubert, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente	SEE sensitivity of a COTS 28-nm SRAM-based FPGA under thermal neutrons and different incident angles.	Microprocess. Microsystems	2023	DBLP DOI BibTeX RDF
11	Gopavaram Suneel Kumar, Gannera Mamatha	Improved Read/Write Stability-Based Level Shift 5T Ternary SRAM Cell Design Using Enhanced Gate Diffusion Input BWGCNTFET.	J. Circuits Syst. Comput.	2023	DBLP DOI BibTeX RDF
11	M. Elangovan, G. Saravanan, S. Jayanthi, P. Raja, Kulbhushan Sharma, S. Nireshkumar	High-Stability and High-Speed 11T CNTFET SRAM Cell for MIMO Applications.	J. Circuits Syst. Comput.	2023	DBLP DOI BibTeX RDF
11	Taehwan Yoon, Hanwool Jeong	Machine Learning-Based Read Access Yield Estimation and Design Optimization for High-Density SRAM.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Aiman Zakwan Jidin, Razaidi Hussin, Lee Weng Fook, Mohd Syafiq Mispan, Nor Azura Zakaria, Loh Wan Ying, Norshuhani Zamin	Generation of New Low-Complexity March Algorithms for Optimum Faults Detection in SRAM.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Fengbin Tu, Yiqi Wang 0005, Ling Liang, Yufei Ding, Leibo Liu, Shaojun Wei, Shouyi Yin, Yuan Xie 0001	SDP: Co-Designing Algorithm, Dataflow, and Architecture for In-SRAM Sparse NN Acceleration.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Rui Li, Heng Yu 0001, Lin Li, Yajun Ha	Criticality-Aware Negotiation-Driven Scrubbing Scheduling for Reliability Maximization in SRAM-Based FPGAs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Shan Shen, Peng Cao 0002, Ming Ling, Longxing Shi	A Timing Yield Model for SRAM Cells at Sub/Near-Threshold Voltages Based on a Compact Drain Current Model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Rui Xu 0013, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yuhong Song, Han Wang, Liang Shi	Optimizing Data Placement for Hybrid SRAM+Racetrack Memory SPM in Embedded Systems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Na Bai, Zihan Chen, Yaohua Xu, Yi Wang, Yueliang Zhou, Zeyuan Lin	Design of SEU and DNU-resistant SRAM cells based on polarity reinforcement feature.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
11	Qiang Zhao 0007, Hanwen Dong, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Junning Chen, Xiulong Wu	Write-enhanced and radiation-hardened SRAM for multi-node upset tolerance in space-radiation environments.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
11	Zhongyang Liu, Yuqiao Xie, Tao Xu, Qing Liu, Dawei Bi, Zhiyuan Hu, Shichang Zou, Zhengxuan Zhang	A highly stable and low-cost 12T radiation hardened SRAM cell design for aerospace application.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
11	Doaa K. Abdelrahman, Mohammed E. Fouda, Ihsen Alouani, Lobna A. Said, Ahmed G. Radwan	Ternary SRAM circuit designs with CNTFETs.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
11	Zhaoyang Zhang, Jinwu Chen, Xi Chen, An Guo, Bo Wang, Tianzhu Xiong, Yuyao Kong, Xingyu Pu, Shengnan He, Xin Si, Jun Yang 0006	From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits.	Sci. China Inf. Sci.	2023	DBLP DOI BibTeX RDF
11	Shuang Liu, Junjie Wang 0008, Jingtao Zhou, Shaogang Hu, Qi Yu 0002, Tupei Chen, Yang Liu 0062	An Area- and Energy-Efficient Spiking Neural Network With Spike-Time-Dependent Plasticity Realized With SRAM Processing-in-Memory Macro and On-Chip Unsupervised Learning.	IEEE Trans. Biomed. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Hariprasath Manoharan, N. Satheesh Kumar, P. Janardhan Saikumar, M. Venkatesan, A. Balamanikandan, K. Venkatachalam	Analyzing the Effect of Uncertainty in Low Power SRAM Cells Using Artificial Intelligence Technique.	J. Uncertain Syst.	2023	DBLP DOI BibTeX RDF
11	K. Sarath Chandra, Kakarla Hari Kishore 0002	Design and Analysis of Low Power FinFET SRAM with Leakage Current Reduction Techniques.	Wirel. Pers. Commun.	2023	DBLP DOI BibTeX RDF
11	Venkatesham Maddela, Sanjeet Kumar Sinha, Muddapu Parvathi, Vinay Sharma	Comparative Analysis of Open and Short Defects in Embedded SRAM Using Parasitic Extraction Method for Deep Submicron Technology.	Wirel. Pers. Commun.	2023	DBLP DOI BibTeX RDF
11	T. Santosh Kumar, Suman Lata Tripathi	Low Power and Suppressed Noise 6T, 7T SRAM Cell Using 18 nm FinFET.	Wirel. Pers. Commun.	2023	DBLP DOI BibTeX RDF
11	K. Gavaskar, P. Sivaranjani, S. Elango, G. Nirmal Raja	Low-Power SRAM Cell and Array Structure in Aerospace Applications: Single-Event Upset Impact Analysis.	Wirel. Pers. Commun.	2023	DBLP DOI BibTeX RDF
11	Bashir M. Sabquat Bahar Talukder, Farah Ferdaus, Md. Tauhidur Rahman 0001	A Noninvasive Technique to Detect Authentic/Counterfeit SRAM Chips.	ACM J. Emerg. Technol. Comput. Syst.	2023	DBLP DOI BibTeX RDF
11	Aibin Yan, Jing Xiang, Yang Chang, Zhengfeng Huang, Jie Cui 0004, Patrick Girard 0001, Xiaoqing Wen	Two sextuple cross-coupled SRAM cells with double-node-upset protection and cost optimization for aerospace applications.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Sandeep Kumar, Atin Mukherjee 0001	High performance radiation-hardened SRAM cell design for robust applications.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Anil Kumar Rajput, Manisha Pattanaik	Local bit line 8T SRAM based in-memory computing architecture for energy-efficient linear error correction codec implementation.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Xinhao Li, Huilong Zhu, Zhenzhen Kong, Qi Wang 0041, Yongkui Zhang, Zhenhua Wu	On the SRAM with comb-shaped nano FETs advancing to 3 nm node and beyond.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Syed Farah Naz, Ambika Prasad Shah, Neha Gupta	Leakage power attack resilient Schmitt trigger based 12T symmetric SRAM cell.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Shuo Cai, Yan Wen, Jiangbiao Ouyang, Weizheng Wang, Fei Yu 0009, Bo Li 0051	A highly reliable and low-power cross-coupled 18T SRAM cell.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Chenghu Dai, Yuanyuan Du, Qi Shi, Ruixuan Wang, Hao Zheng, Wenjuan Lu, Chunyu Peng, Licai Hao, Zhiting Lin, Xiulong Wu	Bit-line leakage current tracking and self-compensation circuit for SRAM reliability design.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Sameer Yadav, P. N. Kondekar, Bhaskar Awadhiya	Performance estimation of non-hysteretic negative capacitance FinFET based SRAM.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Damyanti Singh, Neeta Pandey, Kirti Gupta	Process invariant Schmitt Trigger non-volatile 13T1M SRAM cell.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Sharvani Gadgil, Goli Naga Sandesh, Chetan Vudadha	Power efficient designs of CNTFET-based ternary SRAM.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi	A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
11	Bhawna Rawat, Poornima Mittal	A Switching NMOS Based Single Ended Sense Amplifier for High Density SRAM Applications.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
11	Bhawna Rawat, Poornima Mittal	A Reconfigurable 7T SRAM Bit Cell for High Speed, Power Saving and Low Voltage Application.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
11	Ayush Dahiya, Poornima Mittal, Rajesh Rohilla	Modified Decoupled Sense Amplifier with Improved Sensing Speed for Low-Voltage Differential SRAM.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
11	Pushkar Praveen, R. K. Singh	Design of Enhanced Reversible 9T SRAM Design for the Reduction in Sub-threshold Leakage Current with14nm FinFET Technology.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
11	Md. Abdullah-Al Kaiser, Edwin Tieu, Ajey P. Jacob, Akhilesh R. Jaiswal	A Context-Switching/Dual-Context ROM Augmented RAM using Standard 8T SRAM.	CoRR	2023	DBLP DOI BibTeX RDF
11	Pouya Houshmand, Jiacong Sun, Marian Verhelst	Benchmarking and modeling of analog and digital SRAM in-memory computing architectures.	CoRR	2023	DBLP DOI BibTeX RDF
11	Zihan Yin, Annewsha Datta, Shwetha Vijayakumar, Ajey P. Jacob, Akhilesh R. Jaiswal	A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation.	CoRR	2023	DBLP DOI BibTeX RDF
11	Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka	OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration.	CoRR	2023	DBLP DOI BibTeX RDF
11	Abhiroop Bhattacharjee, Abhishek Moitra, Priyadarshini Panda	HyDe: A Hybrid PCM/FeFET/SRAM Device-search for Optimizing Area and Energy-efficiencies in Analog IMC Platforms.	CoRR	2023	DBLP DOI BibTeX RDF
11	Cenlin Duan, Jianlei Yang 0001, Xiaolin He, Yingjie Qi, Yikun Wang, Yiou Wang, Ziyan He, Bonan Yan, Xueyan Wang, Xiaotao Jia, Weitao Pan, Weisheng Zhao	DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory.	CoRR	2023	DBLP DOI BibTeX RDF
11	Leandro Lanzieri, Peter Kietzmann, Görschwin Fey, Holger Schlarb, Thomas C. Schmidt	Ageing Analysis of Embedded SRAM on a Large-Scale Testbed Using Machine Learning.	CoRR	2023	DBLP DOI BibTeX RDF
11	Shan Shen, Hao Xu, Yongliang Zhou, Ming Ling, Wenjian Yu	Ultra8T: A Sub-Threshold 8T SRAM with Leakage Detection.	CoRR	2023	DBLP DOI BibTeX RDF
11	Zain Ul Abideen 0002, Rui Wang, Tiago Diadami Perez, Geert Jan Schrijen, Samuel Pagliarini	Impact of Orientation on the Bias of SRAM-Based PUFs.	CoRR	2023	DBLP DOI BibTeX RDF
11	Mark Pupilli	Towards Neural Path Tracing in SRAM.	CoRR	2023	DBLP DOI BibTeX RDF
11	Yanfang Liu, Guohao Dai, Wei W. Xing	Seeking the Yield Barrier: High-Dimensional SRAM Evaluation Through Optimal Manifold.	CoRR	2023	DBLP DOI BibTeX RDF
11	Jingyao Zhang 0002, Mohsen Imani, Elaheh Sadredini	BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication.	CoRR	2023	DBLP DOI BibTeX RDF
11	Xiaomeng Wang, Fengshi Tian, Xizi Chen, Jiakun Zheng, Xuejiao Liu, Fengbin Tu, Jie Yang 0033, Mohamad Sawan, Kwang-Ting Cheng, Chi-Ying Tsui	A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications.	CoRR	2023	DBLP DOI BibTeX RDF
11	Luk Burchard, Max Xiaohang Zhao, Johannes Langguth, Aydin Buluç, Giulia Guidi	Space Efficient Sequence Alignment for SRAM-Based Computing: X-Drop on the Graphcore IPU.	CoRR	2023	DBLP DOI BibTeX RDF
11	Duy-Thanh Nguyen, Abhiroop Bhattacharjee, Abhishek Moitra, Priyadarshini Panda	MCAIMem: a Mixed SRAM and eDRAM Cell for Area and Energy-efficient on-chip AI Memory.	CoRR	2023	DBLP DOI BibTeX RDF
11	Deniz Najafi, Mehrdad Morsali, Ranyang Zhou, Arman Roohi, Andrew Marshall, Durga Misra, Shaahin Angizi	Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design.	CoRR	2023	DBLP DOI BibTeX RDF
11	Lorenzo Sonnino, Shaswot Shresthamali, Yuan He 0002, Masaaki Kondo	DAISM: Digital Approximate In-SRAM Multiplier-based Accelerator for DNN Training and Inference.	CoRR	2023	DBLP DOI BibTeX RDF
11	M. V. Nageswara Rao, Mamidipaka Hema, Ramakrishna Raghutu, Ramakrishna S. S. Nuvvula, Polamarasetty P. Kumar, Ilhami Colak, Baseem Khan	Design and Development of Efficient SRAM Cell Based on FinFET for Low Power Memory Applications.	J. Electr. Comput. Eng.	2023	DBLP DOI BibTeX RDF
11	Mingkai Liu, Haohua Que, Xinghua Yang, Kaitong Zhang, Qingyang Yu, Lingxiao Yan, Tong Wang, Yu Jin, Ni Zhou	A Selective Bit Dropping and Encoding Co-Strategy in Image Processing for Low-Power Design in DRAM and SRAM.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Abhiroop Bhattacharjee, Abhishek Moitra, Priyadarshini Panda	HyDe: A brid PCM/FeFET/SRAM vice-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Kavitha Soundrapandiyan, Santosh Kumar Vishvakarma, Bhupendra Singh Reniwal	Enabling Energy-Efficient In-Memory Computing With Robust Assist-Based Reconfigurable Sense Amplifier in SRAM Array.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Tadayoshi Enomoto, Nobuaki Kobayashi	Single-Power-Supply Six-Transistor CMOS SRAM Enabling Low-Voltage Writing, Low-Voltage Reading, and Low Standby Power Consumption.	IEICE Trans. Electron.	2023	DBLP DOI BibTeX RDF
11	Sargunam Thirugnanam, Lim Way Soong, Chinnaraj Munirathina Prabhu, Ajay Kumar Singh	Energy-Efficient and Variability-Resilient 11T SRAM Design Using Data-Aware Read-Write Assist (DARWA) Technique for Low-Power Applications.	Sensors	2023	DBLP DOI BibTeX RDF
11	Zihao Yang, Minghui Yin, Yunxia You, Zhiqiang Li, Xin Liu, Weihua Zhang	Design of a high performance CNFET 10T SRAM cell at 5nm technology node.	IEICE Electron. Express	2023	DBLP DOI BibTeX RDF
11	Licai Hao, Bin Qiang, Chenghu Dai, Chunyu Peng, Wenjuan Lu, Zhiting Lin, Li Liu, Qiang Zhao 0007, Xiulong Wu, Fei Sun	Radiation-hardened 14T SRAM cell by polar design for space applications.	IEICE Electron. Express	2023	DBLP DOI BibTeX RDF
11	Jinzhi Lai, Jueping Cai, Jie Chu	A congestion-aware hybrid SRAM and STT-RAM buffer design for network-on-chip router.	IEICE Electron. Express	2023	DBLP DOI BibTeX RDF
11	Christian Fibich, Martin Horauer, Roman Obermaisser	Characterization of Interconnect Fault Effects in SRAM-based FPGAs.	DDECS	2023	DBLP DOI BibTeX RDF
11	Po-Chih Chen, Yi-Ting Wu, Meng-Hsueh Chiang	Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs.	ESSDERC	2023	DBLP DOI BibTeX RDF
11	Ji Wu, Kazuteru Namba	SRAM-based efficiency memory model for quantized convolutional neural networks.	ICCE-Taiwan	2023	DBLP DOI BibTeX RDF
11	Anoop Gopinath, Trond Ytterdal, Avinash Yadav, John J. Lee 0001, Maher E. Rizkalla, Mukesh Kumar	SRAM Vmin Scaling via Negative Wordline.	MWSCAS	2023	DBLP DOI BibTeX RDF
11	Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis 0001, François Rivet	A MCU-robust Interleaved Data/Detection SRAM for Space Environments.	ISVLSI	2023	DBLP DOI BibTeX RDF
11	Baiqing Zhong, Mingyu Wang, Chuanghao Zhang, Yangzhan Mai, Xiaojie Li, Zhiyi Yu	A Digital SRAM Computing-in-Memory Design Utilizing Activation Unstructured Sparsity for High-Efficient DNN Inference.	ISVLSI	2023	DBLP DOI BibTeX RDF
11	Sagheer Ahmed, Jayesh Ambulkar, Debabrata Mondal, Ambika Prasad Shah	Soft Error Immune with Enhanced Critical Charge SIC14T SRAM Cell for Avionics Applications.	VLSI-SoC	2023	DBLP DOI BibTeX RDF
11	Shayesteh Masoumian, Roel Maes, Rui Wang, Karthik Keni Yerriswamy, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil	Modeling and Analysis of SRAM PUF Bias Patterns in 14nm and 7nm FinFET Technology Nodes.	VLSI-SoC	2023	DBLP DOI BibTeX RDF
11	Grégoire Eggermann, Marco Rios, Giovanni Ansaloni, Sani R. Nassif, David Atienza	A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication.	VLSI-SoC	2023	DBLP DOI BibTeX RDF
11	Vazgen Melikyan, Armen Petrosyan	Physical Design of 6T Cell of SRAM Devices and Comparative Analysis of Layout.	EWDTS	2023	DBLP DOI BibTeX RDF
11	Oleg Petrosyan, Arman Manukyan	Functional Verification of Multiport SRAM Memories Based on UVM.	EWDTS	2023	DBLP DOI BibTeX RDF
11	Rakesh Ranjan, Pavitra Ramadevi Perepa, Ki-Don Lee, Hokyung Park, Peter Kim, Ganesh Chakravarthy Yerubandi, Jon Haefner, Caleb Dongkyun Kwon, Minjung Jin, Wenhao Zhou, Hyewon Shim, Shin-Young Chung	Impact of Barrier Metal Thickness on SRAM Reliability.	IRPS	2023	DBLP DOI BibTeX RDF
11	Taiki Uemura, Byungjin Chung, Shin-Young Chung, Seungbae Lee, Yuchul Hwang, Sangwoo Pae	Impact of Design and Process on Alpha-Induced SER in 4 nm Bulk-FinFET SRAM.	IRPS	2023	DBLP DOI BibTeX RDF
11	Christian Fibich, Martin Horauer, Roman Obermaisser	Bitstream- Level Interconnect Fault Characterization for SRAM-based FPGAs.	DATE	2023	DBLP DOI BibTeX RDF
11	Jianan Mu, Huajie Tan, Jiawen Wu, Haotian Lu, Chip-Hong Chang, Shuai Chen, Shengwen Liang, Jing Ye 0001, Huawei Li 0001, Xiaowei Li 0001	Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array.	DATE	2023	DBLP DOI BibTeX RDF
11	Kailash Prasad, Aditya Biswas, Arpita Kabra, Joycee Mekie	PIC-RAM: Process-Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM.	DATE	2023	DBLP DOI BibTeX RDF
11	Mahta Mayahinia, Hsiao-Hsuan Liu, Subrat Mishra, Zsolt Tokei, Francky Catthoor, Mehdi B. Tahoori	Electromigration-aware design technology co-optimization for SRAM in advanced technology nodes.	DATE	2023	DBLP DOI BibTeX RDF
11	Leandro Lanzieri, Peter Kietzmann, Görschwin Fey, Holger Schlarb, Thomas C. Schmidt	Ageing Analysis of Embedded SRAM on a Large-Scale Testbed Using Machine Learning.	DSD	2023	DBLP DOI BibTeX RDF
11	Yiran Zhang, Bo Wang, Jinwu Chen, Xi Chen, Xin Si	Evaluation Model for Current-Domain SRAM-based Computing-in-Memory Circuits.	MCSoC	2023	DBLP DOI BibTeX RDF
11	L. Ammoura, Marie-Lise Flottes, Patrick Girard 0001, Jean-Philippe Noel, Arnaud Virazel	Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture.	ETS	2023	DBLP DOI BibTeX RDF
11	Bruno E. Forlin, Wouter van Huffelen, Carlo Cazzaniga, Paolo Rech, Nikolaos Alachiotis 0001, Marco Ottavi	An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds?	ETS	2023	DBLP DOI BibTeX RDF
11	Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory di Pendina, Patrick Girard 0001, Arnaud Virazel	On Using Cell-Aware Methodology for SRAM Bit Cell Testing.	ETS	2023	DBLP DOI BibTeX RDF
11	Hyungyo Kim, Naresh R. Shanbhag	Boosting the Accuracy of SRAM-Based in-Memory Architectures Via Maximum Likelihood-Based Error Compensation Method.	ICASSP	2023	DBLP DOI BibTeX RDF
11	Zhaojun Lu, Qi Zhao, Qidong Chen, Jiliang Zhang 0002	A Survey on Fault-Tolerance Methods for SRAM-Based FPGAs in Radiation Environments.	ATS	2023	DBLP DOI BibTeX RDF
11	Wootack Kim, Minkyu Shim, Hyunwoo Jung, Youngki Lee	Aggressive SRAM Voltage Scaling and Error Mitigation for Approximate DNN Inference.	SmartWear@MobiCom	2023	DBLP DOI BibTeX RDF
11	Praveen Tiwari, RK Jarial, Gagnesh Kumar	Design and Comparative analysis of 6T and 7T SRAM Cells for Improved TREAD and TWRITE Noise Margins.	ICEIC	2023	DBLP DOI BibTeX RDF
11	Seungnam Han, Jeein Kim, Haewon Lee, Euiseok Hwang	Signature Analysis of SRAM-PUF for IoT Decentralized Identifier in Large-Scale Networks.	ICUFN	2023	DBLP DOI BibTeX RDF
11	Cleiton Magano Marques, Leonardo Heitich Brendler, Frédéric Wrobel, Alexandra L. Zimpeck, Walter E. Calienes Bartra, Paulo F. Butzen, Cristina Meinhardt	A Detailed Electrical Analysis of SEE on 28 nm FDSOI SRAM Architectures.	SBCCI	2023	DBLP DOI BibTeX RDF
11	Christina Dilopoulou, Yiorgos Tsiatouhas	BTI Aging Influence in SRAM-based In-Memory Computing Schemes and its Mitigation.	ICECS	2023	DBLP DOI BibTeX RDF
11	Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis 0001, François Rivet	A Tool for Automatic Radiation-Hardened SRAM Layout Generation.	ICECS	2023	DBLP DOI BibTeX RDF
11	Berke Akgül, Tufan Coskun Karalar	An Activity Factor List for Energy Consumption of SRAM-based CIM Architectures.	ICECS	2023	DBLP DOI BibTeX RDF
11	Lorenzo Stevenazzi, Andrea Baschirotto, Marcello De Matteis	Static Noise Margin in 16 nm FinFET 6T and 8T SRAM Cells for Compute-in-Memory.	ICECS	2023	DBLP DOI BibTeX RDF