Search results for "SOI"

Hits ?▲	Authors	Title	Venue	Year	Link
13	M. Saliva, Florian Cacho, Vincent Huard, X. Federspiel, D. Angot, Ahmed Benhassain, Alain Bravaix, Lorena Anghel	Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI.	DATE	2015	DBLP BibTeX RDF
13	Gregor Sievers, Julian Daberkow, Johannes Ax, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert 0001	Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI.	MCSoC	2015	DBLP DOI BibTeX RDF
13	Masahide Goto, Kei Hagiwara, Yoshinori Iguchi, Hiroshi Ohtake, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto	Three-dimensional integrated circuits and stacked CMOS image sensors using direct bonding of SOI layers.	3DIC	2015	DBLP DOI BibTeX RDF
13	Matthieu Deloge, Arnoud P. van der Wel, Shishir Goyal, Gerald Kwakernaat, Adrien Schoof	A highly-digitized automotive CAN transceiver in 0.14µm high-voltage SOI CMOS.	EMC Compo	2015	DBLP DOI BibTeX RDF
13	Adam Teman, Davide Rossi, Pascal Andreas Meinerzhagen, Luca Benini, Andreas Peter Burg	Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI.	ASP-DAC	2015	DBLP DOI BibTeX RDF
13	Vadim A. Shakhnov, Lyudmila Zinchenko, Vladimir Makarchuk, Vladimir Verstov	Visual analytics support for the SOI VLSI layout design for multiple patterning technology.	CogInfoCom	2015	DBLP DOI BibTeX RDF
13	Hourieh Attarzadeh, Snorre Aunet, Trond Ytterdal	An ultra-low-power/high-speed 9-bit adder design: Analysis and comparison Vs. technology from 130nm-LP to UTBB FD-SOI-28nm.	NORCAS	2015	DBLP DOI BibTeX RDF
13	Hasene Gulperi Ozsema, Duygu Kostak, Tugba Demirci, Yusuf Leblebici	Full swing 20 GHz frequency divider with 1 V supply voltage in FD-SOI 28 nm technology.	NORCAS	2015	DBLP DOI BibTeX RDF
13	Barend van Liempd, Saneaki Ariumi, Ewout Martens, Shih-Hung Chen, Piet Wambacq, Jan Craninckx	A 0.7-1.15GHz complementary common-gate LNA in 0.18μm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD protection.	ESSCIRC	2015	DBLP DOI BibTeX RDF
13	Fady Abouzeid, Sylvain Clerc, Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Damien Croain, Gilles Gasiot, Dimitri Soussan, Philippe Roche	28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors.	ESSCIRC	2015	DBLP DOI BibTeX RDF
13	Alexander Fritsch, Michael Kugel, Rolf Sautter, Dieter F. Wendel, Juergen Pille, Otto A. Torreiter, Shankar Kalyanasundaram, Daniel A. Dobson	A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reduction.	ESSCIRC	2015	DBLP DOI BibTeX RDF
13	Pengcheng Li, Xiaoying Li, Enfu Li, Qiang Shen, Honglong Chang	Design and fabrication of an in-plane SOI MEMS accelerometer with a high yield rate.	NEMS	2015	DBLP DOI BibTeX RDF
13	Joan Mauricio, Francesc Moll	Local variations compensation with DLL-based Body Bias Generator for UTBB FD-SOI technology.	NEWCAS	2015	DBLP DOI BibTeX RDF
13	Hélène Moffet, Claude Vincent, Didier Saey, Valérie Coats, François Routhier, Fanny Choinière, François Comeau	Users' Perception and Readiness of the eChez-Soi In-Home Telerehabilitation Platform.	AAATE Conf.	2015	DBLP DOI BibTeX RDF
13	Behzad Dehlaghi, Anthony Chan Carusone	A 20 Gb/s 0.3 pJ/b single-ended die-to-die transceiver in 28 nm-SOI CMOS.	CICC	2015	DBLP DOI BibTeX RDF
13	Mayank Raj, Manuel Monge, Azita Emami	A 20Gb/s 0.77pJ/b VCSEL transmitter with nonlinear equalization in 32nm SOI CMOS.	CICC	2015	DBLP DOI BibTeX RDF
13	Dongseok Shin, Sanjay Raman, Kwang-Jin Koh	A 0.6-V, 30-GHz six-phase VCO with superharmonic coupling in 32-nm SOI CMOS technology.	CICC	2015	DBLP DOI BibTeX RDF
13	Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Koji Nii, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto	A 298-fJ/writecycle 650-fJ/readcycle 8T three-port SRAM in 28-nm FD-SOI process technology for image processor.	CICC	2015	DBLP DOI BibTeX RDF
13	Timothy O. Dickson, Yong Liu 0023, Ankur Agrawal, John F. Bulzacchelli, Herschel A. Ainspan, Zeynep Toprak Deniz, Benjamin D. Parker, Mounir Meghelli, Daniel J. Friedman	A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration.	CICC	2015	DBLP DOI BibTeX RDF
13	Johannes Maximilian Kühn, Hideharu Amano, Oliver Bringmann 0001, Wolfgang Rosenstiel	Fined-grained body biasing for frequency scaling in advanced SOI processes.	COOL Chips	2015	DBLP DOI BibTeX RDF
13	Aurelien Larie, Eric Kerherve, Baudouin Martineau, Lionel Vogt, Didier Belot	2.10 A 60GHz 28nm UTBB FD-SOI CMOS reconfigurable power amplifier with 21% PAE, 18.2dBm P1dB and 74mW PDC.	ISSCC	2015	DBLP DOI BibTeX RDF
13	Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta	5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply.	ISSCC	2015	DBLP DOI BibTeX RDF
13	Barend van Liempd, Benjamin P. Hershberg, Kuba Raczkowski, Saneaki Ariumi, Udo Karthaus, Karl-Frederik Bink, Jan Craninckx	2.2 A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18um SOI CMOS.	ISSCC	2015	DBLP DOI BibTeX RDF
13	Toke Meyer Andersen, Florian Krismer, Johann Walter Kolar, Thomas Toifl, Christian Menolfi, Lukas Kull, Thomas Morf, Marcel A. Kossel, Matthias Braendli, Pier Andrea Francese	20.3 A feedforward controlled on-chip switched-capacitor voltage regulator delivering 10W in 32nm SOI CMOS.	ISSCC	2015	DBLP DOI BibTeX RDF
13	Mark A. Ferriss, Bodhisatwa Sadhu, Alexander V. Rylyakov, Herschel A. Ainspan, Daniel J. Friedman	10.9 A 13.1-to-28GHz fractional-N PLL in 32nm SOI CMOS with a ΔΣ noise-cancellation scheme.	ISSCC	2015	DBLP DOI BibTeX RDF
13	Yanfei Chen, Masaya Kibune, Asako Toda, Akinori Hayakawa, Tomoyuki Akiyama, Shigeaki Sekiguchi, Hiroji Ebe, Nobuhiro Imaizumi, Tomoyuki Akahoshi, Suguru Akiyama, Shinsuke Tanaka, Takasi Simoyama, Ken Morito, Takuji Yamamoto, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura	22.2 A 25Gb/s hybrid integrated silicon photonic transceiver in 28nm CMOS and SOI.	ISSCC	2015	DBLP DOI BibTeX RDF
13	Xiaoyang Mi, Debashis Mandal, Visvesh S. Sathe 0001, Bertan Bakkaloglu, Jae-sun Seo	Fully-integrated switched-capacitor voltage regulator with on-chip current-sensing and workload optimization in 32nm SOI CMOS.	ISLPED	2015	DBLP DOI BibTeX RDF
13	Alessandro Cevrero, Cosimo Aprile, Pier Andrea Francese, U. Bapst, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Lukas Kull, Hazar Yueksel, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher, Thomas Toifl	A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS.	VLSIC	2015	DBLP DOI BibTeX RDF
13	Chen Sun 0003, Mark T. Wade, Michael Georgas, Sen Lin, Luca Alloatti, Benjamin Moss, Rajesh Kumar, Amir Atabaki, Fabio Pavanello, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic	A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning.	VLSIC	2015	DBLP DOI BibTeX RDF
13	Holger Kappert, Norbert Kordas, Stefan Dreiner, Uwe Paschen, Rainer Kokozinski	High temperature SOI CMOS technology and circuit realization for applications up to 300°C.	ISCAS	2015	DBLP DOI BibTeX RDF
13	Gregor Sievers, Johannes Ax, Nils Kucza, Martin Flasskamp, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rückert 0001	Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI.	ISCAS	2015	DBLP DOI BibTeX RDF
13	Nisrina Abdo, Magali Estribeau, Pierre Magnan, Denis Sallin, Adil Koukab, Maher Kayal	Optical effect considerations for bulk to SOI retargeting of hybrid MOS-PN dynamic photo-sensor.	IWASI	2015	DBLP DOI BibTeX RDF
13	Mengyuan Ye, Yuchan Luo, Yu Yu, Weili Yang, Jinghui Zou, Chaotan Sima, Xinliang Zhang	SOI based photonic interconnection for multi-dimensional multiplexed system.	OFC	2015	DBLP BibTeX RDF
13	Gyeong Cheol Park, Weiqi Xue, Elizaveta Semenova, Kresten Yvind, Jesper Mørk, Il-Sug Chung	III-V/SOI vertical cavity laser with in-plane output into a Si waveguide.	OFC	2015	DBLP BibTeX RDF
13	Trung-Hien Nguyen, Mathilde Gay, Laurent Bramerie, Kevin Lengle, Christophe Peucheret, Olivier Sentieys, Jean-Claude Simon, Alexandre Bazin, Rama Raj, Fabrice Raineri	Nonlinear phase noise reduction for 20-Gbit/s NRZ-QPSK signals using InP on SOI photonic crystal nanocavity.	OFC	2015	DBLP DOI BibTeX RDF
13	Ying Huang, Xiaoguang Tu, Andy Eu-Jin Lim, Junfeng Song, Tsung-Yang Liow, Guo-Qiang Lo	Ultra-low loss CMOS compatible multi-layer Si3N4-on-SOI platform for 1310nm wavelength.	OFC	2015	DBLP BibTeX RDF
13	K. Vyrsokinos, Christos Vagionas, Charoula Mitsolidou, Matteo Cherchi, Mikko Harjanne, S. Ylinen, Markku Kapulainen, Timo Aalto, Amalia N. Miliou	DPSK-demodulation based on ultra-compact micron-scale SOI platform.	OFC	2015	DBLP BibTeX RDF
13	Dries Van Thourhout, Martijn Tassaert, Peter De Heyn, Oded Raz, Nicola Calabretta, Harm J. S. Dorren, Gunther Roelkens	Photonic subsystems for optical packet/burst switches based on heterogeneous SOI and III-V integration.	OFC	2015	DBLP BibTeX RDF
13	Xiaojun Xie, Qiugui Zhou, Erik Norberg, Matt Jacob-Mitos, Yaojia Chen, Anand Ramaswamy, Gregory Fish, John E. Bowers 0001, Joe Campbell, Andreas Beling	Heterogeneously integrated waveguide-coupled photodiodes on SOI with 12 dBm output power at 40 GHz.	OFC	2015	DBLP BibTeX RDF
13	Shashank Gupta, Srinivasan Ashwyn Srinivasan, Marianna Pantouvaki, Hongtao Chen, Peter Verheyen, Guy Lepage, Dries Van Thourhout, Gunther Roelkens, Krishna Saraswat, Philippe P. Absil, Joris Van Campenhout	50GHz Ge waveguide electro-absorption modulator integrated in a 220nm SOI photonics platform.	OFC	2015	DBLP DOI BibTeX RDF
13	Thuy Dao, Mu-Ling Ger, Jiangkai Zuo	Characterization of onset tunneling voltage (Vonset) walkout in high-voltage deep trench isolation on SOI.	ICICDT	2015	DBLP DOI BibTeX RDF
13	M. Akbal, G. Ribes, M. Guillermet, L. Vallier	Plasma induced damage investigation in the fully depleted SOI technology.	ICICDT	2015	DBLP DOI BibTeX RDF
13	Carlos Viale, Pablo A. Petrashin, Luis E. Toledo, Walter J. Lancioni, Carlos Daniel Vázquez	Single event effects in an analog SOI transconductor: a case study.	LATS	2015	DBLP DOI BibTeX RDF
13	Jiang Bingjian, Junli Sheng, Zhangwen Tang	PDK design of 0.13um SOI process.	ASICON	2015	DBLP DOI BibTeX RDF
13	Xin Zhou, Ming Qiao, Yang Li, Zhaoji Li, Bo Zhang 0027	Effect of field implantation on off- and on-state characteristics for thin layer SOI field P-channel LDMOS.	ASICON	2015	DBLP DOI BibTeX RDF
13	C. Qian, Mao-Lin Shi, Lin Chen, Qing-Qing Sun, Peng Zhou, S. J. Ding, D. W. Zhang	Investigation of self-heating effect in SOI tunnel field-effect transistor.	ASICON	2015	DBLP DOI BibTeX RDF
13	Junli Sheng, Bingjian Jiang, Zhangwen Tang	A high PSR SOI current-mode bandgap reference.	ASICON	2015	DBLP DOI BibTeX RDF
13	Bin Wang, Yun Zeng, Guoli Li, Yu Xia, Hui Xu, Caixia Huang	Analysis and Simulation of Temperature Characteristic of Sensitivity for SOI Lateral PIN Photodiode Gated by Transparent Electrode.	NCCET	2015	DBLP DOI BibTeX RDF
13	Hélène Moffet, Didier Saey, Valérie Coats, Claude Vincent, Fanny Choinière, François Comeau	Reliability and Usability of the eChez-Soi In-home Telerehabilitation Platform: A New Internet-based Communication and Real-time Monitoring Software Solution Combined with Interactive Exercises - Results of a Longitudinal Pilot Study in Four Patients with Lung Cancer.	ICT4AgeingWell	2015	DBLP DOI BibTeX RDF
13	Aleh Halauko, Tomasz Borejko, Witold A. Pleskacz	Low voltage LNA implementations in 28 nm FD-SOI technology for GNSS applications.	MIXDES	2015	DBLP DOI BibTeX RDF
13	Mariusz Derlecki, Tomasz Borejko, Witold A. Pleskacz	IF polyphase filter design and calibration with back-gate biasing in 28 nm FD-SOI technology.	MIXDES	2015	DBLP DOI BibTeX RDF
13	Maria-Alexandra Paun	On the modelisation of the main characteristics of SOI Hall cells by three-dimensional physical simulations.	MIXDES	2015	DBLP DOI BibTeX RDF
13	Mayank Punetha, Yashvir Singh	An integrable trench LDMOS transistor on SOI for RF power amplifiers in PICs.	VDAT	2015	DBLP DOI BibTeX RDF
13	Jitendra Yadav, Soumendu Sinha, Amit Sharma, Rekha Chaudhary, Ravindra Mukhiya, Rishi Sharma 0002, Vinod K. Khanna	Simulation and characterization of dual-gate SOI MOSFET, on-chip fabricated with ISFET.	VDAT	2015	DBLP DOI BibTeX RDF
13	Javier S. Fandino, José David Doménech, Pascual Muñoz	Two-port multimode interference reflectors with aluminium mirrors in a micron-scale SOI platform.	ECOC	2015	DBLP DOI BibTeX RDF
13	Guilhem de Valicourt, Sethumadhavan Chandrasekhar, Jeffrey H. Sinsky, Chia-Ming Chang 0001, Young-Kai Chen, M. A. Mestre, Yvan Pointurier, Sébastien Bigo, Jean-Marc Fedeli, Laurent Bramerie, Jean-Claude Simon, Laurent Vivien, Alexandre Shen, Alban Le Liepvre, Guang-Hua Duan	Monolithic integrated reflective polarization diversity SOI-based slot-blocker for fast reconfigurable 128 Gb/s and 256 Gb/s optical networks.	ECOC	2015	DBLP DOI BibTeX RDF
13	Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Troy J. Beukema, William Kelly, Hui H. Xu, David Freitas, Andrea Prati 0002, Daniele Gardellini, Robert Reutemann, Giovanni Cervelli, Juergen Hertle, Matthew Baecher, Jon Garlett, Pier Andrea Francese, John F. Ewen, David Hanson, Daniel W. Storaska, Mounir Meghelli	A 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	Bongjin Kim, Weichao Xu, Chris H. Kim	A Supply-Noise Sensitivity Tracking PLL in 32 nm SOI Featuring a Deep Trench Capacitor Based Loop Filter.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack	A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	Stefan Shopov, Andreea Balteanu, Sorin P. Voinigescu	A 19 dBm, 15 Gbaud, 9 bit SOI CMOS Power-DAC Cell for High-Order QAM W-Band Transmitters.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	Mark A. Ferriss, Alexander V. Rylyakov, José A. Tierno, Herschel A. Ainspan, Daniel J. Friedman	A 28 GHz Hybrid PLL in 32 nm SOI CMOS.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	Amir Agah, Jefy Alex Jayamon, Peter M. Asbeck, Lawrence E. Larson, James F. Buckwalter	Multi-Drive Stacked-FET Power Amplifiers at 90 GHz in 45 nm SOI CMOS.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	Vanessa Hung-Chu Chen, Lawrence T. Pileggi	A 69.5 mW 20 GS/s 6b Time-Interleaved ADC With Embedded Time-to-Digital Calibration in 32 nm CMOS SOI.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
13	Yasushi Igarashi, Tadashi Chiba, Shin-ichi O'Uchi, Meishoku Masahara, Kunihiro Sakamoto	SOI CMOS Voltage Multiplier Circuits with Body Bias Control Technique for Battery-Less Wireless Sensor System.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2014	DBLP DOI BibTeX RDF
13	Biwei Liu, Yankang Du, Kai Zhang	Different Mechanisms of Temperature Dependency of N-Hit SET in Bulk and PD-SOI Technology.	IEICE Trans. Electron.	2014	DBLP DOI BibTeX RDF
13	Mariusz Jankowski, Andrzej Napieralski	Current-controlled switches for HV SoI processes.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
13	Huixiang Huang, Dawei Bi, Zhengxuan Zhang	Investigation of the total dose response of partially depleted SOI nMOSFETs using TCAD simulation and experiment.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
13	Deepon Saha, Subir Kumar Sarkar	High-speed reduced-leakage SRAM memory cell design techniques for low-power 65 nm FD-SOI/SON CMOS technology.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
13	Mariusz Jankowski, Andrzej Napieralski	Current-mode signal processing implementation in HV SoI integrated systems.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
13	Prasanna Kumar Misra, S. Qureshi	Impact of Collector Length on the Performance of NPN SiGe HBT on Thin Film SOI.	J. Low Power Electron.	2014	DBLP DOI BibTeX RDF
13	Saheli Sarkhel, Bibhas Manna, Subir Kumar Sarkar	A Compact Two Dimensional Analytical Modeling of Nanoscale Fully Depleted Dual Material Gate Strained SOI/SON MOSFETs for Subdued SCEs.	J. Low Power Electron.	2014	DBLP DOI BibTeX RDF
13	Chao Xia, Xinhong Cheng, Zhongjian Wang, Duo Cao, Tingting Jia, Li Zheng, Yuehui Yu, Dashen Shen	A novel partial-SOI LDMOSFET (>800 V) with n-type floating buried layer in substrate.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
13	Francesco De Leonardis, Carlo Edoardo Campanella, Benedetto Troia, Anna Gina Perri, Vittorio M. N. Passaro	Performance of SOI Bragg Grating Ring Resonator for Nonlinear Sensing Applications.	Sensors	2014	DBLP DOI BibTeX RDF
13	Jerrin Pathrose, Lei Zou, Kevin T. C. Chai, Minkyu Je, Yong Ping Xu	Temperature Sensor Front End in SOI CMOS Operating up to 250°C.	IEEE Trans. Circuits Syst. II Express Briefs	2014	DBLP DOI BibTeX RDF
13	Chao Zhang, Jianjun Chen, Yaqing Chi, Hui Yang	Research on single-event transient mechanism in a novel SOI CMOS technology.	IEICE Electron. Express	2014	DBLP DOI BibTeX RDF
13	Qiang Fu, Bo Zhang 0027, Zhaoji Li	Bypass anode lateral IGBT on SOI for snapback suppression.	IEICE Electron. Express	2014	DBLP DOI BibTeX RDF
13	Eleftherios G. Ioannidis, Sébastien Haendler, Christoforos G. Theodorou, Nicolas Planes, C. A. Dimitriadis, Gérard Ghibaudo	Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs.	ESSDERC	2014	DBLP DOI BibTeX RDF
13	Kaya Can Akyel, Lorenzo Ciampolini, Olivier Thomas, David Turgis, Gérard Ghibaudo	Impact of Random Telegraph Signals on 6T high-density SRAM in 28nm UTBB FD-SOI.	ESSDERC	2014	DBLP DOI BibTeX RDF
13	Hitoshi Kawaguchi	1.55-μm VCSEL with polarization-independent high-index-contrast subwavelength grating mirror on SOI.	ICTON	2014	DBLP DOI BibTeX RDF
13	Fabrice Raineri, Alexandre Bazin, Paul Monnier, Kevin Lengle, Mathilde Gay, Rama Raj	The marvels of the III-V semiconductor photonic crystals on SOI hybrid nanophotonics platform.	ICTON	2014	DBLP DOI BibTeX RDF
13	Nikolaos Eftaxiopoulos-Sarris, Nicholas Axelos, Georgios Zervakis 0001, Kostas Tsoumanis, Kiamal Z. Pekmestzi	An independent dual gate SOI FinFET soft-error resilient memory cell.	IDT	2014	DBLP DOI BibTeX RDF
13	Younhyun Jung, Jinman Kim, Michael J. Fulham, David Dagan Feng	Opacity-driven volume clipping for slice of interest (SOI) visualisation of multi-modality PET-CT volumes.	EMBC	2014	DBLP DOI BibTeX RDF
13	Toru Katagiri, Hideharu Amano	A high speed design and implementation of dynamically reconfigurable processor using 28NM SOI technology.	FPL	2014	DBLP DOI BibTeX RDF
13	Dominique Nicolas, Alexandre Giry, Essia Ben Abdallah, Serge Bories, Gauthier Tant, Thierry Parra, Christophe Delaveaud, Pierre Vincent, Francis Chan Wai Po	SOI CMOS tunable capacitors for RF antenna aperture tuning.	ICECS	2014	DBLP DOI BibTeX RDF
13	Fatma Aounallah, Rim Amara Boujemâa, Monia Turki	Multi-SOI based particle filter for distributed estimation in ad hoc wireless sensor network.	COMNET	2014	DBLP DOI BibTeX RDF
13	Sabina Krivec, H. Prgic, Mirko Poljak, Tomislav Suligoj	Comparison of RF performance between 20 nm-gate bulk and SOI FinFET.	MIPRO	2014	DBLP DOI BibTeX RDF
13	Jonas Lindstrand, Ivaylo Vasilev, Henrik Sjöland	A low band cellular terminal antenna impedance tuner in 130nm CMOS-SOI technology.	ESSCIRC	2014	DBLP DOI BibTeX RDF
13	Marcel A. Kossel, Christian Menolfi, Thomas Toifl, Pier Andrea Francese, Matthias Braendli, Thomas Morf, Lukas Kull, Toke Meyer Andersen, Hazar Yueksel	A DDR3/4 memory link TX supporting 24-40 Ω, 0.8-1.6 V, 0.8-5.0 Gb/s with slew rate control and thin oxide output stages in 22-nm CMOS SOI.	ESSCIRC	2014	DBLP DOI BibTeX RDF
13	Abhirup Lahiri, Nitin Gupta, Anand Kumar, Pradeep Dhadda	A 600µA 32 kHz input 960 MHz output CP-PLL with 530ps integrated jitter in 28nm FD-SOI process.	ESSCIRC	2014	DBLP DOI BibTeX RDF
13	Marco Sautto, Davide Leone, Alessandro Savoia, Davide Ghisu, Fabio Quaglia, Giosuè Caliano, Andrea Mazzanti	A CMUT transceiver front-end with 100-V TX driver and 1-mW low-noise capacitive feedback RX amplifier in BCD-SOI technology.	ESSCIRC	2014	DBLP DOI BibTeX RDF
13	Yangxi Zhang, Chengchen Gao, Fanrui Meng, Yilong Hao	A SOI sandwich differential capacitance accelerometer with low-stress package.	NEMS	2014	DBLP DOI BibTeX RDF
13	Sen Ren, Weizheng Yuan, Xiaodong Sun, Jinjun Deng, Dayong Qiao, Chengyu Jiang	Microfabricated SOI pressure sensor using dynamically balanced lateral resonator.	NEMS	2014	DBLP DOI BibTeX RDF
13	Wei Ma, Ronghao Zeng, Dayu Liu, Yitshak Zohar, Yi-Kuen Lee	SOI technology-based microfiltration system for circulating tumor cells isolation and enumeration.	NEMS	2014	DBLP DOI BibTeX RDF
13	Lidong Du, Mengying Zhang, Zhan Zhao, Liang Li, Cheng Liu, Zhen Fang 0003, Shaohua Wu, Xuejin Sun, Xiaolei Wang	A SOI-MEMS atmosphere pressure sensor and its low stress packaging.	NEMS	2014	DBLP DOI BibTeX RDF
13	Zhenyu Luo, Deyong Chen, Junbo Wang 0002	Resonant pressure sensor with through-glass electrical interconnect based on SOI wafer technology.	NEMS	2014	DBLP DOI BibTeX RDF
13	Alexandre Fonseca, Gilles Jacquemod, Yves Leduc, Emeric de Foucauld, Philippe Lorenzini	VCO design in SOI technologies.	NEWCAS	2014	DBLP DOI BibTeX RDF
13	Jaebin Choi, Eyal Aklimi, Jared Roseman, David Tsai 0001, Harish Krishnaswamy, Kenneth L. Shepard	Matching the power density and potentials of biological systems: A 3.1-nW, 130-mV, 0.023-mm3 pulsed 33-GHz radio transmitter in 32-nm SOI CMOS.	CICC	2014	DBLP DOI BibTeX RDF
13	Timothy O. Dickson, Yong Liu 0023, Sergey V. Rylov, Ankur Agrawal, Seongwon Kim, Ping-Hsuan Hsieh, John F. Bulzacchelli, Mark A. Ferriss, Herschel A. Ainspan, Alexander V. Rylyakov, Benjamin D. Parker, Christian W. Baks, Lei Shan, Young Hoon Kwark, José A. Tierno, Daniel J. Friedman	A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology.	CICC	2014	DBLP DOI BibTeX RDF
13	Mohamed Basha, Behzad Biglarbegian, Soren Gigoyan, Safieddin Safavi-Naeini	Design and fabrication of CPW to dielectric image-guide transitions at 60 GHz on SOI.	RWS	2014	DBLP DOI BibTeX RDF
13	Adilson S. Cardoso, Prabir K. Saha, Partha S. Chakraborty, David M. Fleischhauer, John D. Cressler	Low-loss, wideband SPDT switches and switched-line phase shifter in 180-nm RF CMOS on SOI technology.	RWS	2014	DBLP DOI BibTeX RDF