Search results for "RAMs"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
80	Dilip K. Bhavsar	Testing Interconnections to Static RAMs.	IEEE Des. Test Comput.	1991	DBLP DOI BibTeX RDF
73	Friedhelm Meyer auf der Heide	Speeding up Random Access Machines by Few Processors.	STACS	1986	DBLP DOI BibTeX RDF
72	Puneet Sawhney, Haroon Rasheed	Static RAM generators with automated characterization techniques for a 0.5 micron triple-metal embedded array.	VLSI Design	1995	DBLP DOI BibTeX RDF	static RAM generators, automatic generator characterisation tool, triple-metal embedded array, metallized SRAMs, single-port static RAMs, dual-port static RAMs, user-defined size, 0.5 micron, application specific integrated circuits, integrated circuit design, circuit CAD, aspect ratio, ASIC design, SRAM chips, SRAM chips, module generators
56	Kanad Chakraborty	Testing and Reliability Techniques for High-Bandwidth Embedded RAMs.	J. Electron. Test.	2004	DBLP DOI BibTeX RDF	multiport RAM, BIST (built-in self-test), BISR (built-in self-repair), column-multiplexed addressing, fault tolerance, reliability, bandwidth
56	Amir M. Ben-Amram, Zvi Galil	Lower Bounds for Dynamic Data Structures on Algebraic RAMs.	Algorithmica	2002	DBLP DOI BibTeX RDF	Cell-probe lower bounds, Dynamic prefix sum, Union-find, Random access machine
56	Janusz A. Brzozowski, Helmut Jürgensen	An algebra of multiple faults in RAMs.	J. Electron. Test.	1996	DBLP DOI BibTeX RDF	testing, composition, stuck-at fault, multiple fault, automaton, transition fault, RAM, pattern-sensitive fault, coupling fault, semilattice
56	René David	Test Length for Random Testing of Sequential Machines Application to RAMs.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	Markov chains, Random test, Sequential machines, RAMs, Initial state
48	Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski	Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs.	ACM Trans. Reconfigurable Technol. Syst.	2008	DBLP DOI BibTeX RDF	Microcoded architectures, dictionary based compression, no-instruction-set computer, FPGA, memory optimization
48	Claudio Sacerdoti Coen	A Constructive Proof of the Soundness of the Encoding of Random Access Machines in a Linda Calculus with Ordered Semantics.	ICTCS	2003	DBLP DOI BibTeX RDF
48	Kewal K. Saluja	On-chip testing of random access memories.	J. Electron. Test.	1994	DBLP DOI BibTeX RDF	BIST RAM, reconfigured random access memories, test parallelism, Built-In Self-Test, pattern sensitive faults, test architectures, RAM testing
44	Laurent Cauffriez, Vincent Benard, Dominique Renaux	A New Formalism for Designing and Specifying RAMS Parameters for Complex Distributed Control Systems: The Safe-SADT Formalism.	IEEE Trans. Reliab.	2006	DBLP DOI BibTeX RDF
44	Kiyoo Itoh 0001, Masashi Horiguchi, Takayuki Kawahara	Ultra-low voltage nano-scale embedded RAMs.	ISCAS	2006	DBLP DOI BibTeX RDF
44	Jose Antonio Fonseca, Jorge Rady de Almeida Jr.	CMMI RAMS Extension Based on CENELEC Railway Standard.	SAFECOMP	2005	DBLP DOI BibTeX RDF
44	Kiyoo Itoh 0001, Kenichi Osada, Takayuki Kawahara	Low-Voltage Embedded RAMs - Current Status and Future Trends.	PATMOS	2004	DBLP DOI BibTeX RDF
44	Yuejian Wu, Sanjay Gupta	Built-In Self-Test for Multi-Port RAMs.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	Random Access Memory (RAM) test, multi-port RAM test, Built-In Self-Test (BIST)
44	Bruce F. Cockburn	Deterministic tests for detecting singleV-coupling faults in RAMs.	J. Electron. Test.	1994	DBLP DOI BibTeX RDF	V-coupling faults, lower bounds, Functional tests, pattern-sensitive faults, RAM testing
43	Mauro Chinosi, Roberto Zafalon, Carlo Guardiani	Automatic characterization and modeling of power consumption in static RAMs.	ISLPED	1998	DBLP DOI BibTeX RDF	static RAMs, power estimation, memory modeling
43	Amir M. Ben-Amram, Zvi Galil	Lower Bounds for Data Structure Problems on RAMs (Extended Abstract)	FOCS	1991	DBLP DOI BibTeX RDF	union-find problem, average case time, data structure problems, output variability, problem variability, unbounded integers, lower bounds, upper bound, RAMs, worst case time
39	Varun Gangal, Eduard H. Hovy	BERTering RAMS: What and How Much does BERT Already Know About Event Arguments? - A Study on the RAMS Dataset.	CoRR	2020	DBLP BibTeX RDF
39	Varun Gangal, Eduard H. Hovy	BERTering RAMS: What and How Much does BERT Already Know About Event Arguments? - A Study on the RAMS Dataset.	BlackboxNLP@EMNLP	2020	DBLP DOI BibTeX RDF
39	Fengbo Ren, Henry Park, Richard Dorrance, Yuta Toriyama, Chih-Kong Ken Yang, Dejan Markovic	A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs).	ISQED	2012	DBLP DOI BibTeX RDF
36	Sriram C. Krishnan, Rina Panigrahy, Sunil Parthasarathy	Error-Correcting Codes for Ternary Content Addressable Memories.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
36	Daniel J. Rosenkrantz, Lin Yu, S. S. Ravi	Efficient Construction of Minimum Makespan Schedules for Tasks with a Fixed Number of Distinct Execution Times.	Algorithmica	2001	DBLP DOI BibTeX RDF	Cell-probe lower bounds, Dynamic prefix sum, Union-find, Random access machine
36	Debaleena Das, Mark G. Karpovsky	Exhaustive and Near-Exhaustive Memory Testing Techniques and their BIST Implementations.	J. Electron. Test.	1997	DBLP DOI BibTeX RDF	exhaustive codes, near-exhaustive codes, built-in self-test, memory testing, pattern sensitive faults
36	Amir M. Ben-Amram, Zvi Galil	Lower Bounds on Algebraic Random Access Machines (Extended Abstract).	ICALP	1995	DBLP DOI BibTeX RDF
36	Ingolf Wald	An Automatic Speed-up of Random Access Machines with Powerful Arithmetic Instructions.	STACS	1988	DBLP DOI BibTeX RDF
36	John H. Reif	On the Power of Probabilistic Choice in Synchronous Parallel Computations.	ICALP	1982	DBLP DOI BibTeX RDF
36	Kiyoo Itoh 0001	Low-voltage memories for power-aware systems.	ISLPED	2002	DBLP DOI BibTeX RDF	DRAM and SRAM cells, gain cells, gate-source/substrate-source back-biasing, memory-rich architectures, multi-Vr, non-volatile RAMs, on-chip voltage converters, peripheral circuits, subthreshold current, testing
32	K. García Medina, J. L. Beltrán, Ernesto Estevez-Rams, D. Kunka	Computational Capabilities of Adler Oscillators Under Weak Local Kuramoto-Like Coupling.	IWAIPR	2023	DBLP DOI BibTeX RDF
32	D. Estevez-Moya, Ernesto Estevez-Rams, Holger Kantz	Echo State Networks for the Prediction of Chaotic Systems.	IWAIPR	2023	DBLP DOI BibTeX RDF
32	Ania Mesa-Rodríguez, Augusto Gonzalez, Ernesto Estevez-Rams, Pedro A. Valdés-Sosa	Cancer Segmentation by Entropic Analysis of Ordered Gene Expression Profiles.	Entropy	2022	DBLP DOI BibTeX RDF
32	Tobias Malzer, Hubert Rams, Bernd Kolar, Markus Schöberl	Stability Analysis of the Observer Error of an In-Domain Actuated Vibrating String.	IEEE Control. Syst. Lett.	2021	DBLP DOI BibTeX RDF
32	Konrad Jalowiecki, Marek M. Rams, Bartlomiej Gardas	Brute-forcing spin-glass problems with CUDA.	Comput. Phys. Commun.	2021	DBLP DOI BibTeX RDF
32	Emilia Grass, Kathrin Fischer, Antonia Rams	An accelerated L-shaped method for solving two-stage stochastic programs in disaster management.	Ann. Oper. Res.	2020	DBLP DOI BibTeX RDF
32	Mona Rams, Tim Conrad 0001	Dictionary learning for transcriptomics data reveals type-specific gene modules in a multi-class setting.	it Inf. Technol.	2020	DBLP DOI BibTeX RDF
32	Tobias Malzer, Hubert Rams, Markus Schöberl	On structural invariants in the energy-based in-domain control of infinite-dimensional port-Hamiltonian systems.	Syst. Control. Lett.	2020	DBLP DOI BibTeX RDF
32	Ernesto Estevez-Rams, A. Mesa Rodriguez, D. Estevez-Moya	Complexity-entropy analysis at different levels of organization in written language.	CoRR	2019	DBLP BibTeX RDF
32	Erwin Hoffmann, Wolfgang Rams, Martin Rupp, Nikolai Schwandt	Versuch einer , , Multi-Layer"-Betrachtung von Daten im Lichte von Big Data.	Inform. Spektrum	2019	DBLP DOI BibTeX RDF
32	Hubert Rams, Markus Schöberl, Kurt Schlacher	Optimal Motion Planning and Energy-Based Control of a Single Mast Stacker Crane.	IEEE Trans. Control. Syst. Technol.	2018	DBLP DOI BibTeX RDF
32	Tobias Malzer, Hubert Rams, Markus Schöberl	Energy-Based Control of Nonlinear Infinite-Dimensional Port-Hamiltonian Systems with Dissipation.	CDC	2018	DBLP DOI BibTeX RDF
32	Hubert Rams, Markus Schöberl	Energiebasierte Regelung von verteilt-parametrischen Hamiltonschen Systemen mit Hamiltonschen Dichten zweiter Ordnung.	Autom.	2017	DBLP DOI BibTeX RDF
32	Hubert Rams, Markus Schöberl	On structural invariants in the energy based control of port-Hamiltonian systems with second-order Hamiltonian.	ACC	2017	DBLP DOI BibTeX RDF
32	Narasinga Rao Miniskar, Raj Narayana Gadde, Young-chul Rams Cho, Sukjin Kim	Fast cycle-accurate compile based simulator for reconfigurable processor.	ISCAS	2017	DBLP DOI BibTeX RDF
32	Narasinga Rao Miniskar, Rahul R. Patil, Raj Narayana Gadde, Young-chul Rams Cho, Sukjin Kim, Shi Hwa Lee	Intra mode power saving methodology for CGRA-based reconfigurable processor architectures.	ISCAS	2016	DBLP DOI BibTeX RDF
32	Ernesto Estevez-Rams, C. Pérez-Demydenko, B. Aragón Fernández, Raimundo Lora Serrano	Visualizing long vectors of measurements by use of the Hilbert curve.	Comput. Phys. Commun.	2015	DBLP DOI BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández, Duarte Juan Sánchez	Telemetry System for Cochlear Implant Using ASK Modulation and FPGA.	IWINAC (1)	2015	DBLP DOI BibTeX RDF
32	Alfonso Blesa, Carlos Catalán, Félix Serna, José Manuel Colom, C. Larrea, Josep M. Rams	Function blocks for the design of control applications based on EtherCAT fieldbus.	ICIT	2015	DBLP DOI BibTeX RDF
32	C. Pérez-Demydenko, Irina Brito Reyes, B. Aragón Fernández, Ernesto Estevez-Rams	The complete set of homogeneous Hilbert curves in two dimensions.	Appl. Math. Comput.	2014	DBLP DOI BibTeX RDF
32	Jacques Lévy Véhel, Michal Rams	Large Deviation Multifractal Analysis of a Class of Additive Processes With Correlated Nonstationary Increments.	IEEE/ACM Trans. Netw.	2013	DBLP DOI BibTeX RDF
32	Tomasz Rams, Piotr Pacyna	A Survey of Group Key Distribution Schemes With Self-Healing Property.	IEEE Commun. Surv. Tutorials	2013	DBLP DOI BibTeX RDF
32	Ernesto Estevez-Rams, Raimundo Lora Serrano, B. Aragón Fernández, Irina Brito Reyes	On the non-randomness of maximum Lempel Ziv complexity sequences of finite size.	CoRR	2013	DBLP BibTeX RDF
32	C. A. J. Nunes, Ernesto Estevez-Rams, B. Aragón Fernández, Raimundo Lora Serrano	Properties of maximum Lempel-Ziv complexity strings.	CoRR	2013	DBLP BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández	Influence of Interactions between Virtual Channels in Cochlear Implants.	IWINAC (1)	2013	DBLP DOI BibTeX RDF
32	Vicente Garcerán-Hernández, Ernesto A. Martínez-Rams	Cochlear Implant: Transcutaneous Transmission Link with OFDM.	IWINAC (1)	2013	DBLP DOI BibTeX RDF
32	Tomasz Rams, Piotr Pacyna	Self-healing group key distribution with extended revocation capability.	ICNC	2013	DBLP DOI BibTeX RDF
32	Tomasz Rams, Piotr Pacyna	Long-Lived Self-Healing Group Key Distribution Scheme with Backward Secrecy.	NetSys	2013	DBLP DOI BibTeX RDF
32	William Geller, Bruce Kitchens, Michal Misiurewicz, Michal Rams	A spectral radius estimate and Entropy of Hypercubes.	Int. J. Bifurc. Chaos	2012	DBLP DOI BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández	Speaker Recognition Based on a Bio-inspired Auditory Model: Influence of Its Components, Sound Pressure and Noise Level.	IWINAC (2)	2011	DBLP DOI BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández	A Speaker Recognition System Based on an Auditory Model and Neural Nets: Performance at Different Levels of Sound Pressure and of Gaussian White Noise.	IWINAC (2)	2011	DBLP DOI BibTeX RDF
32	Félix Serna, Carlos Catalán, Alfonso Blesa, Josep M. Rams, José Manuel Colom	Control software design for a cutting glass machine tool based on the COSME platform. Case study.	CASE	2011	DBLP DOI BibTeX RDF
32	Carlos Catalán, Félix Serna, Alfonso Blesa, Josep M. Rams, José Manuel Colom	Communication types for manufacturing systems. A proposal to distributed control system based on IEC 61499.	CASE	2011	DBLP DOI BibTeX RDF
32	Carlos Catalán, Félix Serna, Alfonso Blesa, José Manuel Colom, Josep María Rams	COSME: A distributed control platform for communicating machine tools in Agile Manufacturing Systems.	ETFA	2011	DBLP DOI BibTeX RDF
32	Félix Serna, Carlos Catalán, Alfonso Blesa, José Manuel Colom, Josep María Rams	"Predictive maintenance surveyor" design pattern for machine tools control software applications.	ETFA	2011	DBLP DOI BibTeX RDF
32	Carlos Catalán, Félix Serna, Tamara Civera, Alfonso Blesa, Josep María Rams	Control design for machine tools using Domiciano, an IDE based on software components.	ETFA	2011	DBLP DOI BibTeX RDF
32	Carlos Catalán, Félix Serna, Alfonso Blesa, Josep M. Rams	IEC 61499 execution model based on life cycle of function blocks.	ETFA	2010	DBLP DOI BibTeX RDF
32	Félix Serna, Carlos Catalán, Alfonso Blesa, Josep M. Rams	Design patterns for Failure Management in IEC 61499 Function Blocks.	ETFA	2010	DBLP DOI BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández, José Manuel Ferrández de Vicente	Low rate stochastic strategy for cochlear implants.	Neurocomputing	2009	DBLP DOI BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández	Assessment of a Speaker Recognition System Based on an Auditory Model and Neural Nets.	IWINAC (2)	2009	DBLP DOI BibTeX RDF
32	Ernesto A. Martínez-Rams, Vicente Garcerán-Hernández	ANF Stochastic Low Rate Stimulation.	IWINAC (1)	2007	DBLP DOI BibTeX RDF
32	José L. Trueba, Joaquín Rams, Miguel A. F. Sanjuán	Analytical Estimates of the Effect of nonlinear damping in some nonlinear oscillators.	Int. J. Bifurc. Chaos	2000	DBLP DOI BibTeX RDF
31	Miklós Ajtai	Oblivious RAMs without cryptogrpahic assumptions.	STOC	2010	DBLP DOI BibTeX RDF	RAM, oblivious
31	Ioannis Voyiatzis	An Accumulator-Based Compaction Scheme For Online BIST of RAMs.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
31	Koji Shigemoto, Kensuke Kawakami, Koji Nakano	Accelerating Montgomery Modulo Multiplication for Redundant Radix-64k Number System on the FPGA Using Dual-Port Block RAMs.	EUC (1)	2008	DBLP DOI BibTeX RDF
31	Tsu-Wei Tseng, Chun-Hsien Wu, Yu-Jen Huang, Jin-Fu Li 0001, Alex Pao, Kevin Chiu, Eliot Chen	A Built-In Self-Repair Scheme for Multiport RAMs.	VTS	2007	DBLP DOI BibTeX RDF
31	Yu-Jen Huang, Da-Ming Chang, Jin-Fu Li 0001	A Built-In Redundancy-Analysis Scheme for Self-Repairable RAMs with Two-Level Redundancy.	DFT	2006	DBLP DOI BibTeX RDF
31	Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta	A physical design tool for built-in self-repairable RAMs.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
31	Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik	Symmetric Transparent BIST for RAMs.	DATE	1999	DBLP DOI BibTeX RDF
31	Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich	Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.	DATE	1998	DBLP DOI BibTeX RDF
31	Michael Nicolaidis, O. Kebichi, Vladimir Castro Alves	Trade-offs in scan path and BIST implementations for RAMs.	J. Electron. Test.	1994	DBLP DOI BibTeX RDF	RAM test algorithms, BIST, Aliasing, signature analysis, scan path, coupling faults
31	Robert P. Treuer, Vinod K. Agarwal	Built-In Self-Diagnosis for Repairable Embedded RAMs.	IEEE Des. Test Comput.	1993	DBLP DOI BibTeX RDF
31	Bruce F. Cockburn, Janusz A. Brzozowski	Near-optimal tests for classes of write-triggered coupling faults in RAMs.	J. Electron. Test.	1992	DBLP DOI BibTeX RDF	toggling faults, lower bounds, coupling faults, RAM testing, optimal tests
31	Bruno Ciciani	Redundancy effect on yield of binary tree RAMs.	J. Electron. Test.	1991	DBLP DOI BibTeX RDF	semiconductor memory design, VLSI chip design, yield evaluation, Fault-tolerant memories
31	Janusz A. Brzozowski, Bruce F. Cockburn	Detection of coupling faults in RAMs.	J. Electron. Test.	1990	DBLP DOI BibTeX RDF	toggling faults, fault modeling, coupling faults, RAM testing, optimal tests
24	Charles Eric LaForest, J. Gregory Steffan	Efficient multi-ported memories for FPGAs.	FPGA	2010	DBLP DOI BibTeX RDF	fpga, parallel, memory, multi-port
24	Jesús Aranda, Frank D. Valencia, Cristian Versari	On the Expressive Power of Restriction and Priorities in CCS with Replication.	FoSSaCS	2009	DBLP DOI BibTeX RDF
24	David B. Thomas, Wayne Luk	Sampling from the exponential distribution using independent Bernoulli variates.	FPL	2008	DBLP DOI BibTeX RDF
24	Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Paolo Bernardi, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda	A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques.	J. Electron. Test.	2004	DBLP DOI BibTeX RDF	IEEE P1500, diagnosis, Hough transform, embedded memories
24	Mohd. Hasan, Tughrul Arslan	A triple port RAM based low power commutator architecture for a pipelined FFT processor.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
24	Chih-Wea Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu	Test and Diagnosis of Word-Oriented Multiport Memories.	VTS	2003	DBLP DOI BibTeX RDF
24	Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda	A BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques.	MTDT	2002	DBLP DOI BibTeX RDF
24	Said Hamdioui, Ad J. van de Goor, Mike Rodgers	March SS: A Test for All Static Simple RAM Faults.	MTDT	2002	DBLP DOI BibTeX RDF	simple/linked faults, fault models, fault coverage, Memory testing, march test
24	Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda	A BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques.	IOLTW	2002	DBLP DOI BibTeX RDF
24	Emil Gizdarski	Detection of Delay Faults in Memory Address Decoders.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	Built-In Self-Test, delay testing, stuck-open faults, RAM testing
24	Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar	A scheme for multiple on-chip signature checking for embedded SRAMs.	ED&TC	1997	DBLP DOI BibTeX RDF
24	Silvia M. Müller, Uzi Vishkin	Conflict-Free Access to Multiple Single-Ported Register Files.	IPPS	1997	DBLP DOI BibTeX RDF
24	Manoj Franklin, Kewal K. Saluja	Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
24	Manoj Sachdev	Reducing the CMOS RAM test complexity withIDDQ and voltage testing.	J. Electron. Test.	1995	DBLP DOI BibTeX RDF	fault model, faults, defects, March test, I DDQ testing
24	Friedhelm Meyer auf der Heide	Lower Bounds for Solving Linear Diophantine Equations on Random Access Machines	J. ACM	1985	DBLP DOI BibTeX RDF
24	Yasuaki Ito, Koji Nakano	A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture.	ISPA	2009	DBLP DOI BibTeX RDF	block RAMs, FPGA Implementation, Hardware Algorithm
24	Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin	Area Time Trade-Offs in Micro-Grain VLSI Array Architectures.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	area time trade-offs, micro-grain VLSI array architectures, massively parallel control-flow architectures, associative memory architecture, Mux-based SIMD architecture, systolic MIMD/MISD computation, data-flow requirements, performance evaluation, performance, VLSI, parallel architectures, FFT, matrix multiplication, RAMs