Search results for "latency-hiding"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
71	Jeremy F. Villalobos, Barry Wilkinson	Latency hiding by redundant processing: a technique for grid-enabled, iterative, synchronous parallel programs.	Mardi Gras Conference	2008	DBLP DOI BibTeX RDF	parallel, grid, synchronous, latency hiding
64	Joan-Manuel Parcerisa, Antonio González 0001	Improving Latency Tolerance of Multithreading through Decoupling.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	Access/execute decoupling, instruction-level parallelism, simultaneous multithreading, latency hiding, hardware complexity
51	Sunil Kim, Alexander V. Veidenbaum	On Interaction between Interconnection Network Design and Latency Hiding Techniques in Multiprocessors.	J. Supercomput.	2000	DBLP DOI BibTeX RDF	interconnection networks, prefetching, weak consistency
48	Sunil Kim, Alexander V. Veidenbaum	The Effect of Limited Network Bandwidth and its Utilization by Latency Hiding Techniques in Large-Scale Shared Memory Systems.	IEEE PACT	1997	DBLP DOI BibTeX RDF	software cache coherence, interconnection network, prefetching, shared memory systems, network bandwidth, weak consistency
47	Jiayuan Meng, David Tarjan, Kevin Skadron	Dynamic warp subdivision for integrated branch and memory divergence tolerance.	ISCA	2010	DBLP DOI BibTeX RDF	branch divergence, memory divergence, cache, warp, latency hiding, simd
43	Hock-Beng Lim, Pen-Chung Yew	An Integrated Framework for Compiler-Directed Cache Coherence and Data Prefetching.	LCPC	1998	DBLP DOI BibTeX RDF	Compiler-directed Cache Coherence, Memory Latency Hiding, Shared-memory Multiprocessors, Data Prefetching
41	Kei Hiraki, Toshio Shimada, Satoshi Sekiguchi	Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor.	International Conference on Supercomputing	1993	DBLP DOI BibTeX RDF
40	Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv, Prashant R. Chandra	Latency hiding through multithreading on a network processor.	PPoPP	2007	DBLP DOI BibTeX RDF	compiler, multicore, code motion, latency hiding
40	G. Seaman	A Latency-Hiding MIMD Wavelet Transform.	PDP	1996	DBLP DOI BibTeX RDF	latency-hiding MIMD wavelet transform, systolic processors, MIMD systems, tree-based structure, data-parallel SIMD, synchronous fine-grained communication, data driven algorithm, real-time systems, real time systems, parallel algorithms, parallel algorithm, scalable, parallel processing, wavelet transforms, message passing, message-passing, SIMD, discrete wavelet transform, trees (mathematics), mathematics computing, communication latency
38	Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv, Prashant R. Chandra	Latency Hiding in Multi-Threading and Multi-Processing of Network Applications.	PACT	2007	DBLP DOI BibTeX RDF
37	Masato Oguchi, Hitoshi Aida, Tadao Saito	A Proposal for a DSM Architecture Suitable for a Widely Distributed Environment and its Evaluation.	HPDC	1995	DBLP DOI BibTeX RDF	distributed shared memory architecture, widely distributed environment, functionally distributed computing, software programming, replicated shared memory, internal machine memory, SPARCstations, SCRAMNet, latency hiding techniques, performance evaluation, parallel architectures, shared memory systems, distributed memory systems, data prefetching, multi-thread programming, shared virtual memory
33	Aniruddha G. Shet, P. Sadayappan, David E. Bernholdt, Jarek Nieplocha, Vinod Tipparaju	A framework for characterizing overlap of communication and computation in parallel applications.	Clust. Comput.	2008	DBLP DOI BibTeX RDF	Performance instrumentation and monitoring, Parallel applications, Latency hiding, Communication-computation overlap
33	Seng Lin Shee, Sri Parameswaran, Newton Cheung	Novel architecture for loop acceleration: a case study.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	tightly coupled, architecture, ASIP, hardware/software partitioning, coprocessor, loop optimization, latency hiding, loop pipelining, loop acceleration
33	Reinhard von Hanxleden, Ken Kennedy	A balanced code placement framework.	ACM Trans. Program. Lang. Syst.	2000	DBLP DOI BibTeX RDF	Tarjan intervals, data-flow analysis, high performance Fortran, latency hiding, partial redundancy elimination, Fortran D
33	Wolfgang K. Giloi, Ulrich Brüning 0001, Wolfgang Schröder-Preikschat	MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance.	PDP	1996	DBLP DOI BibTeX RDF	maximized sustained performance, compiler problem, innovative architectural solutions, overlapping communication, MANNA computer, benchmark performance, performance evaluation, parallel computers, operating system, parallel machines, distributed memory systems, parallelizing compilers, operating systems (computers), programmability, virtual storage, parallelising compilers, latency hiding, distributed memory parallel computer, distributed memory architecture, virtual shared memory, global address space, superscalar microprocessors
28	Mainak Chaudhuri, Mark A. Heinrich, Chris Holt, Jaswinder Pal Singh, Edward Rothberg, John L. Hennessy	Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	flexible node controller, latency, bandwidth, queuing model, Occupancy, distributed shared memory multiprocessors, communication controller
28	Graham P. Jones, Nigel P. Topham	A Limitation Study into Access Decoupling.	Euro-Par	1997	DBLP DOI BibTeX RDF
27	Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha	Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture.	ICPADS (1)	2006	DBLP DOI BibTeX RDF
27	Chaitanya Tumuluri, Alok N. Choudhary	Scalable Software Latency Hiding Schemes: Evaluation of the Poststore and Prefetch Options.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
25	Volker Strumpen, Thomas L. Casavant	Implementing communication latency hiding in high-latency computer networks.	HPCN	1995	DBLP DOI BibTeX RDF
24	Uzi Vishkin	Two techniques for reconciling algorithm parallelism with memory constraints.	SPAA	2002	DBLP DOI BibTeX RDF	memory systems constraints, parallel algorithms, prefetching
24	Vijay S. Pai, Parthasarathy Ranganathan, Hazim Abdel-Shafi, Sarita V. Adve	The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	performance evaluation, instruction-level parallelism, Shared-memory multiprocessors, software prefetching
23	Sreeram Potluri, Ping Lai, Karen A. Tomko, Sayantan Sur, Yifeng Cui, Mahidhar Tatineni, Karl W. Schulz, William L. Barth, Amitava Majumdar 0001, Dhabaleswar K. Panda 0001	Quantifying performance benefits of overlap using MPI-2 in a seismic modeling application.	ICS	2010	DBLP DOI BibTeX RDF	MPI-2, one-sided, RDMA, latency hiding
23	Costin Iancu, Steven A. Hofmeyr	Runtime optimization of vector operations on large scale SMP clusters.	PACT	2008	DBLP DOI BibTeX RDF	communication code generation, parallel programming, program transformations, latency hiding, performance portability
23	Costin Iancu, Wei Chen 0011, Katherine A. Yelick	Performance portable optimizations for loops containing communication operations.	ICS	2008	DBLP DOI BibTeX RDF	communication, parallel programming, program transformations, code generation, latency hiding, performance portability
23	Abdul Malik Khan, Sophie Chabridon, Antoine Beugnard	Synchronization medium: a consistency maintenance component for mobile multiplayer games.	NETGAMES	2007	DBLP DOI BibTeX RDF	multiplayer mobile games, latency hiding, data synchronization, communication abstraction, medium
23	Costin Iancu, Erich Strohmaier	Optimizing communication overlap for high-speed networks.	PPoPP	2007	DBLP DOI BibTeX RDF	logGP, performance model, variability, high-speed networks, latency hiding, logP, communication overlap
23	Won Woo Ro, Stephen P. Crago, Alvin M. Despain, Jean-Luc Gaudiot	Design and evaluation of a hierarchical decoupled architecture.	J. Supercomput.	2006	DBLP DOI BibTeX RDF	Memory latency hiding, Parallel architecture, Multithreading, Instruction level parallelism, Speculative execution, Data prefetching, Decoupled architectures
23	Farshad Khunjush, Nikitas J. Dimopoulos	Lazy direct-to-cache transfer during receive operations in a message passing environment.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	network cache, MPI, latency hiding
23	Fei Chen, Timothy W. O'Neil, Edwin Hsing-Mean Sha	Optimizing Overall Loop Schedules Using Prefetching and Partitioning.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	scheduling, partitioning, Prefetching, retiming, latency-hiding
23	Kwan-Po Wong, Cho-Li Wang	Push-Pull Messaging: A High-Performance Communication Mechanism for Commodity SMP Clusters.	ICPP	1999	DBLP DOI BibTeX RDF	Push-Pull Messaging, Latency Hiding, Cluster of SMPs, Low-Latency Communication
23	Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen	Tuning Compiler Optimizations for Simultaneous Multithreading.	MICRO	1997	DBLP DOI BibTeX RDF	cyclic algorithm, fine-grained sharing, inter-thread instruction-level parallelism, loop-iteration scheduling, memory system resources, software speculative execution, performance, parallel programs, parallel architecture, compiler optimizations, shared-memory multiprocessors, processor architecture, instructions, simultaneous multithreading, latency hiding, loop tiling, optimising compilers, inter-processor communication, cache size
23	Graham P. Jones, Nigel P. Topham	A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine.	MICRO	1997	DBLP DOI BibTeX RDF	Access Decoupling, Superscalar, out of order execution, latency hiding
23	David A. Koufaty, Xiangfeng Chen, David K. Poulsen, Josep Torrellas	Data Forwarding in Scalable Shared-Memory Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	1996	DBLP DOI BibTeX RDF	Memory latency hiding, forwarding and prefetching, multiprocessor caches, address trace analysis, scalable shared-memory multiprocessors
23	Chun Xia, Josep Torrellas	Improving the Data Cache Performance of Multiprocessor Operating Systems.	HPCA	1996	DBLP DOI BibTeX RDF	data cache performance, operating system effect on caches, bus-based multiprocessor, address trace evaluation, block operations, latency hiding
23	Dean M. Tullsen, Susan J. Eggers	Effective Cache Prefetching on Bus-Based Multiprocessors	ACM Trans. Comput. Syst.	1995	DBLP DOI BibTeX RDF	bus-based multiprocessors, memory latency hiding, false sharing, cache prefetching
23	Yong-Kim Chong, Kai Hwang 0001	Performance Analysis of Four Memory Consistency Models for Multithreaded Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	1995	DBLP DOI BibTeX RDF	latency hiding techniques, performance evaluation, Distributed shared memory, stochastic Petri nets, multithreaded processors, memory consistency models, context switching, scalable multiprocessors
23	Stefan Lüpke	Accelerated Access to Shared Distributed Arrays on Distribued Memory Systems by Access Objects.	CONPAR	1994	DBLP DOI BibTeX RDF	access objects, data prefetch, distributed data structures, latency hiding, virtual shared memory
21	Jason E. Fritts, Roger D. Chamberlain	Breaking the Memory Bottleneck with an Optical Data Path.	Annual Simulation Symposium	2002	DBLP DOI BibTeX RDF	bandwidth bottleneck, processor-memory gap, performance evaluation, media processing, optical bus
21	Yasushi Shimono, Bernady O. Apduhan, Itsujiro Arita, Yoshimasa Ohnishi	Evaluating the Performance of a DSM Cluster with Improved Communication Subsystem.	ICOIN	2001	DBLP DOI BibTeX RDF
20	Sanghyun Park, Aviral Shrivastava, Yunheung Paek	Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors.	DATE	2008	DBLP DOI BibTeX RDF
20	Steven Swanson, Luke K. McDowell, Michael M. Swift, Susan J. Eggers, Henry M. Levy	An evaluation of speculative instruction execution on simultaneous multithreaded processors.	ACM Trans. Comput. Syst.	2003	DBLP DOI BibTeX RDF	multiprocessors, multithreading, Instruction-level parallelism, speculation, thread-level parallelism, simultaneous multithreading
17	Jarek Nieplocha, Vinod Tipparaju, Manojkumar Krishnan, Gopalakrishnan Santhanaraman, Dhabaleswar K. Panda 0001	Optimizing Mechanisms for Latency Tolerance in Remote Memory Access Communication on Clusters.	CLUSTER	2003	DBLP DOI BibTeX RDF
17	Joan-Manuel Parcerisa, Antonio González 0001	The Synergy of Multithreading and Access/Execute Decoupling.	HPCA	1999	DBLP DOI BibTeX RDF
17	Kaisong Huang, Tianzheng Wang 0001, Qingqing Zhou, Qingzhong Meng	The Art of Latency Hiding in Modern Database Engines.	Proc. VLDB Endow.	2023	DBLP BibTeX RDF
17	Nabil Abubaker, M. Ozan Karsavuran, Cevdet Aykanat	Scalable Unsupervised ML: Latency Hiding in Distributed Sparse Tensor Decomposition.	IEEE Trans. Parallel Distributed Syst.	2022	DBLP DOI BibTeX RDF
17	Rui Xu 0013, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yuhong Song, Jingzhi Lin	Optimal Loop Tiling for Minimizing Write Operations on NVMs with Complete Memory Latency Hiding.	ASP-DAC	2022	DBLP DOI BibTeX RDF
17	Jozef Hladky	Latency hiding and high fidelity novel view synthesis on thin clients using decoupled streaming rendering from powerful servers.		2022	RDF
17	Kyle Singer, Kunal Agrawal, I-Ting Angelina Lee	Scheduling I/O Latency-Hiding Futures in Task-Parallel Platforms.	APOCS	2020	DBLP DOI BibTeX RDF
17	Ahmad O. Aseeri, Yu Zhuang, Mohammed Saeed Alkatheiri, Bipana Thapaliya	LaHiIO: Accelerating Persistent Big Data Machine Learning via Latency Hiding IOs.	IEEE BigData	2018	DBLP DOI BibTeX RDF
17	Bhojan Anand, Pan Wenren	CloudHide: Towards Latency Hiding Techniques for Thin-client Cloud Gaming.	ACM Multimedia (Thematic Workshops)	2017	DBLP DOI BibTeX RDF
17	Keunsoo Kim, Sangpil Lee, Myung Kuk Yoon, Gunjae Koo, Won Woo Ro, Murali Annavaram	Warped-preexecution: A GPU pre-execution approach for improving latency hiding.	HPCA	2016	DBLP DOI BibTeX RDF
17	Hitoshi Sato, Ryo Mizote, Satoshi Matsuoka, Hirotaka Ogawa	I/O chunking and latency hiding approach for out-of-core sorting acceleration using GPU and flash NVM.	IEEE BigData	2016	DBLP DOI BibTeX RDF
17	Stefan K. Muller, Umut A. Acar	Latency-Hiding Work Stealing: Scheduling Interacting Parallel Computations with Work Stealing.	SPAA	2016	DBLP DOI BibTeX RDF
17	Vasily Volkov	Understanding Latency Hiding on GPUs.		2016	RDF
17	Yan Wang 0022, Kenli Li 0001, Keqin Li 0001	Minimizing write operation for multi-dimensional DSP applications via a two-level partition technique with complete memory latency hiding.	J. Syst. Archit.	2015	DBLP DOI BibTeX RDF
17	Bert Vankeirsbilck, Pieter Simoens, Filip De Turck, Piet Demeester, Bart Dhoedt	Network latency hiding in thin client systems through server-centric speculative display updating.	J. Netw. Comput. Appl.	2014	DBLP DOI BibTeX RDF
17	Shin-Ying Lee, Carole-Jean Wu	Characterizing the latency hiding ability of GPUs.	ISPASS	2014	DBLP DOI BibTeX RDF
17	Wanja Hofer	Sloth: The Virtue and Vice of Latency Hiding in Hardware-Centric Operating Systems.		2014	RDF
17	Lili Chen, Wei Li, Jing Zhang, Shuai Shi, Jian-xin Huang	A Latency-Hiding Scheme for Adjacent Interaction Simulation on Multi-core/Many-Core Clusters.	AsiaSim	2013	DBLP DOI BibTeX RDF
17	Benjamin Thielmann, Jens Huthmann, Andreas Koch 0001	Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers.	ACM Trans. Reconfigurable Technol. Syst.	2012	DBLP DOI BibTeX RDF
17	Mads Ruben Burgdorff Kristensen, Brian Vinter	Managing Communication Latency-Hiding at Runtime for Parallel Programming Languages and Libraries	CoRR	2012	DBLP BibTeX RDF
17	Dessalegn Mequanint, Lionel Brunie, Mulugeta Libsie, David Coquil	A latency hiding framework for enhanced ubiquitous access to big data in a constrained digital ecosystem: application to digital medical archives.	MEDES	2012	DBLP DOI BibTeX RDF
17	Tianzhou Chen, Xingsheng Tang, Licheng Yu, Jianliang Ma, Minghui Wu 0001	Improve GPGPU Latency Hiding with a Hybrid Recovery Stack and a Window Based Warp Scheduling Policy.	HPCC-ICESS	2012	DBLP DOI BibTeX RDF
17	Mads Ruben Burgdorff Kristensen, Brian Vinter	Managing Communication Latency-Hiding at Runtime for Parallel Programming Languages and Libraries.	HPCC-ICESS	2012	DBLP DOI BibTeX RDF
17	Lili Chen, Jian-xin Huang, Jing Zhang	A Latency-Hiding Algorithm for ABMS on Parallel/Distributed Computing Environment.	PADS	2012	DBLP DOI BibTeX RDF
17	Kumiko Maeda, Masana Murase, Munehiro Doi, Hideaki Komatsu, Shigeho Noda, Ryutaro Himeno	Automatic Resource Scheduling with Latency Hiding for Parallel Stencil Applications on GPGPU Clusters.	IPDPS	2012	DBLP DOI BibTeX RDF
17		Latency Hiding.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
17	Loren E. Peitso	Communications latency hiding for distributed SoS.	SoSE	2011	DBLP DOI BibTeX RDF
17	Pietro Cicotti	Tarragon : a programming model for latency-hiding scientific computations.		2011	RDF
17	Chun Jason Xue, Jingtong Hu, Zili Shao, Edwin Hsing-Mean Sha	Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding.	ACM Trans. Embed. Comput. Syst.	2010	DBLP DOI BibTeX RDF
17	Meikang Qiu, Gang Wu 0008, Jingtong Hu, Wei-Che Tseng, Edwin Hsing-Mean Sha	Energy Minimization and Latency Hiding for Heterogeneous Parallel Memory.	ICPADS	2009	DBLP DOI BibTeX RDF
17	Florin Isaila, Javier García Blas, Jesús Carretero 0001, Robert Latham, Samuel Lang, Robert B. Ross	Latency Hiding File I/O for Blue Gene Systems.	CCGRID	2009	DBLP DOI BibTeX RDF
17	Zhen Liu 0018, Hao Che, Kai Zheng 0003, Shanzhen Chen, Chengchen Hu, Bin Liu 0001	A Trace Driven Comparison of Latency Hiding Techniques for Network Processors.	ICC	2006	DBLP DOI BibTeX RDF
17	Anthony Theodore Chronopoulos, Charles Michael Johnston	A real-time traffic simulation using a communication latency hiding parallelization.	IEEE Trans. Veh. Technol.	2002	DBLP DOI BibTeX RDF
17	Ahmad Afsahi, Nikitas J. Dimopoulos	Analysis of a Latency Hiding Broadcasting Algorithm on a Reconfigurable Optical Interconnect.	Parallel Process. Lett.	2002	DBLP DOI BibTeX RDF
17	Maria Hybinette, Richard Fujimoto	Latency Hiding with Optimistic Computations.	J. Parallel Distributed Comput.	2002	DBLP DOI BibTeX RDF
17	Sajal K. Das 0001, Daniel J. Harvey, Rupak Biswas	Latency Hiding in Dynamic Partitioning and Load Balancing of Grid Computing Applications.	CCGRID	2001	DBLP DOI BibTeX RDF
17	Charles Michael Johnston, Anthony T. Chronopoulos	A Communication Latency Hiding Parallelization of a Traffic Flow Simulation.	IPPS/SPDP	1999	DBLP DOI BibTeX RDF
17	Ahmad Afsahi, Nikitas J. Dimopoulos	Communications Latency Hiding Techniques for a Reconfigurable Optical Interconnect: Benchmark Studies.	PARA	1998	DBLP DOI BibTeX RDF
17	Joan-Manuel Parcerisa, Antonio González 0001	The Latency Hiding Effectiveness of Decoupled Access/Execute Processors.	EUROMICRO	1998	DBLP DOI BibTeX RDF
17	Roberto Togneri	Parallel program analysis on workstation clusters: speedup profiling and latency hiding.	Concurr. Pract. Exp.	1997	DBLP DOI BibTeX RDF
17	Tarek S. Abdelrahman	Latency hiding on COMA multiprocessors.	J. Supercomput.	1996	DBLP DOI BibTeX RDF
17	Volker Strumpen	Software-Based Communication Latency Hiding for Commodity Workstation Networks.	ICPP, Vol. 1	1996	DBLP DOI BibTeX RDF
17	Rajat Mukherjee, John K. Bennett, Jay A. Greenwood	The Effects of Architecture on the Performance on Latency Hiding Via Rapid Context Switching.	Parallel and Distributed Computing and Systems	1995	DBLP BibTeX RDF
17	Volker Strumpen, Peter Arbenz	Improving Scalability by Communication Latency Hiding.	PPSC	1995	DBLP BibTeX RDF
17	Tarek S. Abdelrahman	Latency Hiding on COMA Multiprocessors.	PDPTA	1995	DBLP BibTeX RDF
17	Ulrich Brüning 0001, Wolfgang K. Giloi, Wolfgang Schröder-Preikschat	Latency Hiding in Message-Passing Architectures.	IPPS	1994	DBLP DOI BibTeX RDF
17	Volker Strumpen, Thomas L. Casavant	Exploting communication Latency Hiding for Parallel Network.	ICPADS	1994	DBLP DOI BibTeX RDF
17	Krishna M. Sivalingam, Patrick W. Dowd	Latency Hiding Strategies Of Pre-allocation Based Media Access Protocols For WDM Photonic Networks.	Annual Simulation Symposium	1993	DBLP DOI BibTeX RDF
17	Daniel Windheiser, Eric L. Boyd, Eric Hao, Santosh G. Abraham, Edward S. Davidson	KSR 1 Multiprocessor: Analysis of Latency Hiding Techniques in a Sparse Solver.	IPPS	1993	DBLP DOI BibTeX RDF
17	Per Stenström	A Latency-Hiding Scheme for Multiprocessors with Buffered Multistage Networks.	IPPS	1992	DBLP DOI BibTeX RDF
14	Joseph Gebis, Leonid Oliker, John Shalf, Samuel Williams 0001, Katherine A. Yelick	Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture.	ARCS	2009	DBLP DOI BibTeX RDF
14	Li Zhao 0002, Laxmi N. Bhuyan, Ravi R. Iyer 0001, Srihari Makineni, Donald Newell	Hardware Support for Accelerating Data Movement in Server Platform.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Copy engine, performance evaluation, TCP/IP, hardware acceleration, servers
14	Fei Chen, Edwin Hsing-Mean Sha	Loop Scheduling and Partitions for Hiding Memory Latencies.	ISSS	1999	DBLP DOI BibTeX RDF
14	Chen Ding, Ken Kennedy	Inter-array Data Regrouping.	LCPC	1999	DBLP DOI BibTeX RDF
14	Thomas Fahringer, Eduard Mehofer	Buffer-Safe Communication Optimization Based on Data Flow Analysis and Performance Prediction.	IEEE PACT	1997	DBLP DOI BibTeX RDF	Communication, Performance Prediction, Data Flow Analysis, Communication Optimization
14	John R. Feehrer, Jon Sauer, Lars H. Ramfelt	Design and Implementation of a Prototype Optical Deflection Network.	SIGCOMM	1994	DBLP DOI BibTeX RDF
10	Surendra Byna, Yong Chen 0001, Xian-He Sun	Taxonomy of Data Prefetching for Multicore Processors.	J. Comput. Sci. Technol.	2009	DBLP DOI BibTeX RDF	taxonomy of prefetching strategies, memory hierarchy, multicore processors, data prefetching
10	Sanpawat Kantabutra, Jakarin Chawachat	On Embedding of a Hypercube in a Completely Overlapping Network.	Theory Comput. Syst.	2009	DBLP DOI BibTeX RDF	Overlapping network, Hypercube, Network embedding