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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 29 occurrences of 28 keywords
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Results
Found 61 publication records. Showing 61 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Jonathan T.-Y. Chang, Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey |
Analysis of pattern-dependent and timing-dependent failures in an experimental test chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 184-193, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
28 | Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, M. Enamul Amyeen |
Defect Diagnosis Based on Pattern-Dependent Stuck-At Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 475-480, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown |
Efficient techniques for gate leakage estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 100-103, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
pattern-dependent, pattern-independent, estimation, leakage, gate leakage |
22 | Nishath Verghese, Richard Rouse, Philippe Hurat |
Predictive models and CAD methodology for pattern dependent variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 213-218, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Alex M. Thomson |
Presynaptic Frequency- and Pattern-Dependent Filtering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Neurosci. ![In: J. Comput. Neurosci. 15(2), pp. 159-202, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
fusion core complex, transmitter release, facilitation, depression, synapse |
22 | Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng |
Dynamic Timing Analysis Considering Power Supply Noise Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 137-144, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
dynamic timing analysis, input pattern dependent, power supply noise, deep submicron designs |
21 | Irith Pomeranz, Sudhakar M. Reddy |
On diagnosis and diagnostic test generation for pattern-dependenttransition faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(6), pp. 791-800, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Desta Tadesse, D. Sheffield, E. Lenge, R. Iris Bahar, Joel Grodstein |
Accurate timing analysis using SAT and pattern-dependent delay models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1018-1023, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Jaekyun Moon, Jongseung Park |
Pattern-dependent noise prediction in signal-dependent noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 19(4), pp. 730-743, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Ahmed M. Shams, Magdy A. Bayoumi |
Performance evaluation of 1-bit CMOS adder cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 27-30, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
17 | Alexander V. Shafarenko, Konstantin S. Turitsyn, Sergei K. Turitsyn |
Information-Theory Analysis of Skewed Coding for Suppression of Pattern-Dependent Errors in Digital Communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 55(2), pp. 237-241, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Jyun-Wei Chen, Ying-Yen Chen, Jing-Jia Liou |
Handling Pattern-Dependent Delay Faults in Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pp. 151-157, 2007, IEEE Computer Society, 0-7695-2812-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Tudor Murgan, Massoud Momeni, Alberto García Ortiz, Manfred Glesner |
A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 323-328, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Di Mu, Tian Xia, Hao Zheng 0001 |
Data Dependent Jitter Characterization Based on Fourier Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 534-544, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
11 | Kai Sheng, Weixin Gai, Zeze Feng, Haowei Niu, Bingyi Ye, Hang Zhou |
A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2023, San Francisco, CA, USA, February 19-23, 2023, pp. 120-121, 2023, IEEE, 978-1-6654-9016-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Vidya A. Chhabria, Sachin S. Sapatnekar |
Analysis of Pattern-dependent Rapid Thermal Annealing Effects on SRAM Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023, pp. 1-7, 2023, IEEE, 979-8-3503-3475-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Weishen Chu, Seyyed Ehsan Esfahani Rashidi, Yanli Zhang, Johann Alsmeier, Toshiyuki Sega |
An Analytical Model for Thin Film Pattern-dependent Asymmetric Wafer Warpage Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMW ![In: IEEE International Memory Workshop, IMW 2022, Dresden, Germany, May 15-18, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-9947-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
11 | Wen-Li Sung, Yiming Li 0005 |
A Nanosized-Metal-Grain Pattern-Dependent Threshold Voltage Model for the Work Function Fluctuation of GAA Si NW MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 168613-168623, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Yi Cai 0002, Hungchang Chien, Meng Xiang, Zihe Hu, Mingyi Gao |
Adaptive Pattern-Dependent Equalization for Coherent Optical Fiber Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OFC ![In: Optical Fiber Communications Conference and Exhibition, OFC 2021, San Francisco, CA, USA, June 6-10, 2021, pp. 1-3, 2021, IEEE, 978-1-943580-86-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
11 | Ai He, Weixin Gai, Kai Sheng, Ninghuang Li |
An Adaptive DFE Using Pattern-Dependent Data-Level Reference in 28 nm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021, pp. 1-4, 2021, IEEE, 978-1-6654-3867-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim |
A pattern-dependent injection-locked CDR for clock-embedded signaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 96, pp. 104708, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
11 | Shanwei Shi, John R. Barry |
Multitrack Detection with 2D Pattern-Dependent Noise Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICC ![In: 2018 IEEE International Conference on Communications, ICC 2018, Kansas City, MO, USA, May 20-24, 2018, pp. 1-6, 2018, IEEE, 978-1-5386-3180-5. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Sasan Zhalehpour, Jiachuan Lin, Hassan Sepehrian, Wei Shi 0007, Leslie A. Rusch |
Countering Pattern Dependent Effects in SiP Modulators with Iterative Learning Control Predistortion for 64QAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECOC ![In: European Conference on Optical Communication, ECOC 2018, Rome, Italy, September 23-27, 2018, pp. 1-3, 2018, IEEE, 978-1-5386-4862-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Jingook Kim |
Statistical Analysis for Pattern-Dependent Simultaneous Switching Outputs (SSO) of Parallel Single-Ended Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1), pp. 156-169, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Dong Hoon Baek, Byungsub Kim, Hong-June Park, Jae-Yoon Sim |
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014, pp. 48-49, 2014, IEEE, 978-1-4799-0918-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
11 | Xiaoliang Zhu, Kishore Padmaraju, Long Chen, Dylan F. Logan, Jason J. Ackert, Andrew P. Knights, Michal Lipson, Keren Bergman |
Pattern-dependent performance of microring modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OFC/NFOEC ![In: 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), Anaheim, CA, USA, March 17-21, 2013, pp. 1-3, 2013, IEEE, 978-1-4799-0457-0. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
11 | Kyriakos E. Zoiros, C. L. Janer, Michael J. Connelly, Evangelia Dimitriadou |
Reduction of pattern-dependent amplitude modulation for RZ data in semiconductor optical amplifier with delay interferometer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSNDSP ![In: 8th International Symposium on Communication Systems, Networks & Digital Signal Processing, CSNDSP 2012, Poznan, Poland, July 18-20, 2012, pp. 1-4, 2012, IEEE, 978-1-4577-1472-6. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
11 | Atul Gupta, Ajay Kumar, Manas Chhabra |
Characterizing Pattern Dependent Delay Effects in DDR Memory Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: Proceedings of the 20th IEEE Asian Test Symposium, ATS 2011, New Delhi, India, November 20-23, 2011, pp. 425-431, 2011, IEEE Computer Society, 978-1-4577-1984-4. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
11 | Lele Jiang, Xiaojing Qin, Lifu Chang, Yuhua Cheng |
Characterization and analysis of pattern dependent variation-aware interconnects for a 65nm technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011, pp. 854-857, 2011, IEEE, 978-1-61284-192-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
11 | Yun Ye, Frank Liu 0001, Min Chen 0024, Yu Cao 0001 |
Variability analysis under layout pattern-dependent rapid-thermal annealing process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 551-556, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dopant activation, layout pattern, rapid-thermal annealing, threshold voltage variation, physical design |
11 | Puneet Gupta 0001, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester |
Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(9), pp. 1614-1624, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Subarna Sinha, Jianfeng Luo, Charles C. Chiang |
Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 1-6, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
11 | Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, Mahmoud Shahram, Kishore Singhal |
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 14-18, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
measurement, process variations, extraction, VLSI interconnects |
11 | Yungsoo Kim, Hwang-Soo Lee |
A decision-feedback equalizer with pattern-dependent feedback for magnetic recording channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 49(1), pp. 9-13, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
11 | Vladimir V. Savchenko, Stanislav Sedukhin |
Pattern Dependent Reconstruction of Raster Digital Elevation Models from Contour Maps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VIIP ![In: Proceedings of the IASTED International Conference on Visualization, Imaging and Image Processing (VIIP 2001), Marbella, Spain, September 3-5, 2001, pp. 237-244, 2001, ACTA Press, 0-88986-309-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
11 | Irith Pomeranz, Sudhakar M. Reddy |
On diagnosis of pattern-dependent delay faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 59-62, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
11 | Takeshi Aihara, Minoru Tsukada |
Temporal-Pattern Dependent Spatial-Distribution of LTP and LTD in Hippocampal CA1 Area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICONIP ![In: The Fifth International Conference on Neural Information Processing, ICONIP'R98, Kitakyushu, Japan, October 21-23, 1998, Proceedings, pp. 625-628, 1998, IOA Press. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP BibTeX RDF |
|
11 | Patrick R. Trischitta, Peddapullaiah Sannuti |
The accumulation of pattern-dependent jitter for a chain of fiber optic regenerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 36(6), pp. 761-765, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
11 | Srinivas Raghvendra, Philippe Hurat |
DFM: Linking Design and Manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 705-708, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Yasuo Takahashi, Akira Fujiwara, Yukinori Ono, Katsumi Murase |
Silicon Single-Electron Devices and Their Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 411-422, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
11 | Alessandro Bogliolo, Luca Benini, Giovanni De Micheli |
Characterization-Free Behavioral Power Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 767-773, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Modeling, Power consumption, RTL Simulation |
8 | Subodh M. Reddy, Rajeev Murgai |
Accurate Substrate Noise Analysis Based on Library Module Characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 355-362, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
5 | Xiaojun Ma, Masoud Hashempour, Lei Wang 0003, Fabrizio Lombardi |
Manufacturing yield of QCA circuits by synthesized DNA self-assembled templates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 275-280, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
design, manufacturing, nanotechnology, defect tolerance |
5 | Hratch Mangassarian, Andreas G. Veneris, Sean Safarpour, Farid N. Najm, Magdy S. Abadir |
Maximum circuit activity estimation using pseudo-boolean satisfiability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1538-1543, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
5 | Ashesh Rastogi, Kunal P. Ganeshpure, Sandip Kundu |
A Study on Impact of Leakage Current on Dynamic Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1069-1072, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
5 | Ashesh Rastogi, Wei Chen, Alodeep Sanyal, Sandip Kundu |
An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 583-588, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
5 | Ashesh Rastogi, Wei Chen, Sandip Kundu |
On Estimating Impact of Loading Effect on Leakage Current in Sub-65nm Scaled CMOS Circuits Based on Newton-Raphson Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 712-715, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
5 | Wenjian Yu, Mengsheng Zhang, Zeyi Wang |
Efficient 3-D extraction of interconnect capacitance considering floating metal fills with boundary element method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1), pp. 12-18, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
5 | Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi 0001, Hiroshi Inokawa, Katsuhiko Nishiguchi, Yasuo Takahashi |
A High-Density Ternary Content-Addressable Memory Using Single-Electron Transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 17-20 May 2006, Singapore, pp. 19, 2006, IEEE Computer Society, 0-7695-2532-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
5 | Anthony Chan Carusone |
Jitter equalization for binary baseband communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 936-939, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
5 | Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valentin Gherman, Michael Garbers, Jürgen Schlöffel |
Implementing a Scheme for External Deterministic Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA, pp. 101-106, 2005, IEEE Computer Society, 0-7695-2314-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Deterministic self-test, external BIST, test data compression, test resource partitioning |
5 | Hiroshi Inokawa, Yasuo Takahashi |
Experimental and Simulation Studies of Single-Electron-Transistor-Based Multiple-Valued Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 16-19 May 2003, Tokyo, Japan, pp. 259-266, 2003, IEEE Computer Society, 0-7695-1918-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
5 | Byungwoo Choi, D. M. H. Walker |
Timing Analysis of Combinational Circuits Including Capacitive Coupling and Statistical Process Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada, pp. 49-54, 2000, IEEE Computer Society, 0-7695-0613-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
interconnect coupling, delay fault model, process variation, timing analysis, delay fault test |
5 | Vikas Mehrotra, Shiou Lin Sam, Duane S. Boning, Anantha P. Chandrakasan, Rakesh Vallishayee, Sani R. Nassif |
A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 172-175, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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5 | Radu Marculescu, Diana Marculescu, Massoud Pedram |
Sequence compaction for power estimation: theory and practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(7), pp. 973-993, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
5 | Michel Renovell, Florence Azaïs, Yves Bertrand |
Detection of Defects Using Fault Model Oriented Test Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 14(1-2), pp. 13-22, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
fault modeling, defect |
5 | Radu Marculescu, Diana Marculescu, Massoud Pedram |
Probabilistic modeling of dependencies during switching activity analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(2), pp. 73-83, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
5 | Nicola Dragone, Roberto Zafalon, Carlo Guardiani, Cristina Silvano |
Power invariant vector compaction based on bit clustering and temporal partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 118-120, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
low power VLSI design, vector compaction, Markov chains, power estimation |
5 | Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò |
Gate-level power and current simulation of CMOS integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 5(4), pp. 473-488, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
5 | Denis Deschacht, Michel Robert, Nadine Azémard-Crestani, Daniel Auvergne |
Post-layout timing simulation of CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(8), pp. 1170-1177, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
5 | Denis Deschacht, P. Pinede, Michel Robert, Daniel Auvergne |
Path runner: an accurate and fast timing analyser. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990, pp. 529-533, 1990, IEEE Computer Society, 0-8186-2024-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
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