Search results for "reseeding"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
134	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	test-per-clock schemes, accumulator-based test pattern generators, built-in self-test, linear feedback shift registers, reseeding
125	C. V. Krishna, Abhijit Jas, Nur A. Touba	Achieving high encoding efficiency with partial dynamic LFSR reseeding.	ACM Trans. Design Autom. Electr. Syst.	2004	DBLP DOI BibTeX RDF	linear finite shift register, compression, Built-in self-test, reseeding
117	Jinkyu Lee 0005, Nur A. Touba	LFSR-Reseeding Scheme Achieving Low-Power Dissipation During Test.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
117	Ahmad A. Al-Yamani, Edward J. McCluskey	Built-In Reseeding for Serial Bist.	VTS	2003	DBLP DOI BibTeX RDF
110	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A highly regular multi-phase reseeding technique for scan-based BIST.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	scan-based schemes, built-in self-test, linear feedback shift registers, reseeding
102	Jinkyu Lee 0005, Nur A. Touba	Low Power Test Data Compression Based on LFSR Reseeding.	ICCD	2004	DBLP DOI BibTeX RDF
102	Erik H. Volkerink, Subhasish Mitra	Efficient Seed Utilization for Reseeding based Compression.	VTS	2003	DBLP DOI BibTeX RDF
86	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	Multiphase BIST: a new reseeding technique for high test-data compression.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
71	Zhanglei Wang, Hongxia Fang, Krishnendu Chakrabarty, Michael Bienek	Deviation-Based LFSR Reseeding for Test-Data Compression.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
71	Chung-Yi Li, Jiung-Sheng Chen, Tsin-Yuan Chang	A chaos-based pseudo random number generator using timing-based reseeding method.	ISCAS	2006	DBLP DOI BibTeX RDF
71	Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota	Combining dictionary coding and LFSR reseeding for test data compression.	DAC	2004	DBLP DOI BibTeX RDF	built-In self test, VLSI test
71	C. V. Krishna, Nur A. Touba	Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression.	ITC	2002	DBLP DOI BibTeX RDF
71	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	A New Reseeding Technique for LFSR-Based Test Pattern Generation.	IOLTW	2001	DBLP DOI BibTeX RDF
63	Seongmoon Wang, Kedarnath J. Balakrishnan, Wenlong Wei	X-Block: An Efficient LFSR Reseeding-Based Method to Block Unknowns for Temporal Compactors.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	output compaction, temporal compactor, blocking unknown values, LFSR reseeding, Built-in Self-Test, BIST, test data compression, MISR, response compaction
55	Zhanglei Wang, Krishnendu Chakrabarty, Michael Bienek	A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression.	ETS	2007	DBLP DOI BibTeX RDF
55	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A ROMless LFSR Reseeding Scheme for Scan-based BIST.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF
55	Ahmad A. Al-Yamani, Edward J. McCluskey	Seed encoding with LFSRs and cellular automata.	DAC	2003	DBLP DOI BibTeX RDF	built-in self test, VLSI Test, reseeding
48	Marie-Lise Flottes, Christian Landrault, A. Petitqueux	Design for sequential testability: an internal state reseeding approach for 100 % fault coverage.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	sequential testability, internal state reseeding, observation points, minimum DFT insertion, non-scan approach, fault efficiency, 100 percent, fault diagnosis, logic testing, controllability, controllability, design for testability, logic design, sequential circuits, automatic test pattern generation, ATPG, observability, fault coverage, flip-flops, at-speed testing, benchmark circuits, CPU time, partial reset
48	Gerhard Fischer, Raymond McCall, Jonathan L. Ostwald, Brent Reeves, Frank M. Shipman III	Seeding, evolutionary growth and reseeding: supporting the incremental development of design environments.	CHI	1994	DBLP DOI BibTeX RDF	domain-orientation, end-user modifiability, evolution of information spaces, annotation, collaborative design, tacit knowledge, design environments, situated cognition, seeds, reseeding, incremental formalization
47	Ahmad A. Al-Yamani, Edward J. McCluskey	BIST-Guided ATPG.	ISQED	2005	DBLP DOI BibTeX RDF
40	Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang	SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling.	DATE	2007	DBLP DOI BibTeX RDF
40	Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar	Hybrid BIST Optimization Using Reseeding and Test Set Compaction.	DSD	2007	DBLP DOI BibTeX RDF
40	Snehal Udar, Dimitri Kagaris	LFSR Reseeding with Irreducible Polynomials.	IOLTS	2007	DBLP DOI BibTeX RDF
40	Bin Zhou, Yizheng Ye, Yongsheng Wang	Simultaneous reduction in test data volume and test time for TRC-reseeding.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	encoded vector, twisted-ring counter, built-in self test
40	Hong-Sik Kim, Sungho Kang 0001	Increasing encoding efficiency of LFSR reseeding-based test compression.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
40	Stelios Neophytou, Maria K. Michael, Spyros Tragoudas	Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding.	IOLTS	2006	DBLP DOI BibTeX RDF
40	Yu-Hsuan Fu, Sying-Jyan Wang	Test Data Compression with Partial LFSR-Reseeding.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
40	Jiann-Chyi Rau, Ying-Fu Ho, Po-Han Wu	A novel reseeding mechanism for pseudo-random testing of VLSI circuits.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
40	Emmanouil Kalligeros, D. Kaseridis, Xrysovalantis Kavousianos, Dimitris Nikolos	Reseeding-Based Test Set Embedding with Reduced Test Sequences.	ISQED	2005	DBLP DOI BibTeX RDF
40	Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey	Bist Reseeding with very few Seeds.	VTS	2003	DBLP DOI BibTeX RDF
40	Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu	On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding.	ITC	2003	DBLP DOI BibTeX RDF
40	Nahmsuk Oh, Rohit Kapur, Thomas W. Williams	Fast seed computation for reseeding shift register in test pattern compression.	ICCAD	2002	DBLP DOI BibTeX RDF
40	Sybille Hellebrand, Huaguo Liang, Hans-Joachim Wunderlich	A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	store and generate schemes, BIST, deterministic BIST
39	Shivakumar Swaminathan, Krishnendu Chakrabarty	On Using Twisted-Ring Counters for Test Set Embedding in BIST.	J. Electron. Test.	2001	DBLP DOI BibTeX RDF	non-intrusive testing, scalable BIST, test-per-clock, reseeding, deterministic BIST
39	Albrecht P. Stroele, Frank Mayer	Methods to reduce test application time for accumulator-based self-test.	VTS	1997	DBLP DOI BibTeX RDF	accumulator-based self-test, test length minimization, simulation-based reseeding method, random pattern testable circuits, reverse order simulation, hard fault detection, optimal input value, test length reductions, data path blocks, BIST scheme, ATALANTA fault simulation, combinatorial circuit testing, built-in self test, fault coverage, embedded processor, test pattern generators, circuit optimization, test application time reduction, forward simulation
31	Hong-Sik Kim, Sungho Kang 0001, Michael S. Hsiao	A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	Keyword System on a chip, Test compression, Low power testing, Scan testing
31	Richard Putman	Using reiterative LFSR based X-masking to increase output compression in presence of unknowns.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	reiterative, x-masking, compression, LFSR
31	Salvador Manich, Lucas Garcia-Deiros, Joan Figueras	Minimizing Test Time in Arithmetic Test-Pattern Generators With Constrained Memory Resources.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
31	Kedarnath J. Balakrishnan	Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding.	VLSI Design	2007	DBLP DOI BibTeX RDF
31	Salvador Manich, L. García, Luz Balado, Emili Lupon, Josep Rius 0001, Rosa Rodríguez-Montañés, Joan Figueras	BIST Technique by Equally Spaced Test Vector Sequences.	VTS	2004	DBLP DOI BibTeX RDF
31	Salvador Manich, A. Gabarró, M. Lopez, Joan Figueras, Patrick Girard 0001, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, João Paulo Teixeira 0001, Marcelino B. Santos	Low Power BIST by Filtering Non-Detecting Vectors.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	low power BIST, low energy consumption, LFSR, gated clock
24	Chen Wang, Weikang Qian	Linear Feedback Shift Register Reseeding for Stochastic Circuit Repairing and Minimization.	ASP-DAC	2022	DBLP DOI BibTeX RDF
24	Ian von Hegner	A trampoline effect occurring in the stages of planetary reseeding.	Biosyst.	2021	DBLP DOI BibTeX RDF
24	Xiaorong Lv, Xiao Wang, Zhiwei Tian, Lihua Zhang	Design of Automatic Reseeding System of Air suction Precision Metering Seeding Device for corn.	Mechatron. Syst. Control.	2020	DBLP DOI BibTeX RDF
24	Xiaodan Wu, Haibo Li, Xiaohui Xu, Huafeng Wei	CT lesion recognition algorithm based on improved particle reseeding method.	Pattern Recognit. Lett.	2019	DBLP DOI BibTeX RDF
24	Jen-Cheng Ying, Wang-Dauh Tseng, Wen-Jiin Tsai	Asymmetry dual-LFSR reseeding for low power BIST.	Integr.	2018	DBLP DOI BibTeX RDF
24	Haiying Yuan, Changshi Zhou, Xun Sun, Kai Zhang, Tong Zheng, Chang Liu, Xiuyu Wang	LFSR Reseeding-Oriented Low-Power Test-Compression Architecture for Scan Designs.	J. Electron. Test.	2018	DBLP DOI BibTeX RDF
24	Justin Sunu, Blake Hunter, Allon G. Percus	Unsupervised vehicle recognition using incremental reseeding of acoustic signatures.	CoRR	2018	DBLP BibTeX RDF
24	Justin Sunu, Allon G. Percus, Blake Hunter	Unsupervised Vehicle Recognition Using Incremental Reseeding of Acoustic Signatures.	ISMIS	2018	DBLP DOI BibTeX RDF
24	Jen-Cheng Ying, Wang-Dauh Tseng, Wen-Jiin Tsai	Bipolar Dual-LFSR Reseeding for Low-Power Testing.	DSC	2018	DBLP DOI BibTeX RDF
24	Dong Xiang, Xiaoqing Wen, Laung-Terng Wang	Low-Power Scan-Based Built-In Self-Test Based on Weighted Pseudorandom Test Pattern Generation and Reseeding.	IEEE Trans. Very Large Scale Integr. Syst.	2017	DBLP DOI BibTeX RDF
24	Elaheh Sadredini, Mohammadreza Najafi, Mahmood Fathy, Zainalabedin Navabi	BILBO-friendly Hybrid BIST Architecture with Asymmetric Polynomial Reseeding.	CoRR	2017	DBLP BibTeX RDF
24	Tian Chen, Dandan Shen, Xin Yi, Huaguo Liang, Xiaoqing Wen, Wei Wang 0310	Reseeding-Oriented Test Power Reduction for Linear-Decompression-Based Test Compression Architectures.	IEICE Trans. Inf. Syst.	2016	DBLP DOI BibTeX RDF
24	Shuai Chen, Bing Li	A Dynamic Reseeding DRBG Based on SRAM PUFs.	CyberC	2016	DBLP DOI BibTeX RDF
24	Ki-Hong Kim, Min-cheol Gwak, Jack J. Yoh	An Enhanced Particle Reseeding Algorithm for the Hybrid Particle Level Set Method in Compressible Flows.	J. Sci. Comput.	2015	DBLP DOI BibTeX RDF
24	Ondrej Novák, Jiri Jenícek, Martin Rozkovec	LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs.	DDECS	2015	DBLP DOI BibTeX RDF
24	Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty	Efficient LFSR Reseeding Based on Internal-Response Feedback.	J. Electron. Test.	2014	DBLP DOI BibTeX RDF
24	Xavier Bresson, Huiyi Hu, Thomas Laurent 0001, Arthur Szlam, James H. von Brecht	An Incremental Reseeding Strategy for Clustering.	CoRR	2014	DBLP BibTeX RDF
24	Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty	A New LFSR Reseeding Scheme via Internal Response Feedback.	Asian Test Symposium	2013	DBLP DOI BibTeX RDF
24	Peter Wohl, John A. Waicukauski, Frederic Neuveux, Gregory A. Maston, Nadir Achouri, Jonathon E. Colburn	Two-level compression through selective reseeding.	ITC	2013	DBLP DOI BibTeX RDF
24	Chung-Yi Li, Yuan-Ho Chen, Tsin-Yuan Chang, Lih-Yuan Deng, Kiwing To	Period Extension and Randomness Enhancement Using High-Throughput Reseeding-Mixing PRNG.	IEEE Trans. Very Large Scale Integr. Syst.	2012	DBLP DOI BibTeX RDF
24	Lung-Jen Lee, Wang-Dauh Tseng, Wen-Ting Yang	Dual-LFSR Reseeding for Low Power Testing.	MTV	2012	DBLP DOI BibTeX RDF
24	Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh	A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume.	Asian Test Symposium	2012	DBLP DOI BibTeX RDF
24	Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram	A Novel SMT-Based Technique for LFSR Reseeding.	VLSI Design	2012	DBLP DOI BibTeX RDF
24	Xrysovalantis Kavousianos, Vasileios Tenentes, Krishnendu Chakrabarty, Emmanouil Kalligeros	Defect-Oriented LFSR Reseeding to Target Unmodeled Defects Using Stuck-at Test Sets.	IEEE Trans. Very Large Scale Integr. Syst.	2011	DBLP DOI BibTeX RDF
24	Wenfa Zhan, Jun Ma, Shanshan Du, Jun Liu	A LFSR Reseeding Scheme Based on Division by 2 to the Power of Integer.	J. Digit. Content Technol. its Appl.	2010	DBLP BibTeX RDF
24	Piyanart Kongtim, Taweesak Reungpeerakul	Parallel LFSR Reseeding with Selection Register for Mixed-Mode BIST.	Asian Test Symposium	2010	DBLP DOI BibTeX RDF
24	Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang	Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
24	Mahmut Yilmaz, Krishnendu Chakrabarty	Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects.	DATE	2009	DBLP DOI BibTeX RDF
24	Hongxia Fang, Krishnendu Chakrabarty, Rubin A. Parekhji	Bit-Operation-Based Seed Augmentation for LFSR Reseeding with High Defect Coverage.	Asian Test Symposium	2009	DBLP DOI BibTeX RDF
24	Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar	Hybrid BIST optimization using reseeding and test set compaction.	Microprocess. Microsystems	2008	DBLP DOI BibTeX RDF
24	Tian Chen, Huaguo Liang, Minsheng Zhang, Wei Wang 0310	A Scheme of Test Pattern Generation Based on Reseeding of Segment-Fixing Counter.	ICYCS	2008	DBLP DOI BibTeX RDF
24	Artur Jutman, Igor Aleksejev, Jaan Raik, Raimund Ubar	Reseeding using compaction of pre-generated LFSR sub-sequences.	ICECS	2008	DBLP DOI BibTeX RDF
24	Myung-Hoon Yang, Youbean Kim, Youngkyu Park, D. Lee, Sungho Kang	Deterministic built-in self-test using split linear feedback shift register reseeding for low-power testing.	IET Comput. Digit. Tech.	2007	DBLP DOI BibTeX RDF
24	Seongmoon Wang, Wenlong Wei, Srimat T. Chakradhar	A High Compression and Short Test Sequence Test Compression Technique to Enhance Compressions of LFSR Reseeding.	ATS	2007	DBLP DOI BibTeX RDF
24	Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar	Efficient unknown blocking using LFSR reseeding.	DATE	2006	DBLP DOI BibTeX RDF
24	Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey	Optimized reseeding by seed ordering and encoding.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
24	Youhua Shi, Zhe Zhang, Shinji Kimura, Masao Yanagisawa, Tatsuo Ohtsuki	A Built-in Reseeding Technique for LFSR-Based Test Pattern Generation.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2003	DBLP BibTeX RDF
24	Nan-Cheng Li, Sying-Jyan Wang	A Reseeding Technique for LFSR-Based BIST Applications.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF	Reseedling, LFST, BIST, Test Pattern Generator, Pseudo-Random Testing
24	Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Hans-Joachim Wunderlich	On applying the set covering model to reseeding.	DATE	2001	DBLP DOI BibTeX RDF
24	Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	A novel reseeding technique for accumulator-based test pattern generation.	ACM Great Lakes Symposium on VLSI	2001	DBLP DOI BibTeX RDF
24	C. V. Krishna, Abhijit Jas, Nur A. Touba	Test vector encoding using partial LFSR reseeding.	ITC	2001	DBLP DOI BibTeX RDF
24	S. Caceres, J. M. Ruiz, F. A. Trelles, J. A. Domingues, S. de Pablo	On the Study of a New BIST Technique Using Reseeding of Linear Feedback Shift Register toAccelerate the Test.	LATW	2000	DBLP BibTeX RDF
24	Sybille Hellebrand, Hans-Joachim Wunderlich, Huaguo Liang	A mixed mode BIST scheme based on reseeding of folding counters.	ITC	2000	DBLP DOI BibTeX RDF
24	Gerhard Fischer	Seeding, Evolutionary Growth and Reseeding: Constructing, Capturing and Evolving Knowledge in Domain-Oriented Design Environments.	Autom. Softw. Eng.	1998	DBLP DOI BibTeX RDF
24	Pieter M. Trouborst	LFSR Reseeding as a Component of Board Level BIST.	ITC	1996	DBLP DOI BibTeX RDF
24	Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois	Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF
24	Gerhard Fischer, Raymond McCall, Jonathan L. Ostwald, Brent Reeves, Frank M. Shipman III	Seeding, evolutionary growth and reseeding: supporting the incremental development of design environments.	CHI Conference Companion	1994	DBLP DOI BibTeX RDF
24	Sybille Hellebrand, Steffen Tarnick, Bernard Courtois, Janusz Rajski	Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers.	ITC	1992	DBLP DOI BibTeX RDF
23	Myung-Hoon Yang, YongJoon Kim, Sunghoon Chun, Sungho Kang 0001	An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	Built-in self-test, Power consumption, Linear feedback shift register, Reseeding
23	Gerhard Fischer	Meta-design: Expanding Boundaries and Redistributing Control in Design.	INTERACT (1)	2007	DBLP DOI BibTeX RDF	socio-technical environments, seeding / evolutionary growth / reseeding model, Web2Gether, Memory Aiding Prompting System (MAPS), application areas for meta-design, socially responsible design, design, control, design methodologies, boundaries, meta-design
23	Yunwen Ye, Gerhard Fischer	Reuse-Conducive Development Environments.	Autom. Softw. Eng.	2005	DBLP DOI BibTeX RDF	reuse-conducive environments, high-functionality applications, relevance to the task-at-hand, modification model, centralized and decentralized development of reuse repositories, evolutionary growth, reseeding model, CodeBroker, personalization, software reuse, location, comprehension, latent semantic analysis, information delivery, seeding
23	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST.	ISQED	2002	DBLP DOI BibTeX RDF	Test-per-Clock Schemes, Reseeding Techniques, Built-In Self-Test, Linear Feedback Shift Registers, Test Pattern Generation
23	Abhijit Jas, Bahram Pouya, Nur A. Touba	Virtual Scan Chains: A Means for Reducing Scan Length in Cores.	VTS	2000	DBLP DOI BibTeX RDF	Compression/Decompression, Virtual Scan, Built-In Self-Test, Mapping, Design-for-Testability, LFSR, System Integrator, Integrated Circuits, Integrated Circuits, Scan Chains, Embedded Cores, Digital Testing, Reseeding
23	Janusz Rajski, Jerzy Tyszer, Nadime Zacharia	Test Data Decompression for Multiple Scan Designs with Boundary Scan.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	reseeding of LFSRs, multiple scan chains, test data decompression, built-in self-test, design for testability, Boundary scan, scan-based designs
16	Seongmoon Wang, Wenlong Wei	An Efficient Unknown BlockingScheme for Low Control Data Volume and High Observability.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
16	Vasileios Tenentes, Xrysovalantis Kavousianos, Emmanouil Kalligeros	State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores.	DATE	2008	DBLP DOI BibTeX RDF
16	Lei Li 0036, Zhanglei Wang, Krishnendu Chakrabarty	Scan-BIST based on cluster analysis and the encoding of repeating sequences.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	clustering test data volume, Built-in self-test (BIST), test compression
16	Seongmoon Wang, Wenlong Wei, Srimat T. Chakradhar	Unknown blocking scheme for low control data volume and high observability.	DATE	2007	DBLP DOI BibTeX RDF
16	Gert Jervan, Helena Kruus, Elmet Orasson, Raimund Ubar	Optimization of Memory-Constrained Hybrid BIST for Testing Core-Based Systems.	SIES	2007	DBLP DOI BibTeX RDF