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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1729 occurrences of 545 keywords
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Results
Found 1860 publication records. Showing 1843 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
37 | Jerzy J. Dabrowski |
BiST Model for IC RF-Transceiver Front-End. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
37 | Graham Hetherington, Richard Simpson |
Circular BIST testing the digital logic within a high speed Serdes. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
37 | Xiaoding Chen, Michael S. Hsiao |
Characteristic faults and spectral information for logic BIST. |
ICCAD |
2002 |
DBLP DOI BibTeX RDF |
|
37 | Ganapathy Kasturirangan, Michael S. Hsiao |
Spectrum-Based BIST in Complex SOCs. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
|
37 | Hung-Kai Chen 0001, Chih-Hu Wang, Chau-Chin Su |
A Self Calibrated ADC BIST Methodology. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
|
37 | Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001, Salvador Manich, Rosa Rodríguez-Montañés, Joan Figueras |
RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
|
37 | Ken-ichi Yamaguchi, Hiroki Wada, Toshimitsu Masuzawa, Hideo Fujiwara |
BIST Method Based on Concurrent Single-Control Testability of RTL Data Paths. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
RTL data path, single-control testability, built-in self-test, design for testability, concurrent test, hierarchical test |
37 | Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie |
An efficient BIST method for testing of embedded SRAMs. |
ISCAS (5) |
2001 |
DBLP DOI BibTeX RDF |
|
37 | Farzin Karimi, Fabrizio Lombardi |
Parallel Testing of Multi-port Static Random Access Memories for BIST. |
DFT |
2001 |
DBLP DOI BibTeX RDF |
Memory testing, embedded memory, multi-port, parallel testing |
37 | Patrick Girard 0001, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Hans-Joachim Wunderlich |
A Modified Clock Scheme for a Low Power BIST Test Pattern Generator. |
VTS |
2001 |
DBLP DOI BibTeX RDF |
|
37 | Pramodchandran N. Variyam, Abhijit Chatterjee |
Digital-Compatible BIST for Analog Circuits Using Transient Response Sampling. |
IEEE Des. Test Comput. |
2000 |
DBLP DOI BibTeX RDF |
|
37 | Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian |
Effective Low Power BIST for Datapaths. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
|
37 | Jayabrata Ghosh-Dastidar, Nur A. Touba |
A Rapid and Scalable Diagnosis Scheme for BIST Environments with a Large Number of Scan Chains. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
built-in self-test Scan Chains, Design-for-Diagnosis, Multi-Input Signature Register, Design-for-Testability, LFSR, Integrated Circuits, Integrated Circuits, Digital Testing, Design-for-Debug |
37 | Frank Mayer, Albrecht P. Stroele |
A Versatile BIST Technique Combining Test Registers and Accumulators. |
VLSI Design |
2000 |
DBLP DOI BibTeX RDF |
test register, built-in self-test, register-transfer level, accumulator |
37 | Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian |
An Effective BIST Architecture for Fast Multiplier Cores. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Nicola Nicolici, Bashir M. Al-Hashimi |
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Iyad Rayane, Jaime Velasco-Medina, Michael Nicolaidis |
A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik |
Symmetric Transparent BIST for RAMs. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich |
Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. |
EDCC |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Hyunjin Kim, Jongchul Shin, Sungho Kang 0001 |
An Efficient Interconnect Test Using BIST Module in a Boundary-Scan Environment. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Jaime Velasco-Medina, Iyad Rayane, Michael Nicolaidis |
On-Line BIST for Testing Analog Circuits. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Xiaowei Li 0001, Paul Y. S. Cheung |
Exploiting Test Resource Optimization in Data Path Synthesis for BIST. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
37 | Chih-Ang Chen, Sandeep K. Gupta |
Efficient BIST TPG design and test set compaction via input reduction. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Madhavi Karkala, Nur A. Touba, Hans-Joachim Wunderlich |
Special ATPG to Correlate Test Patterns for Low-Overhead Mixed-Mode BIST. |
Asian Test Symposium |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Xiaowei Li 0001, Paul Y. S. Cheung |
Exploiting BIST Approach for Two-Pattern Testing. |
Asian Test Symposium |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Srinivas Devadas, Kurt Keutzer |
An algorithmic approach to optimizing fault coverage for BIST logic synthesis. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Zhe Zhao, Bahram Pouya, Nur A. Touba |
BETSY: synthesizing circuits for a specified BIST environment. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Huan-Chih Tsai, Sudipta Bhawmik, Kwang-Ting Cheng |
An almost full-scan BIST solution-higher fault coverage and shorter test application time. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Indradeep Ghosh, Niraj K. Jha, Sudipta Bhawmik |
A BIST Scheme for RTL Controller-Data Paths Based on Symbolic Testability Analysis. |
DAC |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Ishwar Parulkar, Sandeep K. Gupta 0001, Melvin A. Breuer |
Introducing Redundant Computations in a Behavior for Reducing BIST Resources. |
DAC |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Debaleena Das, Mark G. Karpovsky |
Exhaustive and Near-Exhaustive Memory Testing Techniques and their BIST Implementations. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
exhaustive codes, near-exhaustive codes, built-in self-test, memory testing, pattern sensitive faults |
37 | Dariusz Badura, Andrzej Hlawiczka |
Low Cost Bist for Edac Circuits. |
Asian Test Symposium |
1997 |
DBLP DOI BibTeX RDF |
CBIST, EDAC, error aliasing, fault coverage, self-test |
37 | Chen-Huan Chiang, Sandeep K. Gupta 0001 |
BIST TPGs for Faults in Board Level Interconnect via Boundary Scan. |
VTS |
1997 |
DBLP DOI BibTeX RDF |
|
37 | Debesh Kumar Das, Susanta Chakraborty, Bhargab B. Bhattacharya |
New BIST Techniques for Universal and Robust Testing of CMOS Stuck-Open Faults. |
VLSI Design |
1997 |
DBLP DOI BibTeX RDF |
|
37 | Abu S. M. Hassan, Vinod K. Agarwal, Benoit Nadeau-Dostie, Janusz Rajski |
BIST of PCB interconnects using boundary-scan architecture. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1992 |
DBLP DOI BibTeX RDF |
|
37 | Kwanghyun Kim, Joseph G. Tront, Dong Sam Ha |
BIDES: A BIST design expert system. |
J. Electron. Test. |
1991 |
DBLP DOI BibTeX RDF |
knowledge-based expert system, Built-in self-test, design for testability, pseudorandom testing |
36 | Wu-Tung Cheng |
Current status and future trend on CAD tools for VLSI testing Wu-Tung Cheng. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
test logic, deep Sub-Micron technologies, scan-based ATPG, test application cost, test development, VLSI, CAD, logic testing, built-in self test, system on chip, SoC, automatic test pattern generation, automatic test pattern generation, ATPG, BIST, VLSI design, integrated circuit design, circuit CAD, VLSI testing, embedded memories, test quality, integrated circuit economics |
36 | Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray |
Deterministic Built-in Pattern Generation for Sequential Circuits. |
J. Electron. Test. |
1999 |
DBLP DOI BibTeX RDF |
Comma coding, pattern decoding, statistical encoding, BIST, Huffman coding, run-length encoding, embedded-core testing, sequential circuit testing |
36 | Ondrej Novák |
Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata. |
EDCC |
1999 |
DBLP DOI BibTeX RDF |
linear cyclic codes, hardware test pattern generators, weighted random testing, Cellular automata, BIST, linear feedback shift registers, pseudoexhaustive testing |
36 | Ivo Schanstra, Dharmajaya Lukita, Ad J. van de Goor, Kees Veelenturf, Paul J. van Wijnen |
Semiconductor manufacturing process monitoring using built-in self-test for embedded memories. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
diagnosis, BIST, fault localization, process monitoring, bitmap, RAM testing, microcode |
36 | Yuejian Wu, Sanjay Gupta |
Built-In Self-Test for Multi-Port RAMs. |
Asian Test Symposium |
1997 |
DBLP DOI BibTeX RDF |
Random Access Memory (RAM) test, multi-port RAM test, Built-In Self-Test (BIST) |
34 | Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin |
Test Time Minimization for Hybrid BIST of Core-Based Systems. |
J. Comput. Sci. Technol. |
2006 |
DBLP DOI BibTeX RDF |
hybrid BIST, SoC, self-test |
34 | Luís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro |
A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting. |
J. Electron. Test. |
2006 |
DBLP DOI BibTeX RDF |
analogue BIST, analogue-to-digital converter, mixed-signal testing, sigma-delta modulation |
34 | Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy 0001 |
Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
Test-per-scan BIST, delay sensor, fault diagnosis, fault localization, test point insertion |
34 | Ismet Bayraktaroglu, Alex Orailoglu |
The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
Fault diagnosis, finite field arithmetic, scan-based BIST |
34 | Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas |
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. |
J. Electron. Test. |
2005 |
DBLP DOI BibTeX RDF |
BIST, analog testing, mixed-signal testing, sigma-delta modulation |
34 | Ilia Polian, Bernd Becker 0001 |
Scalable Delay Fault BIST for Use with Low-Cost ATE. |
J. Electron. Test. |
2004 |
DBLP DOI BibTeX RDF |
thermal constraints, BIST, SAT, delay testing, IP cores, symbolic methods |
34 | Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker 0001 |
X-Masking During Logic BIST and Its Impact on Defect Coverage. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
X-Masking, Resistive Bridging Faults, Defect Coverage, Logic BIST |
34 | Valentin Gherman, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Michael Garbers |
Efficient Pattern Mapping for Deterministic Logic BIST. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
BDDs, Logic BIST |
34 | Marie-Lise Flottes, Christian Landrault, A. Petitqueux |
A Unified DFT Approach for BIST and External Test. |
J. Electron. Test. |
2003 |
DBLP DOI BibTeX RDF |
BIST, DFT, test point insertion, partial reset |
34 | Nadir Z. Basturkmen, Sudhakar M. Reddy, Irith Pomeranz |
A Low Power Pseudo-Random BIST Technique. |
J. Electron. Test. |
2003 |
DBLP DOI BibTeX RDF |
low power, BIST, scan, pseudo-random, peak power |
34 | Peter Wohl, John A. Waicukauski, Sanjay Patel, Minesh B. Amin |
Efficient compression and application of deterministic patterns in a logic BIST architecture. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
test-generation (ATPG), self-test (BIST) |
34 | Wei Li 0023, Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz |
A scan BIST generation method using a markov source and partial bit-fixing. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
testing, BIST, markov |
34 | Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin |
Ultimate low cost analog BIST. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
DSP-based analog test, low cost analog BIST, test of analog circuits |
34 | Magnus Eckersand, Fredrik Franzon, Ken Filliter |
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function. |
J. Electron. Test. |
2002 |
DBLP DOI BibTeX RDF |
LVDS, BIST, differential, At-speed |
34 | Nan-Cheng Li, Sying-Jyan Wang |
A Reseeding Technique for LFSR-Based BIST Applications. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
Reseedling, LFST, BIST, Test Pattern Generator, Pseudo-Random Testing |
34 | Liviu Miclea, Szilárd Enyedi, Alfredo Benso |
Itelligent Agents and BIST/BISR - Working Together in Distributed Systems. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
distributed systems BIST, distributed BISR, Intelligent agent, self-repair, embedded testing, high-level testing |
34 | Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell |
A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs. |
J. Electron. Test. |
2001 |
DBLP DOI BibTeX RDF |
Built-In Self-Test (BIST), analog and mixed-signal testing, ADC test |
34 | Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell |
Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST. |
J. Electron. Test. |
2001 |
DBLP DOI BibTeX RDF |
Built-In Self-Test (BIST), analog and mixed-signal testing, ADC test |
34 | Stefan Gerstendörfer, Hans-Joachim Wunderlich |
Minimized Power Consumption for Scan-Based BIST. |
J. Electron. Test. |
2000 |
DBLP DOI BibTeX RDF |
build-in self-test (BIST), power consumption |
34 | S. L. Lin, S. Mourad, S. Krishnan |
A BIST methodology for at-speed testing of data communications transceivers. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
data communication equipment, telecommunication equipment testing, BIST methodology, data communications transceivers, data communications chip, 3-port IEEE 1394a system, CMOS implementation, 0.35 micron, 400 Mbit/s, built-in self test, integrated circuit testing, automatic testing, functional testing, CMOS integrated circuits, at-speed testing, transceivers |
34 | Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults. |
IOLTW |
2000 |
DBLP DOI BibTeX RDF |
BIST, Random Testing, Delay Testing, Bridging Faults |
34 | Xiaodong Zhang 0010, Kaushik Roy 0001 |
Peak Power Reduction in Low Power BIST. |
ISQED |
2000 |
DBLP DOI BibTeX RDF |
BIST Synthesis, Weighted Random Pattern Generator, Testing, Low Power |
34 | Hans G. Kerkhoff, Mansour Shashaani, Manoj Sachdev |
A Low-Speed BIST Framework for High-Performance Circuit Testing. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
controlled-delay flip-flops, BIST, Delay-fault testing, design for delay testability |
34 | Laurent Bréhélin, Olivier Gascuel, Gilles Caraux, Patrick Girard 0001, Christian Landrault |
Hidden Markov and Independence Models with Patterns for Sequential BIST. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
Machine Learning, HMM, Sequential Circuit, BIST |
34 | Jeongjin Roh, Jacob A. Abraham |
A Mixed-Signal BIST Scheme with Time-Division Multiplexing (TDM) Comparator and Counters. |
VLSI Design |
2000 |
DBLP DOI BibTeX RDF |
BIST, Time-division multiplexing, Comparator, Mixed-signal, Signature analyzer |
34 | Gundolf Kiefer, Hans-Joachim Wunderlich |
Deterministic BIST with Multiple Scan Chains. |
J. Electron. Test. |
1999 |
DBLP DOI BibTeX RDF |
deterministic scan-based BIST, multiple scan paths, parallel scan |
34 | Patrick Girard 0001, Christian Landrault, V. Moreda, Serge Pravossoudovitch, Arnaud Virazel |
A Scan-BIST Structure to Test Delay Faults in Sequential Circuits. |
J. Electron. Test. |
1999 |
DBLP DOI BibTeX RDF |
BIST, delay faults, scan design |
34 | Gundolf Kiefer, Hans-Joachim Wunderlich |
Deterministic BIST with multiple scan chains. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
deterministic scan-based BIST, multiple scan paths, parallel scan |
34 | Walter W. Weber, Adit D. Singh |
Incorporating IDDQ Testing with BIST for Improved Coverage: An Experimental Study. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
open faults, BIST, fault coverage, built in current sensor, BICS, I DDQ |
34 | Michinobu Nakao, Kazumi Hatayama, Isao Higashi |
Accelerated Test Points Selection Method for Scan-Based BIST. |
Asian Test Symposium |
1997 |
DBLP DOI BibTeX RDF |
Test points, Optimization, BIST, Testability |
34 | Kowen Lai, Christos A. Papachristou, Mikhail Baklashov |
BIST testability enhancement using high level test synthesis for behavioral and structural designs. |
Asian Test Symposium |
1997 |
DBLP DOI BibTeX RDF |
BIST testability, behavioral designs, industrial benchmark, controllability, built-in self test, observability, DFT, transparency, fidelity, structural designs, high level test synthesis |
34 | Meng-Lieh Sheu, Chung-Len Lee 0001 |
A programmable multiple-sequence generator for BIST applications. |
Asian Test Symposium |
1995 |
DBLP DOI BibTeX RDF |
programmable multiple-sequence generator, BIST applications, two-dimension-like feedback shift register, deterministic sequence, pseudo-random vectors, sequence segmentation method, stuck-open fault testing, logic testing, delays, built-in self test, sequential circuits, shift registers, delay fault testing, binary sequences, sequential circuit testing, regular structure, MCM testing |
34 | Michael Nicolaidis, O. Kebichi, Vladimir Castro Alves |
Trade-offs in scan path and BIST implementations for RAMs. |
J. Electron. Test. |
1994 |
DBLP DOI BibTeX RDF |
RAM test algorithms, BIST, Aliasing, signature analysis, scan path, coupling faults |
31 | Kapal Dev, Sunder Ali Khowaja, Ankur Singh Bist, Vaibhav Saini, Surbhi Bhatia |
Triage of potential COVID-19 patients from chest X-ray images using hierarchical convolutional networks. |
Neural Comput. Appl. |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Sachin Subedi, Ramesh Bist, Xiao Yang, Lilong Chai |
Tracking pecking behaviors and damages of cage-free laying hens with machine vision technologies. |
Comput. Electron. Agric. |
2023 |
DBLP DOI BibTeX RDF |
|
31 | A. Asha, Ashish Kumar Srivastava, Nitika Vats Doohan, Dharmendra Sharma, Ankur Singh Bist, Rahul Neware, Sarvesh Kumar |
An optimized DEEC approach for efficient packet transmission in sensor based IoTs network. |
Microprocess. Microsystems |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Prem Singh Bist, Hilal Tayara, Kil To Chong 0001 |
Sars-escape network for escape prediction of SARS-COV-2. |
Briefings Bioinform. |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Xiao Yang, Haixing Dai, Zihao Wu 0001, Ramesh Bist, Sachin Subedi, Jin Sun, Guoyu Lu, Changying Li, Tianming Liu 0001, Lilong Chai |
SAM for Poultry Science. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Xiao Yang, Ramesh Bist, Sachin Subedi, Zihao Wu 0001, Tianming Liu 0001, Lilong Chai |
An automatic classifier for monitoring applied behaviors of cage-free laying hens with deep learning. |
Eng. Appl. Artif. Intell. |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Raja Varma Pamba, Rahul Bhandari, A. Asha, Rahul Neware, Ankur Singh Bist |
Novel Deep Learning Approach to Support Optimal Resource Allocation in 5G Environment. |
J. Mobile Multimedia |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Raja Varma Pamba, Rahul Bhandari, A. Asha, Ankur Singh Bist |
An Optimal Resource Allocation in 5G Environment Using Novel Deep Learning Approach. |
J. Mobile Multimedia |
2023 |
DBLP DOI BibTeX RDF |
|
31 | Uttam Singh Bist, Nanhay Singh |
Analysis of recent advancements in support vector machine. |
Concurr. Comput. Pract. Exp. |
2022 |
DBLP DOI BibTeX RDF |
|
31 | Namita Behera, Avisek Bist |
Fiedler Linearizations of Multivariable State-Space System and its Associated System Matrix. |
CoRR |
2022 |
DBLP DOI BibTeX RDF |
|
31 | Tarushi Agrawal, Priya Bist, Nimit Jain, Parul Agarwal |
A Hybrid Whale Genetic Algorithm for Feature Selection in Biomedical Dataset. |
Int. J. Swarm Intell. Res. |
2022 |
DBLP DOI BibTeX RDF |
|
31 | Prem Singh Bist, Hilal Tayara, Kil To Chong 0001 |
Identification Of Sars-cov-2 Viral Escape Sequences Using Escapetrans Network. |
ICTC |
2022 |
DBLP DOI BibTeX RDF |
|
31 | Anshita Makode, Alakananda Chakraborty, Avanti Darekar, Poojakumari Bist |
Impact Of Covid-19 On Education Using Twitter Data. |
SMAP |
2021 |
DBLP DOI BibTeX RDF |
|
31 | Anuj Bist, Chetna Singhal 0001 |
Efficient Immersive Surveillance of Inaccessible Regions using UAV Network. |
INFOCOM Workshops |
2021 |
DBLP DOI BibTeX RDF |
|
31 | Kapal Dev, Sunder Ali Khowaja, Aman Jaiswal, Ankur Singh Bist, Vaibhav Saini, Surbhi Bhatia |
Triage of Potential COVID-19 Patients from Chest X-ray Images using Hierarchical Convolutional Networks. |
CoRR |
2020 |
DBLP BibTeX RDF |
|
31 | Benjamin F. Dribus, A. Sumner, K. Bist, N. Regmi, J. Sircar, S. Upreti |
Network Horizon Dynamics I: Qualitative Aspects. |
CoRR |
2019 |
DBLP BibTeX RDF |
|
31 | Sarthak Yadav, Manoj Gupta, Ankur Singh Bist |
Prediction of Ubiquitination Sites Using UbiNets. |
Adv. Fuzzy Syst. |
2018 |
DBLP DOI BibTeX RDF |
|
31 | Cambodge Bist, Rémi Cozot, Gérard Madec, Xavier Ducloux |
Tone expansion using lighting style aesthetics. |
Comput. Graph. |
2017 |
DBLP DOI BibTeX RDF |
|
31 | Itti Bist, Kiran Bano, James F. Rusling |
Screening Genotoxicity Chemistry with Microfluidic Electrochemiluminescent Arrays. |
Sensors |
2017 |
DBLP DOI BibTeX RDF |
|
31 | Cambodge Bist, Rémi Cozot, Gérard Madec, Xavier Ducloux |
QoE-based brightness control for HDR displays. |
QoMEX |
2017 |
DBLP DOI BibTeX RDF |
|
31 | Cambodge Bist, Rémi Cozot, Gérard Madec, Xavier Ducloux |
Style Aware Tone Expansion for HDR Displays. |
Graphics Interface |
2016 |
DBLP DOI BibTeX RDF |
|
31 | Bhim Singh 0001, Vashist Bist |
A BL-CSC Converter-Fed BLDC Motor Drive With Power Factor Correction. |
IEEE Trans. Ind. Electron. |
2015 |
DBLP DOI BibTeX RDF |
|
31 | Vashist Bist, Bhim Singh 0001 |
A Unity Power Factor Bridgeless Isolated Cuk Converter-Fed Brushless DC Motor Drive. |
IEEE Trans. Ind. Electron. |
2015 |
DBLP DOI BibTeX RDF |
|
31 | Shikha Singh 0008, Bhim Singh 0001, G. Bhuvaneswari, Vashist Bist |
Power Factor Corrected Zeta Converter Based Improved Power Quality Switched Mode Power Supply. |
IEEE Trans. Ind. Electron. |
2015 |
DBLP DOI BibTeX RDF |
|
31 | Praveen Kumar Singh, Bhim Singh 0001, Vashist Bist, Ambrish Chandra, Kamal Al-Haddad |
A single sensor based bridgeless landsman PFC converter fed BLDC motor drive. |
IAS |
2015 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist |
Business process management in a day. |
CASCON |
2015 |
DBLP BibTeX RDF |
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