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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 4769 publication records. Showing 4757 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
20 | Antonio Blotti, Maurizio Castellucci, Roberto Saletti |
Designing Carry Look-Ahead Adders with an Adiabatic Logic Standard-Cell Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, 12th International Workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002, pp. 118-127, 2002, Springer, 3-540-44143-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Amaury Nève, Denis Flandre, Helmut Schettler, Thomas Ludwig 0004, Gerhard Hellner |
Design of a branch-based 64-bit carry-select adder in 0.18 µm partially depleted SOI CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 108-111, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
SOI technology, logic design styles, circuit Design |
20 | Peter Celinski, Said F. Al-Sarawi, Derek Abbott, José Francisco López |
Low depth carry lookahead addition using charge recycling threshold logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 469-472, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gössel |
A New Self-Checking Code-Disjoint Carry-Skip Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 8-10 July 2002, Isle of Bendor, France, pp. 39-43, 2002, IEEE Computer Society, 0-7695-1641-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Youngtae Kim, Taewhan Kim |
Accurate exploration of timing and area trade-offs in arithmetic optimization using carry-save-adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 622-628, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Vitalij Ocheretnij, Egor S. Sogomonyan, Michael Gössel |
A New Code-Disjoint Sum-Bit Duplicated Carry Look-Ahead Adder for Parity Codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 365-, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Xiaoling Sun, Jian Xu, Pieter M. Trouborst |
Testing Carry Logic Modules of SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 9th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2001), 6-7 August 2001, San Jose, CA, USA, pp. 91-98, 2001, IEEE Computer Society, 0-7695-1242-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Chua-Chin Wang, Po-Ming Lee, Rong-Chin Lee, Chenn-Jung Huang |
A 1.25 GHz 32-bit tree-structured carry lookahead adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 80-83, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Xiaoling Sun, Jian Xu, Pieter M. Trouborst |
Testing Xilinx XC4000 Configurable Logic Blocks with Carry Logic Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 24-26 October 2001, San Francisco, CA, USA, Proceedings, pp. 221-, 2001, IEEE Computer Society, 0-7695-1203-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
configurable logic blocks, fault diagnosis, BIST, FPGA testing |
20 | Athanasios Kakarountas, Kyriakos Papadomanolakis, Vasileios Kokkinos, Constantinos E. Goutis |
Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000, Proceedings, pp. 187-194, 2000, Springer, 3-540-41068-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
20 | Hyuk-Jun Lee, Michael J. Flynn |
Coarse-grained carry architecture for FPGA (poster abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2000, Monterey, CA, USA, February 10-11, 2000, pp. 217, 2000, ACM, 1-58113-193-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
20 | Andreas Herrfeld, Siegbert Hentschke |
Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 29th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1999, Freiburg im Breisgau, Germany, May 20-22, 1999, Proceedings, pp. 174-179, 1999, IEEE Computer Society, 0-7695-0161-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
MVL, ternary adder, ternary multiplication, VLSI, multiple valued-logic |
20 | Kei-Yong Khoo, Chao-Liang Chen, Alan N. Willson Jr. |
A CMOS pipelined carry-save array using true single-phase single-transistor-latch clocking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 298-301, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Sae Hwan Kim, Shiu-Kai Chin |
Formal Verification of Tree-Structured Carry-Lookahead Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 232-233, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Franck Multon, Jean-Luc Nougaret, Gérard Hégron, Luc Millet, Bruno Arnaldi |
A Software System to Carry-out Virtual Experiments on Human Motion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CA ![In: Computer Animation 1999, CA 1999, Geneva, Switzerland, May 26-28, 1999, pp. 16-23, 1999, IEEE Computer Society, 0-7695-0167-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Taewhan Kim, William Jao, Steven W. K. Tjiang |
Circuit optimization using carry-save-adder cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10), pp. 974-984, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
20 | Taewhan Kim, William Jao, Steven W. K. Tjiang |
Arithmetic Optimization Using Carry-Save-Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 433-438, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
transceiver, spread spectrum communication, RF CMOS, digital radio, ISM frequency band |
20 | Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald, Wen-Chung Cho |
Delay-Insensitive Carry-Lookahead Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 322-328, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | Palash Sarkar 0001, Bimal K. Roy, Pabitra Pal Choudhury |
VLSI Implementation of Modulo Multiplication Using Carry Free Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 457-460, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | Chin-Long Wey |
Built-in self-test (BIST) design of high-speed carry-free dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(1), pp. 141-145, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
20 | Daniel Etiemble, Keivan Navi |
Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings., pp. 194-201, 1993, IEEE Computer Society/, 0-8186-3862-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
19 | Mark Goresky, Andrew Klapper |
Some Results on the Arithmetic Correlation of Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SETA ![In: Sequences and Their Applications - SETA 2008, 5th International Conference, Lexington, KY, USA, September 14-18, 2008, Proceedings, pp. 71-80, 2008, Springer, 978-3-540-85911-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
correlation, sequences, pseudo-randomness, feedback with carry shift register |
19 | Yanqing Cui, Jan Chipchase, Fumiko Ichikawa |
A Cross Culture Study on Phone Carrying and Physical Personalization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HCI (10) ![In: Usability and Internationalization. HCI and Culture, Second International Conference on Usability and Internationalization, UI-HCII 2007, Held as Part of HCI International 2007, Beijing, China, July 22-27, 2007, Proceedings, Part I, pp. 483-492, 2007, Springer, 978-3-540-73286-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Mobile Essentials, Carry-ing, Personalization, Mobile Phone, User Experience, Culture |
19 | Ajay Kumar Verma, Paolo Ienne |
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 601-608, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multiplier-like circuits, XOR-dominated circuits, datapath design, netlist optimization, carry-save form, column compressors, XOR operations, logic synthesizers, algebraic factoring, computer arithmetic, logic synthesis, digital design, parallel multipliers |
19 | Hong Xu 0008, Wen-Feng Qi 0001 |
On the Distinctness of Decimations of Generalized l-Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SETA ![In: Sequences and Their Applications - SETA 2006, 4th International Conference, Beijing, China, September 24-28, 2006, Proceedings, pp. 313-322, 2006, Springer, 3-540-44523-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Feedback-with-carry shift registers (FCSRs), l-sequences, generalized l-sequences, integer residue ring, primitive sequences, 2-adic numbers |
19 | Bonseok Koo, Dongwook Lee, Gwonho Ryu, Taejoo Chang, Sangjin Lee 0002 |
High-Speed RSA Crypto-processor with Radix-4 Modular Multiplication and Chinese Remainder Theorem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICISC ![In: Information Security and Cryptology - ICISC 2006, 9th International Conference, Busan, Korea, November 30 - December 1, 2006, Proceedings, pp. 81-93, 2006, Springer, 3-540-49112-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Booth’s algorithm, RSA, Chinese Remainder Theorem, Montgomery multiplication, Carry Save Adder |
19 | Birgit Graf, Matthias Hans, Rolf Dieter Schraft |
Care-O-bot II-Development of a Next Generation Robotic Home Assistant. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Auton. Robots ![In: Auton. Robots 16(2), pp. 193-205, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Robotic Home Assistant, Walking Aid, Path Modification, Fetch and Carry Tasks, User Interface, Path Planning, Service Robot, Object Manipulation, Task Planning |
19 | Viktor Bunimov, Manfred Schimmler |
Efficient Parallel Multiplication Algorithm for Large Integres. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 923-928, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
large number arithmetic, redundant numbers, Computer arithmetic, integer multiplication, carry save addition, parallel multiplication |
19 | Jongsun Park 0001, Woopyo Jeong, Hunsoo Choo, Hamid Mahmoodi-Meimand, Yongtao Wang, Kaushik Roy 0001 |
High performance and low power FIR filter design based on sharing multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 295-300, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FIR filter design, computation sharing, conditional capture flip-flop, high performance and low power carry select adder |
19 | Junhyung Um, Taewhan Kim |
Layout-aware synthesis of arithmetic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 207-212, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
layout, high performance, carry-save-adder |
19 | Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez |
High Speed GaAs Subsystem Design using Feed Through Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 509-, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
GaAs fast arithmetic circuits, GaAs design methodologies, GaAs subsystem design, GaAs ripple-carry adders, GaAs magnitude comparators |
19 | Eugen Ettelt, Ralf Furtwängler, Uwe D. Hanebeck, Günther Schmidt |
Design Issues of a Semi-Autonomous Robotic Assistant for the Health Care Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 22(3-4), pp. 191-209, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
mobile service robot, fetch-and-carry task, augmented virtual workspace, health care, mobile manipulation, human-robot interface, robotic assistant |
19 | Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel |
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 7-10 April 1997, Eindhoven, The Netherlands, pp. 210-, 1997, IEEE Computer Society, 0-8186-7922-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
completion detection, Brent-Kung, Carry-Bypass, asynchronous, adders, hazards, high-performance design |
19 | S. Ramanathan, V. Visvanathan |
A systolic architecture for LMS adaptive filtering with minimal adaptation delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 286-289, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
LMS adaptive filtering, minimal adaptation delay, convergence behaviour, function preserving transformations, SFG representation, carry-save arithmetic, systolic folded pipelined architecture, VLSI, delays, systolic arrays, pipeline processing, adaptive filters, digital filters, digital signal processing chips, convergence of numerical methods, systolic architecture, signal flow graphs, signal flow graph, least mean squares methods, LMS algorithm |
19 | D. V. Poornaiah, P. V. Ananda Mohan |
A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 69-72, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
concurrent dual multiplier-dual adder architecture, video coding applications, high-throughput image coding, carry-save 4:2 compressors, computational complexity, VLSI, VLSI, data compression, video coding, adders, computation time, multiplying circuits, digital signal processing chips |
19 | Song Cui, Neil Burgess, Michael J. Liebelt, Kamran Eshraghian |
A GaAs IEEE Floating Point Standard Single Precision Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 12th Symposium on Computer Arithmetic (ARITH-12 '95), July 19-21, 1995, Bath, England, UK, pp. 91-97, 1995, IEEE Computer Society, 0-8186-7089-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
floating point multiplier, rounding algorithm, modified carry save array, GaAs technology |
19 | Andrew Klapper, Mark Goresky |
Large Periods Nearly de Bruijn FCSR Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '95, International Conference on the Theory and Application of Cryptographic Techniques, Saint-Malo, France, May 21-25, 1995, Proceeding, pp. 263-273, 1995, Springer, 3-540-59409-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
deBruijn property, Binary sequences, feedback with carry shift registers, 2-adic numbers |
19 | Yuji Ohi, Takafumi Aoki, Tatsuo Higuchi 0001 |
Redundant Complex Number Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 14-19, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
redundant complex number systems, complex number representations, high-speed arithmetic circuits, positional number system, binary-tree multiple-operand addition, arithmetic algorithms, redundant number systems, carry-free addition |
19 | Menghui Zheng, Alexander Albicki |
Low power and high speed multiplication design through mixed number representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 566-576, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high speed multiplication, mixed number representations, low power multiplication, reduced switching, Sign-Magnitude, Redundant Binary adder, Booth decoder, Carry-Propagation-Free, digital arithmetic, VLSI architecture, redundant number systems, Partial Products |
19 | Hiromichi Yamada, Takashi Hotta, Takahiro Nishiyama, Fumio Murabayashi, Tatsumi Yamauchi, Hideo Sawamoto |
A 13.3ns double-precision floating-point ALU and multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 466-470, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
double-precision floating-point ALU, floating-point multiplier, carry select addition, prerounding techniques, noise tolerant precharge circuit, two-cycle latency, 13.3 ns, 0.3 micron, 2.5 V, 150 MHz, normalization, floating point arithmetic, CMOS integrated circuits, multiplying circuits, CMOS technology, arithmetic logic unit |
19 | Alain Guyot, Luis A. Montalvo, A. Houelle, Habib Mehrez, Nicolas Vaucher |
Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 386-391, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
layout synthesis, radix-2 dividers, pseudo-radix-4 dividers, redundant number notation, carry-propagation-free addition/subtraction, VLSI, logic CAD, circuit layout CAD, CMOS logic circuits, VLSI implementation, integrated circuit layout, redundant number systems, dividing circuits, digit-recurrence division |
19 | W. Amendola Jr., Hosahalli R. Srinivas, Keshab K. Parhi |
A 16-bit x 16-bit 1.2 μ CMOS multiplier with low latency vector merging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 398-402, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CMOS multiplier, low latency vector merging, bit-level pipelined architecture, two's-complement binary array multiplier, multiplier architecture, signed-digit radix 2 adders, carry free adders, fast conversion scheme, pipelining registers, half adders, positive edge triggered registers, single phase clocking scheme, 16 bit, 50 MHz, 3 V, VLSI, parallel architectures, multiplication, VLSI architecture, CMOS logic circuits, multiplying circuits, data conversion, pipeline arithmetic, 1.2 micron |
19 | Sabyasachi Das, Sunil P. Khatri |
A Novel Hybrid Parallel-Prefix Adder Architecture With Efficient Timing-Area Characteristic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(3), pp. 326-331, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Jun-Hong Chen, Haw-Shiuan Wu, Ming-Der Shieh, Wen-Ching Lin |
A New Montgomery Modular Multiplication Algorithm and its VLSI Design for RSA Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3780-3783, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo |
Fast Low-Power 64-Bit Modular Hybrid Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 609-617, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Rumi Zhang, Wei Wang 0003, Konrad Walus, Graham A. Jullien |
Performance comparison of quantum-dot cellular automata adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2522-2526, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Abhishek Singh, Santosh Pande |
Compiler optimizations for Java aglets in distributed data intensive applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2002 ACM Symposium on Applied Computing (SAC), March 10-14, 2002, Madrid, Spain, pp. 87-92, 2002, ACM, 1-58113-445-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Java |
19 | Kamal Rajagopalan, Peter R. Sutton |
A flexible multiplication unit for an FPGA logic block. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 546-549, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
19 | Mahmoud A. Manzoul |
A quaternary complex number CCD adder (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the 15th ACM Annual Conference on Computer Science, St. Louis, Missouri, USA, February 16-19, 1987, pp. 434, 1987, ACM, 0-89791-218-7. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
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15 | R. Nishanth, C. Helen Sulochana |
A novel lightweight CNN-based error-reduced carry prediction approximate full adder design for multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Neural Comput. Appl. ![In: Neural Comput. Appl. 36(12), pp. 6421-6440, April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Jingxuan Yang, Xiaoqin Wang, Yiying Jiang |
CANET: Quantized Neural Network Inference With 8-bit Carry-Aware Accumulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 38765-38772, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Melika Amiri, Massoud Dousti, Majid Mohammadi |
Design and implementation of carry-save adder using quantum-dot cellular automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 80(2), pp. 1554-1567, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Maxime Remaud |
Quantum Ripple-Carry Adders and Comparator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2401.17921, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Suparna Kundu, Siddhartha Chowdhury, Sayandeep Saha, Angshuman Karmakar, Debdeep Mukhopadhyay, Ingrid Verbauwhede |
Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2401.14098, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Suparna Kundu, Siddhartha Chowdhury, Sayandeep Saha, Angshuman Karmakar, Debdeep Mukhopadhyay, Ingrid Verbauwhede |
Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Trans. Cryptogr. Hardw. Embed. Syst. ![In: IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2), pp. 844-869, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Wushuang Wang, Fei Xue, Toshiki Mitsui, Zhiyuan Shang, Maiko Shigeno |
Carry-over Effect Values Minimization under Circle Method and Binary Factorization Based on Jaya Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCEAI ![In: 2024 8th International Conference on Control Engineering and Artificial Intelligence, CCEAI 2024, Shanghai, China, January 26-28, 2024, pp. 44-51, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Ayan Palchaudhuri, Anindya Sundar Dhar |
FPGA Specific Speed-Area Optimized Architectures of Arithmetic Cores with Scan Insertion for Carry Chain Based Multi-level Logic Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 617-622, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Satoki Tsuichihara, Masayuki Yamada, Kaito Hara, Gustavo Alfonso Garcia Ricardez, Akishige Yuguchi, Jun Takamatsu, Takahiro Wada, Yasutake Takahashi, Tsukasa Ogasawara |
Holding Strategy Using Torso to Enable Humanoid Robots to Carry Heavier Objects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SII ![In: IEEE/SICE International Symposium on System Integration, SII 2024, Ha Long, Vietnam, January 8-11, 2024, pp. 1464-1469, 2024, IEEE, 979-8-3503-1207-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | Lilach Alon, Maja Krtalic |
"Words Are not just Words; They Carry Experiences Within Them": Navigating Personal Information Management in Multilingual Contexts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
iConference (1) ![In: Wisdom, Well-Being, Win-Win - 19th International Conference, iConference 2024, Changchun, China, April 15-26, 2024, Proceedings, Part I, pp. 333-342, 2024, Springer, 978-3-031-57849-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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15 | S. Senthilkumar, V. Samuthira Pandi, T. Sripriya, N. Pragadish |
Design of recustomize finite impulse response filter using truncation based scalable rounding approximate multiplier and error reduced carry prediction approximate adder for image processing application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 35(8), 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Perumal Mahendran, M. S. Kavitha, R. Radhika, C. Kotteeswaran |
Design of all pass make over based capricious digital filter using eminent speed dual carry select adder and truncation and rounding approximate multiplier for image processing application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 35(6), pp. 1, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Afshin Khaksari, Omid Akbari, Behzad Ebrahimi |
BEAD: Bounded error approximate adder with carry and sum speculations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 88, pp. 353-361, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Jeyakumar Ponraj, R. Jeyabharath, P. Veena, Tharumar Srihari |
High-performance multiply-accumulate unit by integrating binary carry select adder and counter-based modular wallace tree multiplier for embedding system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 93, pp. 102055, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Ke Cui, Jintao Yu, Jiaxuan Zou, Xiangyu Li 0005 |
A High-Resolution TDC Design Based on Multistep Fine Time Measurement by Utilizing Delay-Adjustable Looped Carry Chains on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 72, pp. 1-10, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Umberto Garlando, Qi Wang, Oleksandr V. Dobrovolskiy, Andrii V. Chumak, Fabrizio Riente |
Numerical Model for 32-Bit Magnonic Ripple Carry Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 11(3), pp. 679-688, July - September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Chua-Chin Wang, Oliver Lexter July A. Jose, Wen-Shou Yang, Ralph Gerard B. Sangalang, Lean Karlo S. Tolentino, Tzung-Je Lee |
A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 42(4), pp. 2283-2304, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | K. Saritha Raj, P. Rajesh Kumar, M. Satyanarayana |
Capricious Digital Filter Design and Implementation Using Baugh-Wooley Multiplier and Error Reduced Carry Prediction Approximate Adder for ECG Noise Removal Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 42(11), pp. 6726-6748, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Huigyu Yang, Syed M. Raza, Moonseong Kim, Hyunseung Choo |
Deep Mobile Path Prediction With Shift-and-Join and Carry-Ahead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Cogn. Commun. Netw. ![In: IEEE Trans. Cogn. Commun. Netw. 9(3), pp. 811-825, June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Sivasamy Ramasamy, David Banjerdpongchai, PooGyeon Park |
Chaos Control of a Delayed Tri-Trophic Food Chain Model with Fear and Its Carry over Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symmetry ![In: Symmetry 15(2), pp. 484, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Nima Amirafshar, Ahmad Sadigh Baroughi, Hadi Shahriar Shahhoseini, Nima TaheriNejad |
Carry Disregard Approximate Multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 70(12), pp. 4840-4853, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | B. Jeevan, K. Bikshalu, E. Hari Krishna, Kosaraju Sivani |
Design of 2-1 Multiplexer based high-speed, Two-Stage 90 nm Carry Select Adder for fast arithmetic units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 99, pp. 104846, June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Muhammad Awais, Ali Zahir, Syed Ayaz Ali Shah, Pedro Reviriego, Anees Ullah, Nasim Ullah, Adam Khan, Hazrat Ali |
Toward Optimal Softcore Carry-aware Approximate Multipliers on Xilinx FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 22(4), pp. 76:1-76:19, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | K. Gavaskar, D. Malathi, G. Ravivarma, P. S. Priyatharshan, S. Rajeshwari, B. Sanjay |
Design of Low Power Multiplier with Less Area Using Quaternary Carry Increment Adder for New-Fangled Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 128(2), pp. 1417-1435, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Wenbo Guo 0009 |
High-Speed (7, 2) Compressor Using A Fast Carry-Generation Logic based on Sorting Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2309.03643, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Siyi Wang, Anubhab Baksi, Anupam Chattopadhyay |
A Higher Radix Architecture for Quantum Carry-lookahead Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2304.02921, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Goeric Huybrechts, Srikanth Ronanki, Xilai Li, Hadis Nosrati, Sravan Bodapati, Katrin Kirchhoff |
DCTX-Conformer: Dynamic context carry-over for low latency unified streaming and non-streaming Conformer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2306.08175, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Rajarshi Roy Chowdhury, Azam Che-Idris, Pg Emeroylariffion Abas |
Internet of Things: Digital Footprints Carry A Device Identity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2301.00328, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Ryosuke Korekata, Motonari Kambara, Yu Yoshida, Shintaro Ishikawa, Yosuke Kawasaki, Masaki Takahashi, Komei Sugiura |
Switching Head-Tail Funnel UNITER for Dual Referring Expression Comprehension with Fetch-and-Carry Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2307.07166, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Motonari Kambara, Komei Sugiura |
Fully Automated Task Management for Generation, Execution, and Evaluation: A Framework for Fetch-and-Carry Tasks with Natural Language Instructions in Continuous Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2311.04260, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Seyed-Sajad Ahmadpour, Nima Jafari Navimipour, Mohammad Mosleh, Ali Newaz Bahar, Senay Yalçin |
A nano-scale n-bit ripple carry adder using an optimized XOR gate and quantum-dots technology with diminished cells and power dissipation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Nano Commun. Networks ![In: Nano Commun. Networks 36, pp. 100442, June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Maja Krtalic, Kingsley T. Ihejirika |
The things we carry: migrants' personal collection management and use. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Documentation ![In: J. Documentation 79(1), pp. 86-111, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Yaacov Belenky, Ira Dushar, Valery Teper, Vadim Bugaenko, Oleg Karavaev, Leonid Azriel, Yury Kreimer |
Carry-based Differential Power Analysis (CDPA) and its Application to Attacking HMAC-SHA-2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Trans. Cryptogr. Hardw. Embed. Syst. ![In: IACR Trans. Cryptogr. Hardw. Embed. Syst. 2023(3), pp. 1-29, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Suparna Kundu, Siddhartha Chowdhury, Sayandeep Saha, Angshuman Karmakar, Debdeep Mukhopadhyay, Ingrid Verbauwhede |
Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2023, pp. 1674, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP BibTeX RDF |
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15 | Corey Hannum, Rui Li 0021, Weitian Wang |
A Trust-Assist Framework for Human-Robot Co-Carry Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Robotics ![In: Robotics 12(2), pp. 30, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Ryosuke Korekata, Motonari Kambara, Yu Yoshida, Shintaro Ishikawa, Yosuke Kawasaki, Masaki Takahashi, Komei Sugiura |
Switching Head-Tail Funnel UNITER for Dual Referring Expression Comprehension with Fetch-and-Carry Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: IROS, pp. 3865-3872, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Chun Zheng, Xiafu Pan |
Design of Intelligent Security Inspection System for Airport Passengers' Carry on Luggage Based on Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMTEL (1) ![In: Multimedia Technology and Enhanced Learning - 5th EAI International Conference, ICMTEL 2023, Leicester, UK, April 28-29, 2023, Proceedings, Part I, pp. 82-99, 2023, Springer, 978-3-031-50570-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Sen Hou, Yue Cao |
On Searching Dynamic Feedback with Carry Shift Registers Having Sparse Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCT ![In: 23rd IEEE International Conference on Communication Technology, ICCT 2023, Wuxi, China, October 20-22, 2023, pp. 1237-1241, 2023, IEEE, 979-8-3503-2595-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Xuan Wang, Jia Liu, Xi Yu, Xingyu Chen, Yujie Yu, Zhihong Zhao |
People Counting with Carry-on RFID Tags. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWQoS ![In: 31st IEEE/ACM International Symposium on Quality of Service, IWQoS 2023, Orlando, FL, USA, June 19-21, 2023, pp. 1-10, 2023, IEEE, 979-8-3503-9973-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Riley Jackson, Maxwell Phillips, Firas Hassan, Ahmed Ammar |
High Precision Carry-Look-Ahead Logic for Negation, Absolute Value, and Two's Complement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023, Istanbul, Turkey, December 4-7, 2023, pp. 1-4, 2023, IEEE, 979-8-3503-2649-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Baofeng Qi, Shaojiang Sun, Yihui Tong, Jie Zhang, Zhehe Wang, Xianchao Wang |
Algorithm-based Study on Transformation Combination for Carry-free Modified Signed Digit(MSD) Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSCloud/EdgeCom ![In: 10th IEEE International Conference on Cyber Security and Cloud Computing, CSCloud 2023 / IEEE 9th International Conference on Edge Computing and Scalable Cloud, EdgeCom 2023, Xiangtan, Hunan, China, July 1-3, 2023, pp. 298-304, 2023, IEEE, 979-8-3503-1246-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Kshitij Sharma, Michail N. Giannakos |
Carry-Forward Effect: Early scaffolding learning processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LDT ![In: Proceedings of the 2023 Symposium on Learning, Design and Technology, LDT 2023, Evanston, IL, USA, 23 June 2023, pp. 43-52, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Marek Nowakowski, Guido S. Berger, João Braun, João Mendes, Luciano Bonzatto Junior, José Lima 0001 |
Advance Reconnaissance of UGV Path Planning Using Unmanned Aerial Vehicle to Carry Our Mission in Unknown Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ROBOT (2) ![In: Robot 2023: Sixth Iberian Robotics Conference - Advances in Robotics, Volume 2, Coimbra, Portugal, 22-24 November 2023., pp. 50-61, 2023, Springer, 978-3-031-59166-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Bhaskar Gaur, Edgard Muñoz-Coreas, Himanshu Thapliyal |
A Logarithmic Depth Quantum Carry-Lookahead Modulo (2n - 1) Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI 2023, Knoxville, TN, USA, June 5-7, 2023, pp. 125-130, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Mengfan Xu, Yuejun Zhang, Huihong Zhang, Liang Wen, Tengfei Yuan, Pengjun Wang, Zhiyi Li |
Full-custom Design of Improved Carry Adder Circuit for CLBs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023, pp. 1-4, 2023, IEEE, 979-8-3503-1298-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Poh Yuin Lyn, Nor Azlin Ghazali, Mohamed Fauzi Packeer Mohamed, Muhammad Firdaus Akbar |
Design of Low-Power and Area-Efficient Square Root Carry Select Adder Using Binary to Excess-1 Converter (BEC). ![Search on Bibsonomy](Pics/bibsonomy.png) |
RoViSP ![In: Proceedings of the 12th International Conference on Robotics, Vision, Signal Processing and Power Applications, RoViSP 2023, Penang, Malaysia, 28-29 August 2023., pp. 141-147, 2023, Springer, 978-981-99-9004-7. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Toshinori Sato, Hiroyuki Hama, Tomoaki Ukezono |
Comparative Evaluation between Carry Prediction and Sign Error Correction in Approximate Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: 20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023, pp. 77-78, 2023, IEEE, 979-8-3503-2703-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Luiz Paulo Carvalho, Rosa Maria Esteves Moreira da Costa, Flávia Maria Santoro, Jonice Oliveira |
How to carry out a Brazilian research in computing considering ethical or moral aspects? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBSI ![In: Proceedings of the XIX Brazilian Symposium on Information Systems, SBSI 2023, Maceió, Brazil, 29 May 2023- 1 June 2023, pp. 151-158, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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15 | Jiwen Yang, Congwei Liao, Kun Wang, Junjun An, Shuai Shen, Shengdong Zhang |
A-Si TFT Integrated Gate Driver Workable at -40°C Using Bootstrapped Carry Signal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 10, pp. 93887-93893, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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15 | Robert B. Kent, Marios S. Pattichis |
Use of Carry Chain Logic and Design System Extensions to Construct Significantly Faster and Larger Single-Stage N-Sorters and N-Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 10, pp. 79689-79702, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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15 | Jia-Yuan Liao, Jun-Wei Hsieh, Ching-Wen Ma |
Automatic Meter Reading Based on Bi-Fusion MSP Network and Carry-Out Rechecking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 10, pp. 96710-96719, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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