|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 341 occurrences of 179 keywords
|
|
|
Results
Found 362 publication records. Showing 362 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | Chunyang Feng, Hai Zhou 0001, Changhao Yan, Jun Tao 0001, Xuan Zeng 0001 |
Provably good and practically efficient algorithms for CMP dummy fill. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 539-544, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
covering linear programming, dummy fill problem, design for manufacturability |
18 | Tung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen Chang |
Metal-density driven placement for cmp variation and routability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 31-38, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
VLSI, placement, physical design, manufacturability |
18 | Arthur Nieuwoudt, Jamil Kawa, Yehia Massoud |
Impact of dummy filling techniques on interconnect capacitance and planarization in nano-scale process technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 151-154, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design for manufacturability, dummy fill |
18 | Arthur Nieuwoudt, Jamil Kawa, Yehia Massoud |
Investigating the Impact of Fill Metal on Crosstalk-Induced Delay and Noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 724-729, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fill generation, crosstalk, Design for manufacturability, dummy fill |
18 | Hailong Jiao, Lan Chen |
Cellwise OPC Based on Reduced Standard Cell Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 810-814, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
cellwise OPC, reduced standard cell library, design for manufacturability |
18 | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 504-509, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing, VLSI, manufacturability, OPC, lithography |
18 | Payman Zarkesh-Ha, Ken Doniger |
Stochastic interconnect layout sensitivity model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), Austin, Texas, USA, March 17-18, 2007, Proceedings, pp. 9-14, 2007, ACM, 978-1-59593-622-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
critical area analysis, layout sensitivity, reliability, stochastic model, yield, design for manufacturability, defect density |
18 | Philippe Magarshack |
Design challenges in 45nm and below: DFM, low-power and design for reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 1, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
design for reliability, low-power design, design for manufacturability |
18 | Kevin Lucas, Chi-Min Yuan, Robert Boone, Karl Wimmer, Kirk Strozewski, Olivier Toublan |
Logic Design for Printability Using OPC Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 23(1), pp. 30-37, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
optical proximity correction (OPC), reticle enhancement technology (RET), design for manufacturability (DFM) |
18 | Minsik Cho, David Z. Pan, Hua Xiang 0001, Ruchir Puri |
Wire density driven global routing for CMP variation and timing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 487-492, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
performance, VLSI, manufacturability, global routing |
18 | Huang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lumdo Chen, Brian Han |
Novel full-chip gridless routing considering double-via insertion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 755-760, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
redundant via insertion, routing, manufacturability |
18 | Di Wu 0017, Jiang Hu, Rabi N. Mahapatra |
Coupling aware timing optimization and antenna avoidance in layer assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005, pp. 20-27, 2005, ACM, 1-59593-021-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
VLSI, interconnect, probabilistic modeling, physical design, crosstalk, design for manufacturability (DFM), antenna effect |
18 | Murari Mani, Anirudh Devgan, Michael Orshansky |
An efficient algorithm for statistical minimization of total power under timing yield constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 309-314, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
manufacturability, leakage, statistical optimization |
18 | Naveed A. Sherwani, Susan Lippincott Mack, Alex Alexanian, Premal Buch, Carlo Guardiani, Harold Lehon, Peter Rabkin, Atul Sharan |
DFM rules! ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 168-169, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
design for manufacturability, yield optimization |
18 | Puneet Gupta 0001, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester |
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 365-368, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
ACLV, layout, manufacturability, compensation, variation, focus |
18 | Matt Nowak, Riko Radojcic |
Are there economic benefits in DFM? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 767-768, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
fabless, foundries, DFM, design for manufacturability |
18 | Marco Ottavi, Xiaopeng Wang, Fred J. Meyer, Fabrizio Lombardi |
Simulation of reconfigurable memory core yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 136-140, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Markov chain, manufacturability, yield, defect tolerance |
18 | Puneet Gupta 0001, Fook-Luen Heng |
Toward a systematic-variation aware timing methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 321-326, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
ACLV, layout, manufacturability, OPC, lithography |
18 | Lars Liebmann |
Layout impact of resolution enhancement techniques: impediment or opportunity? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2003 International Symposium on Physical Design, ISPD 2003, Monterey, CA, USA, April 6-9, 2003, pp. 110-117, 2003, ACM, 1-58113-650-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
radically restricted designs, resolution enhancement techniques, design for manufacturability, lithography |
18 | Puneet Gupta 0001, Andrew B. Kahng, Dennis Sylvester, Jie Yang 0010 |
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 16-21, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
VLSI manufacturability, yield, OPC, lithography, RET |
18 | Yu Chen 0005, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky |
Closing the smoothness and uniformity gap in area fill synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of 2002 International Symposium on Physical Design, ISPD 2002, Del Mar, CA, USA, April 7-10, 2002, pp. 137-142, 2002, ACM, 1-58113-460-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
VLSI manufacturability, density analysis, dummy fill problem, monte-carlo, chemical-mechanical polishing |
18 | Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R. Suresh |
Transistor Flaring in Deep Submicron-Design Considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 299-304, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Deep Submicron (DSM), pullback, photolithography, Subwavelength-lithography, Optical Proximity Correction (OPC), SPICE-models, standard-ce1l library, Design for Manufacturability (DFM) |
18 | JungHyun Han, Inho Han |
Manufacturable feature recognition and its integration with process planning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symposium on Solid Modeling and Applications ![In: Fifth ACM Symposium on Solid Modeling and Applications, Ann Arbor, Michigan, USA, June 9-11, 1999, pp. 108-118, 1999, ACM, 1-58113-080-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
feature dependency, machining sequence, manufacturability, feature recognition, process planning |
18 | Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, P. Simon |
Design-Manufacturing Interface: Part II - Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 557-562, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
metal utilization, etch rate variation, manufacturability, yield, critical area, antenna effect |
18 | Wojciech Maly, Pranab K. Nag, Hans T. Heineken, Jitendra Khare |
Design-Manufacturing Interface: Part I - Vision. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 550-556, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
design, synthesis, manufacturability, yield, design rules |
18 | Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar |
A hierarchical decomposition methodology for multistage clock circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 266-273, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
performance driven router, routing, process variations, manufacturability, clock |
12 | Jin Hu, Jarrod A. Roy, Igor L. Markov |
Completing high-quality global routes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 35-41, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
global routing |
12 | Bao Liu 0001 |
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 853-858, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Sandor Markon, Satoshi Maekawa |
An improved optical device for floating displays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IUCS ![In: Proceedings of the 3rd International Universal Communication Symposium, IUCS 2009, Tokyo, Japan, 3-4 December 2009, pp. 74-77, 2009, ACM, 978-1-60558-641-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dihedral corner reflector array, floating images, 3D display |
12 | Nancy Ying Zhou, Rouwaida Kanj, Kanak Agarwal, Zhuo Li 0001, Rajiv V. Joshi, Sani R. Nassif, Weiping Shi |
The impact of BEOL lithography effects on the SRAM cell performance and yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 607-612, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Chun-Yu Chuang, Wai-Kei Mak |
Accurate closed-form parameterized block-based statistical timing analysis applying skew-normal distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 68-73, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Hiroki Sunagawa, Haruhiko Terada, Akira Tsuchiya, Kazutoshi Kobayashi, Hidetoshi Onodera |
Erect of regularity-enhanced layout on printability and circuit performance of standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 195-200, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Chung-Wei Lin, Szu-Yu Chen, Chi-Feng Li, Yao-Wen Chang, Chia-Lin Yang |
Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Spanning Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4), pp. 643-653, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | YuHua Cheng |
A glance of technology efforts for design-for-manufacturing in nano-scale CMOS processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 51(6), pp. 807-818, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
nano-CMOS IC design, IC design methodology, CMOS design technology platform, design-for-manufacturing (DFM), design-for-yield |
12 | Myungsu Choi, Minsu Choi |
Scalability of Globally Asynchronous QCA (Quantum-Dot Cellular Automata) Adder Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(1-3), pp. 313-320, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
QCA (quantum-dot cellular automata), Asynchronous architecture, Layout timing problem, Scalability, Robustness |
12 | Jason Cong, Yi Zou |
Lithographic aerial image simulation with FPGA-based hardwareacceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 67-76, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
co-processor acceleration, lithography simulation, FPGA |
12 | Jason G. Brown, Brian Taylor, Ronald D. Blanton, Larry T. Pileggi |
Automated Testability Enhancements for Logic Brick Libraries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 480-485, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Petr Mikusek, Vaclav Dvorak |
On Lookup Table Cascade-Based Realizations of Arbiters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 795-802, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | David Z. Pan |
Synergistic modeling and optimization for nanometer IC design/manufacturing integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 2, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design for manufacturing |
12 | David Z. Pan |
Lithography friendly routing: from construct-by-correction to correct-by-construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 6, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
routing |
12 | Michael D. Moffitt, Jarrod A. Roy, Igor L. Markov |
The coming of age of (academic) global routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 148-155, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
optimization, routing, VLSI, benchmarks, computer-aided design, congestion, global routing, wirelength |
12 | David M. Krum, Jens Faenger, Brian Lathrop, Jo Ann G. Sison, Annie Lien |
All roads lead to CHI: interaction in the automobile. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI Extended Abstracts ![In: Extended Abstracts Proceedings of the 2008 Conference on Human Factors in Computing Systems, CHI 2008, Florence, Italy, April 5-10, 2008, pp. 2387-2390, 2008, ACM, 978-1-60558-012-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
driver interaction, cars, automotive industry, driver information systems, special interest group |
12 | Vaclav Dvorak |
Communication Performance of Mesh- and Ring-Based NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICN ![In: Seventh International Conference on Networking (ICN 2008), 13-18 April 2008, Cancun, Mexico, pp. 156-161, 2008, IEEE Computer Society, 978-0-7695-3106-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Tera-scale platform, Networks on chip, collective communications |
12 | Guo Yu, Peng Li 0001 |
Yield-aware hierarchical optimization of large analog integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 79-84, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly, Andrzej Pfitzner, Dominik Kasprowicz |
Is there always performance overhead for regular fabric? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 557-562, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos |
A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 47-52, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
flash adc, nano-cmos, ti comparator, process variation, analog-to-digital converter, low voltage, high speed |
12 | Srinivasa R. S. T. G, Srivatsava Jandhyala, Narahari Tondamuthuru R |
Process Variability Analysis in DSM Through Statistical Simulations and its Implications to Design Methodologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 325-329, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Design Methodologies, Random, DSM, Variations, Systematic |
12 | Nathaniel J. August |
A Robust and Efficient Pre-Silicon Validation Environment for Mixed-Signal Circuits on Intel's Test Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 423-428, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pre-silicon, validation, mixed-signal |
12 | Qing Su, Charles C. Chiang, Jamil Kawa |
Hotspot Based Yield Prediction with Consideration of Correlations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 338-343, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Systematic Yield, DFM (design for manufacturing), correlation, Yield, Hotspot, Yield Prediction |
12 | Fadi J. Kurdahi, Nikil D. Dutt, Ahmed M. Eltawil, Sani R. Nassif |
Cross-Layer Approaches to Designing Reliable Systems Using Unreliable Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 14-15, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Sachin S. Sapatnekar, Eshel Haritan, Kurt Keutzer, Anirudh Devgan, Desmond Kirkpatrick, Stephen Meier, Duaine Pryor, Tom Spyrou |
Reinventing EDA with manycore processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 126-127, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
parallelization, CAD, software, multicore, EDA, speedup, manycore |
12 | Tarek A. El-Moselhy, Ibrahim M. Elfadel, David Widiger |
Efficient algorithm for the computation of on-chip capacitance sensitivities with respect to a large set of parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 906-911, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
sensitivity analysis, capacitance extraction, adjoint method |
12 | Fan-Tien Cheng, Yeh-Tung Chen, Yu-Chuan Su, Deng-Lin Zeng |
Method for Evaluating Reliance Level of a Virtual Metrology System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2007 IEEE International Conference on Robotics and Automation, ICRA 2007, 10-14 April 2007, Roma, Italy, pp. 1590-1596, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Rishi Bhooshan, Bindu P. Rao |
Optimum IR drop models for estimation of metal resource requirements for power distribution network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007, pp. 292-295, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Davide Pandini, Giuseppe Desoli, Alessandro Cremonesi |
Computing and design for software and silicon manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2007, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA, 15-17 October 2007, pp. 122-127, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Andrew B. Kahng |
Design challenges at 65nm and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1466-1467, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Swarup Bhunia, Massood Tabib-Azar, Daniel G. Saab |
Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 86-91, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
reconfigurable instant-on system, ultralow-power reconfigurable computing, complementary nanoelectromechanical carbon nanotube switches, coplanar carbon nanotubes, low operation voltages, built-in energy storage, CNEMS, stable on-off state, latching mechanism, nonvolatile memory-mode operation, CMOS transistors, system development, leakage current |
12 | Jun-Fu Huang, Victor C. Y. Chang, Sally Liu, Kelvin Y. Y. Doong, Keh-Jeng Chang |
Modeling Sub-90nm On-Chip Variation Using Monte Carlo Method for DFM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 221-225, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Chung-Wei Lin, Szu-Yu Chen, Chi-Feng Li, Yao-Wen Chang, Chia-Lin Yang |
Efficient obstacle-avoiding rectilinear steiner tree construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007, pp. 127-134, 2007, ACM, 978-1-59593-613-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
routing, spanning tree, physical design, Steiner tree |
12 | David M. Krum, Dietrich Manstetten, Clifford Nass, K. Venkatesh Prasad, Roberto Sicconi |
Taking CHI for a drive: interaction in the car. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI Extended Abstracts ![In: Extended Abstracts Proceedings of the 2007 Conference on Human Factors in Computing Systems, CHI 2007, San Jose, California, USA, April 28 - May 3, 2007, pp. 1917-1920, 2007, ACM, 978-1-59593-642-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
driver interaction, panel discussion, automotive industry, driver information systems |
12 | Davide Pandini |
Innovative Design Platforms for Reliable SoCs in Advanced Nanometer Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece, pp. 254, 2007, IEEE Computer Society, 0-7695-2918-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Jamil Kawa, Charles C. Chiang |
DFM issues for 65nm and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 318-322, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
DFY, DFM |
12 | Michele Favalli |
Delay Fault Detection Problems in Circuits Featuring a Low Combinational Depth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy., pp. 170-178, 2007, IEEE Computer Society, 0-7695-2885-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Rishi Bhooshan |
Novel and Efficient IR-Drop Models for Designing Power Distribution Network for Sub-100nm Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 287-292, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Duane S. Boning, Karthik Balakrishnan, Hong Cai, Nigel Drego, Ali Farahanchi, Karen Gettings, Daihyun Lim, Ajay Somani, Hayden Taylor, Daniel Truque, Xiaolin Xie |
Variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 15-20, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | René Penning de Vries |
Systems, Nano-technology and SiP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 33, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Sankara Hari Gopalakrishnan, Krishnan Suresh |
Estimating the impact of large design changes on field problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symposium on Solid and Physical Modeling ![In: Proceedings of the 2007 ACM Symposium on Solid and Physical Modeling, Beijing, China, June 4-6, 2007, pp. 205-215, 2007, ACM, 978-1-59593-666-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
feature sensitivity, topological sensitivity, features, parametric optimization, design parameters |
12 | Wojciech Maly, Yi-Wei Lin, Malgorzata Marek-Sadowska |
OPC-Free and Minimally Irregular IC Design Style. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 954-957, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Norbert Dumas, Florence Azaïs, Laurent Latorre, Pascal Nouet |
Electro-thermal Stimuli for MEMS Testing in FSBM Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(2), pp. 189-198, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
bulk micromachining, electro-thermal stimuli, testing, defects, MEMS |
12 | Sandip Kundu |
A design for failure analysis (DFFA) technique to ensure incorruptible signatures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 309-310, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Kuang-Yao Lee, Ting-Chi Wang |
Post-routing redundant via insertion for yield/reliability improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 303-308, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Ding-Ming Kwai, Ching-Hua Hsiao, Chung-Ping Kuo, Chi-Hsien Chuang, Min-Chung Hsu, Yi-Chun Chen, Yu-Ling Sung, Hsien-Yu Pan, Chia-Hsin Lee, Meng-Fan Chang, Yung-Fa Chou |
SRAM Cell Current in Low Leakage Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 14th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2006), 2-4 August 2006, Taipei, Taiwan, pp. 65-70, 2006, IEEE Computer Society, 0-7695-2572-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Jirà Jaros, Milos OhlÃdal, Václav Dvorák |
Complexity of Collective Communications on NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 127-133, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Xiaoping Tang, Xin Yuan |
Technology migration techniques for simplified layouts with restrictive design rules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 655-660, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan |
An accurate sparse matrix based framework for statistical static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 231-236, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Dezhen Zhang, Tian Chang, Rui Li 0055, Xiaopeng Wei |
Evaluating design concepts using fuzzy arithmetic operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISDA (1) ![In: Proceedings of the Sixth International Conference on Intelligent Systems Design and Applications (ISDA 2006), October 16-18, 2006, Jinan, China, pp. 254-259, 2006, IEEE Computer Society, 0-7695-2528-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Minsu Choi, Myungsu Choi, Zachary D. Patitz, Nohpill Park |
Efficient and Robust Delay-Insensitive QCA (Quantum-Dot Cellular Automata) Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 80-88, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Robert C. Aitken |
DFM Metrics for Standard Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 491-496, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | C. Tabery, M. Craig, Gert Burbach, B. Wagner, S. McGowan, P. Etter, S. Roling, C. Haidinyak, E. Ehrichs |
Process Window and Device Variations Evaluation using Array-Based Characterization Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 260-265, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
transistor array, transistor matching, via yield, DOE ROM, novel test circuits, DFM |
12 | Artur Balasinski |
Question: DRC or DfM ? Answer: FMEA and ROI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 789-794, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Lawrence S. Melvin III, Daniel N. Zhang, Kirk J. Strozewski, Skye Wolfer |
The Use of the Manufacturing Sensitivity Model Forms to Comprehend Layout Manufacturing Robustness For Use During Device Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 485-490, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Rasit Onur Topaloglu |
Monte Carlo-Alternative Probabilistic Simulations for Analog Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 249-253, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Amir Hossein Yamini, Vijaya Kumar Devabhaktuni |
Equivalent Circuit and Electromagnetic Based CAD Tool for Dual-Mode Ku-Band Elliptic and Butterworth Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1502-1505, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Rasit Onur Topaloglu |
Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 136-142, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Mircea R. Stan, Garrett S. Rose, Matthew M. Ziegler |
Hybrid CMOS/Molecular Electronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 703-708, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Sara McMains |
Design for manufacturing feedback at interactive rates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symposium on Solid and Physical Modeling ![In: Proceedings of the ACM Symposium on Solid and Physical Modeling 2006, Cardiff University, Wales, UK, June 6-8, 2006, pp. 239, 2006, ACM, 1-59593-358-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Vijay Pitchumani |
A Hitchhiker's Guide to the DFM Universe. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1103-1106, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Xianlong Hong, Yici Cai, Hailong Yao, Duo Li |
DFM-aware Routing for Yield Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1091-1094, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
12 | El-Sayed Aziz, Constantin Chassapis |
A decision-making framework model for design and manufacturing of mechanical transmission system development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eng. Comput. ![In: Eng. Comput. 21(2), pp. 164-176, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Intelligent design, Internet, Knowledge-based system, Web-based system, Concurrent engineering, Gear |
12 | Yu Chen 0005, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky, Yuhong Zheng |
Compressible area fill synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(8), pp. 1169-1187, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Cristinel Ababei, Yan Feng, Brent Goplen, Hushrav Mogal, Tianpei Zhang, Kia Bazargan, Sachin S. Sapatnekar |
Placement and Routing in 3D Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 22(6), pp. 520-531, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
VLSI, Placement and routing |
12 | Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wong |
CMP aware shuttle mask floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1111-1114, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Kohei Miyase, Kenta Terashima, Seiji Kajihara, Xiaoqing Wen, Sudhakar M. Reddy |
On Improving Defect Coverage of Stuck-at Fault Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 216-223, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Mehrdad Reshadi, Daniel Gajski |
A cycle-accurate compilation algorithm for custom pipelined datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 21-26, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
NISC, cycle-accurate compiler, scheduling |
12 | Alex Yvart, Stefanie Hahmann, Georges-Pierre Bonneau |
Smooth Adaptive Fitting of 3D Models Using Hierarchical Triangular Splines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMI ![In: 2005 International Conference on Shape Modeling and Applications (SMI 2005), 15-17 June 2005, Cambridge, MA, USA, pp. 13-22, 2005, IEEE Computer Society, 0-7695-2379-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jaeho Lee 0004, Joon Young Park, Deok-Soo Kim, Hyun-Chan Lee |
Triangular Prism Generation Algorithm for Polyhedron Decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (3) ![In: Computational Science and Its Applications - ICCSA 2005, International Conference, Singapore, May 9-12, 2005, Proceedings, Part III, pp. 1060-1069, 2005, Springer, 3-540-25862-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Brian Stephen Smith, Sung Kyu Lim |
QCA channel routing with wire crossing minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 217-220, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
QCA channel routing, weighted minimum feedback edge set, wire crossing minimization |
12 | Vaclav Dvorak |
Scheduling Collective Communications on Wormhole Fat Cubes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 24-27 October 2005, Rio de Janeiro, Brazil, pp. 27-34, 2005, IEEE Computer Society, 0-7695-2446-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | R. Castagnetti, R. Venkatraman, Brandon Bartz, Carl Monzel, T. Briscoe, Andres Teene, S. Ramesh 0004 |
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 193-196, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Hua Xiang 0001, Kai-Yuan Chao, Martin D. F. Wong |
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 181-186, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Layer migration, Max-cut, Capacitance coupling |
Displaying result #201 - #300 of 362 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ >>] |
|