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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6138 occurrences of 3479 keywords
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Results
Found 8586 publication records. Showing 8586 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
24 | Haile Yu, Qiang Xu 0001, Philip Heng Wai Leong |
On Timing Yield Improvement for FPGA Designs Using Architectural Symmetry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 539-544, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
Architectural Symmetry, LE swap, FPGA, Timing Yield |
24 | Jie Zhang 0007, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra |
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 889-892, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
CNT correlation, carbon nanotube, yield optimization, CNT |
24 | Andrew B. Kahng, Chul-Hong Park, Puneet Sharma, Qinke Wang |
Lens aberration aware placement for timing yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(1), pp. 16:1-16:26, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Layout, design for manufacturing, lithography, timing yield |
24 | Jun Xie, Minghui Lu, Hui-zhen Liang, Peng Lin |
The Research and Application of BP Network Tracking Model for Forecasting Oil Well Yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACIIA (1) ![In: PACIIA 2008, Volume 1, 2008 IEEE Pacific-Asia Workshop on Computational Intelligence and Industrial Application, 19-20 December 2008, Wuhan, China, pp. 18-22, 2008, IEEE Computer Society, 978-0-7695-3490-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
oil well yield, Roll Forecasting, Tracking Model, Artificial Neural Network, BP |
24 | Melanie Po-Leen Ooi, Ye Chow Kuang, Chris Chan, Serge N. Demidenko |
Predictive Die-Level Reliability-Yield Modeling for Deep Sub-micron Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 216-221, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
wafer testing, reliability, integrated circuits, burn-in, yield modelling |
24 | Bogdan M. Maziarz, Vijay K. Jain |
Automatic Reconfiguration and Yield of the TESH Multicomputer Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 51(8), pp. 963-972, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
TESH, fault-tolerance, routing, VLSI, Interconnection networks, reconfiguration, redundancy, yield, hierarchical networks, manufacturing defects, parallel computing systems, ULSI |
24 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with On-Chip CPU Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(10), pp. 1138-1144, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
on-chip CPU caches, partially good chips, Fault tolerance, yield enhancement |
24 | Charles H. Stapper |
Improved Yield Models for Fault-Tolerant Memory Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(7), pp. 872-881, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
fault-tolerant memory chips, defect-monitor data, redundant circuits, failure mechanisms, multivariate distributions, dynamic-random-access-memory, pragmatic approximation, fault tolerant computing, redundancy, DRAM chips, yield modeling, frequency distributions |
24 | Gurindar S. Sohi |
Cache Memory Organization to Enhance the Yield of High-Performance VLSI Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 38(4), pp. 484-492, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
cache memory organization, high performance VLSI processors, tolerance of defects faults, linear RAMs, trace-driven simulation analysis, storage management chips, VLSI, yield, fault location, buffer storage, performance degradation, random-access storage, integrated memory circuits |
24 | Michael C. Howells, Vinod K. Agarwal |
A Reconfiguration Scheme for Yield Enhancement of Large Area Binary Tree Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(4), pp. 463-468, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
large area binary tree architectures, reliability enhancement, partially global redundancy, programmable switches, VLSI, fault tolerant computing, computer architecture, trees (mathematics), yield enhancement, reconfiguration scheme |
24 | Israel Koren, Dhiraj K. Pradhan |
Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 36(3), pp. 344-355, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
Computational availability, fault tolerance, reliability, redundancy, VLSI designs, yield, wafer-scale integration |
24 | Tülin Erdim Mangir, Algirdas Avizienis |
Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(7), pp. 609-616, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
VLSI fault tolerance, Interconnect area estimates, redundancy partitioning, redundancy placement, regular designs, VLSI yield improvement |
23 | Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu |
Transistor sizing of custom high-performance digital circuits with parametric yield considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 781-786, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
custom circuits, optimization |
23 | Giuseppe Nicosia, Giovanni Stracquadanio |
A Design-for-Yield Algorithm to Assess and Improve the Structural and Energetic Robustness of Proteins and Drugs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEA ![In: Experimental Algorithms, 8th International Symposium, SEA 2009, Dortmund, Germany, June 4-6, 2009. Proceedings, pp. 245-256, 2009, Springer, 978-3-642-02010-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Gregory Lucas, Scott Cromar, Deming Chen |
FastYield: variation-aware, layout-driven simultaneous binding and module selection for performance yield optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 61-66, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Nancy Ying Zhou, Rouwaida Kanj, Kanak Agarwal, Zhuo Li 0001, Rajiv V. Joshi, Sani R. Nassif, Weiping Shi |
The impact of BEOL lithography effects on the SRAM cell performance and yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 607-612, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Javid Jaffari, Mohab Anis |
Timing yield estimation of digital circuits using a control variate technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 382-387, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey |
Yield evaluation of analog placement with arbitrary capacitor ratio. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 179-184, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan |
Increasing memory yield in future technologies through innovative design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 622-626, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Jin Sun 0006, Jun Li 0066, Dongsheng Ma, Janet Meiling Wang |
Chebyshev Affine-Arithmetic-Based Parametric Yield Prediction Under Limited Descriptions of Uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10), pp. 1852-1865, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Xin Li 0001, Yaping Zhan, Lawrence T. Pileggi |
Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(5), pp. 831-843, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Jin Sun 0006, Yue Huang, Jun Li 0066, Janet Meiling Wang |
Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 531-536, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Amit Goel, Sarvesh Bhardwaj, Praveen Ghanta, Sarma B. K. Vrudhula |
Computation of Joint Timing Yield of Sequential Networks Considering Process Variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 125-137, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Paolo Azzoni, Massimo Bertoletti, Nicola Dragone, Franco Fummi, Carlo Guardiani, W. Vendraminetto |
Yield-aware placement optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1232-1237, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Bao Liu 0001, Andrew B. Kahng, Xu Xu 0001, Jiang Hu, Ganesh Venkataraman |
A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 24-31, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Vivek Joshi, David T. Blaauw, Dennis Sylvester |
Soft-edge flip-flops for improved timing yield: design and optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 667-673, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
Exploring the interplay of yield, area, and performance in processor caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 216-223, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Subarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles C. Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn |
A New Flexible Algorithm for Random Yield Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 795-800, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Uthman Alsaiari, Resve A. Saleh |
Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 703-710, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Alfred L. Crouch, Phil Burlison, Dennis J. Ciplickas |
Processing High Volume Scan Test Results for Yield Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 293-298, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Jin-Tai Yan, Bo-Yi Chiang |
Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 899-906, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester |
Analytical yield prediction considering leakage/performance correlation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(9), pp. 1685-1695, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Lei-Ting Chen, David Lin, Dan Muuniz, Chia-Jiu Wang |
Wafer Yield Estimation Using Support Vector Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (2) ![In: Advances in Neural Networks - ISNN 2006, Third International Symposium on Neural Networks, Chengdu, China, May 28 - June 1, 2006, Proceedings, Part III, pp. 1053-1058, 2006, Springer, 3-540-34482-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Kenneth L. Shepard, Daniel N. Maynard |
Variability and yield improvement: rules, models, and characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 834-835, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Abhishek Somani, P. P. Chakrabarti 0001, Amit Patra |
A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Fadi J. Kurdahi, Ahmed M. Eltawil, Young-Hwan Park, Rouwaida Kanj, Sani R. Nassif |
System-Level SRAM Yield Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA, pp. 179-184, 2006, IEEE Computer Society, 0-7695-2523-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer |
An Error-Oriented Test Methodology to Improve Yield with Error-Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 130-135, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | A. Majid Awan, Mohd. Noor Md. Sap |
An Intelligent System Based on Kernel Methods for Crop Yield Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PAKDD ![In: Advances in Knowledge Discovery and Data Mining, 10th Pacific-Asia Conference, PAKDD 2006, Singapore, April 9-12, 2006, Proceedings, pp. 841-846, 2006, Springer, 3-540-33206-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Amit Agarwal 0001, Bipul Chandra Paul, Hamid Mahmoodi-Meimand, Animesh Datta, Kaushik Roy 0001 |
A process-tolerant cache architecture for improved yield in nanoscale technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(1), pp. 27-38, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaushik Roy 0001 |
Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(12), pp. 1859-1880, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Animesh Datta, Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy 0001 |
Yield Prediction of High Performance Pipelined Circuit with Respect to Delay Failures in Sub-100nm Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 6-8 July 2005, Saint Raphael, France, pp. 275-280, 2005, IEEE Computer Society, 0-7695-2406-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian |
SoC Yield Optimization via an Embedded-Memory Test and Repair Infrastructure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 21(3), pp. 200-207, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Mauro Olivieri, Mirko Scarana, Giuseppe Scotti, Alessandro Trifiletti |
Yield Optimization by Means of Process Parameters Estimation: Comparison Between ABB and ASV Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 119-128, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Nicola Dragone, Michele Quarantelli, Massimo Bertoletti, Carlo Guardiani |
High Yield Standard Cell Libraries: Optimization and Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 129-137, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Shanrui Zhang, Minsu Choi, Nohpill Park |
Modeling Yield of Carbon-Nanotube/Silicon-Nanowire FET-Based Nanoarray Architecture with h-hot Addressing Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings, pp. 356-364, 2004, IEEE Computer Society, 0-7695-2241-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Xiaopeng Wang, Marco Ottavi, Fred J. Meyer, Fabrizio Lombardi |
On The Yield of Compiler-Based eSRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings, pp. 11-19, 2004, IEEE Computer Society, 0-7695-2241-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Phillip Christie, José Pineda de Gyvez |
Prelayout interconnect yield prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(1), pp. 55-59, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Bart De Smedt, Georges G. E. Gielen |
HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10256-10263, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Marko Kosunen, Jouko Vankka, Ilari Teikari, Kari Halonen |
DNL and INL yield models for a current-steering D/A converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 969-972, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Tao Feng, Nohpill Park, Yong-Bin Kim, Vincenzo Piuri |
Yield Modeling and Analysis of a Clockless Asynchronous Wave Pipeline with Pulse Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 34-, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Xiaopeng Wang, Marco Ottavi, Fabrizio Lombardi |
Yield Analysis of Compiler-Based Arrays of Embedded SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 3-10, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Arman Vassighi, Oleg Semenov, Manoj Sachdev, Ali Keshavarzi |
Effect of Static Power Dissipation in Burn-In Environment on Yield of VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings, pp. 12-19, 2002, IEEE Computer Society, 0-7695-1831-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
23 | Bogdan M. Maziarz, Vijay K. Jain |
Yield Estimates for the TESH Multicomputer Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings, pp. 20-30, 2002, IEEE Computer Society, 0-7695-1831-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
23 | Gerard A. Allan |
Yield prediction by sampling IC layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(3), pp. 359-371, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Tianxu Zhao, Yue Hao, Yong-Chang Jiao |
VLSI Yield Optimization Based on the Sub-Processing-Element Level Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings, pp. 41-46, 2000, IEEE Computer Society, 0-7695-0719-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
23 | Tuna B. Tarim, Mohammed Ismail 0001 |
Functional yield enhancement and statistical design of a low power transconductor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 436-439, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
23 | Ting Wu, Say Wei Foo |
An efficient method for parametric yield gradient estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 419-422, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
23 | Brian Murphy |
Modelling the Yield of Number Field Sieve Polynominals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANTS ![In: Algorithmic Number Theory, Third International Symposium, ANTS-III, Portland, Oregon, USA, June 21-25, 1998, Proceedings, pp. 137-150, 1998, Springer, 3-540-64657-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
23 | Israel Koren, Zahava Koren |
Yield and Routing Objectives in Floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 2-4 November 1998, Austin, TX, USA, Proceedings, pp. 28-36, 1998, IEEE Computer Society, 0-8186-8832-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
23 | Zahava Koren, Israel Koren |
On the effect of floorplanning on the yield of large area integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 5(1), pp. 3-14, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Witold A. Pleskacz, Wojciech Maly |
Improved Yield Model for Submicron Domain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 20-22 October 1997, Paris, France, pp. 2-10, 1997, IEEE Computer Society, 0-8186-8168-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Neil J. Howard, Andrew M. Tyrrell, Nigel M. Allinson |
The yield enhancement of field-programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 2(1), pp. 115-123, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
23 | Chin-Long Wey, Jyhyeung Ding, Tsin-Yuan Chang |
Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 327-332, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
23 | Max Dauchet, Erick Timmerman |
Decidability of yield's equality for infinite regular trees. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Automata on Infinite Words ![In: Automata on Infinite Words, Ecole de Printemps d'Informatique Théorique, Le Mont Dore, France, May 14-18, 1984, pp. 118-136, 1984, Springer, 3-540-15641-0. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
22 | Dessislava Ganeva, Eugenia Roumenina, Petar Dimitrov, Alexander Gikov, Violeta Bozhanova, Rangel Dragov, Georgi Jelev, Krasimira Taneva |
Preharvest Durum Wheat Yield, Protein Content, and Protein Yield Estimation Using Unmanned Aerial Vehicle Imagery and Pléiades Satellite Data in Field Breeding Experiments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 16(3), pp. 559, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
22 | Varvara Voinarovska, Mikhail Kabeshov, Dmytro Dudenko, Samuel Genheden, Igor V. Tetko |
When Yield Prediction Does Not Yield Prediction: An Overview of the Current Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Chem. Inf. Model. ![In: J. Chem. Inf. Model. 64(1), pp. 42-56, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
22 | Greg Lyle, Kenneth D. Clarke, Adam D. Kilpatrick, David McCulloch Summers, Bertram Ostendorf |
A Spatial and Temporal Evaluation of Broad-Scale Yield Predictions Created from Yield Mapping Technology and Landsat Satellite Imagery in the Australian Mediterranean Dryland Cropping Region. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPRS Int. J. Geo Inf. ![In: ISPRS Int. J. Geo Inf. 12(2), pp. 50, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Nicoleta Darra, Borja Espejo-García, Aikaterini Kasimati, Olga Kriezi, Emmanouil Psomiadis, Spyros Fountas |
Can Satellites Predict Yield? Ensemble Machine Learning and Statistical Analysis of Sentinel-2 Imagery for Processing Tomato Yield Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 23(5), pp. 2586, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Patrick Helber, Benjamin Bischke, Peter Habelitz, Cristhian Sanchez, Deepak Pathak, Miro Miranda, Hiba Najjar, Francisco Alejandro Mena, Jayanth Siddamsetty, Diego Arenas, Michaela Vollmer, Marcela Charfuelan, Marlon Nuske, Andreas Dengel 0001 |
Crop Yield Prediction: An Operational Approach to Crop Yield Modeling on Field and Subfield Level with Machine Learning Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2023, Pasadena, CA, USA, July 16-21, 2023, pp. 2763-2766, 2023, IEEE, 979-8-3503-2010-7. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
22 | Qi Zhang, Kaiyi Wang, Yanyun Han, Zhongqiang Liu, Feng Yang, Shufeng Wang, Xiangyu Zhao 0004, Chunjiang Zhao 0001 |
A crop variety yield prediction system based on variety yield data compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Electron. Agric. ![In: Comput. Electron. Agric. 203, pp. 107460, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Tanuj Misra, Alka Arora, Sudeep Marwaha, Ranjeet Ranjan Jha, Mrinmoy Ray, Shailendra Kumar, Sudhir Kumar 0003, Viswanathan Chinnusamy |
Yield-SpikeSegNet: An Extension of SpikeSegNet Deep-Learning Approach for the Yield Estimation in the Wheat Using Visual Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Artif. Intell. ![In: Appl. Artif. Intell. 36(1), December 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Renata Duffková, Lucie Poláková, Vojtech Lukas, Petr Fucík |
The Effect of Controlled Tile Drainage on Growth and Grain Yield of Spring Barley as Detected by UAV Images, Yield Map and Soil Moisture Content. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 14(19), pp. 4959, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Shuo Chen, Weihang Liu, Puyu Feng, Tao Ye, Yuchi Ma, Zhou Zhang 0001 |
Improving Spatial Disaggregation of Crop Yield by Incorporating Machine Learning with Multisource Data: A Case Study of Chinese Maize Yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 14(10), pp. 2340, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Sumathi M., M. Rajkamal, S. P. Raja 0001, M. Venkatachalapathy, N. Vijayaraj |
A crop yield prediction model based on an improved artificial neural network and yield monitoring using a blockchain technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Wavelets Multiresolution Inf. Process. ![In: Int. J. Wavelets Multiresolution Inf. Process. 20(6), pp. 2250030:1-2250030:29, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
22 | Mamunur Rashid, Bifta Sama Bari, Yusri Yusup, Mohamad Anuar Kamaruddin, Nuzhat Khan |
A Comprehensive Review of Crop Yield Prediction Using Machine Learning Approaches With Special Emphasis on Palm Oil Yield Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 63406-63439, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
22 | Dong Han, Pengxin Wang, Kevin Tansey, Shuyu Zhang 0001, Huiren Tian, Yue Zhang, Hongmei Li |
Improving Wheat Yield Estimates by Integrating a Remotely Sensed Drought Monitoring Index Into the Simple Algorithm for Yield Estimate Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. ![In: IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 14, pp. 10383-10394, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
22 | Luis G. Riera, Matthew E. Carroll, Zhisheng Zhang, Johnathon M. Shook, Sambuddha Ghosal, Tianshuang Gao, Arti Singh, Sourabh Bhattacharya, Baskar Ganapathysubramanian, Asheesh K. Singh, Soumik Sarkar |
Deep Multi-view Image Fusion for Soybean Yield Estimation in Breeding Applications Deep Multi-view Image Fusion for Soybean Yield Estimation in Breeding Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2011.07118, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
22 | José A. Iglesias, Gwenael Mercier, Emad Chaparian, Ian A. Frigaard |
Computing the Yield Limit in Three-dimensional Flows of a Yield Stress Fluid About a Settling Particle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2002.05557, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
22 | Jenelle White, Aaron A. Berg, Catherine Champagne, Yinsuo Zhang, Aston Chipanshi, Bahram Daneshfar |
Improving crop yield forecasts with satellite-based soil moisture estimates: An example for township level canola yield forecasts over the Canadian Prairies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Appl. Earth Obs. Geoinformation ![In: Int. J. Appl. Earth Obs. Geoinformation 89, pp. 102092, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
22 | Sergii Skakun, Eric F. Vermote, Belen Franch, Jean-Claude Roger, Nataliia Kussul, Junchang Ju, Jeffrey G. Masek |
Winter Wheat Yield Assessment from Landsat 8 and Sentinel-2 Data: Incorporating Surface Reflectance, Through Phenological Fitting, into Regression Yield Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 11(15), pp. 1768, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
22 | Li Yu, Jun Pei, Xinbao Liu, Wenjuan Fan, Panos M. Pardalos |
The effect of yield rate in a general price-setting newsvendor model with a yield-dependent secondary market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. Trans. Oper. Res. ![In: Int. Trans. Oper. Res. 26(6), pp. 2337-2361, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
22 | Anil Suat Terliksiz, D. Turgay Altýlar |
Use Of Deep Neural Networks For Crop Yield Prediction: A Case Study Of Soybean Yield in Lauderdale County, Alabama, USA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Agro-Geoinformatics ![In: 8th International Conference on Agro-Geoinformatics, Agro-Geoinformatics 2019, Istanbul, Turkey, July 16-19, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2116-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
22 | Mengshuo Wang, Wenlong Lv, Fan Yang 0001, Changhao Yan, Wei Cai 0003, Dian Zhou, Xuan Zeng 0001 |
Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10), pp. 1929-1942, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
22 | Paolo Cosmo Silvestro, Stefano Pignatti, Simone Pascucci, Hao Yang 0009, Zhenhai Li, Guijun Yang, Wenjiang Huang, Raffaele Casa |
Estimating Wheat Yield in China at the Field and District Scale from the Assimilation of Satellite Data into the Aquacrop and Simple Algorithm for Yield (SAFY) Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 9(5), pp. 509, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
22 | Lakesh K. Sharma, Sukhwinder K. Bali, James D. Dwyer, Andrew B. Plant, Arnab Bhowmik |
A Case Study of Improving Yield Prediction and Sulfur Deficiency Detection Using Optical Sensors and Relationship of Historical Potato Yield with Weather Data in Maine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 17(5), pp. 1095, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
22 | Amin Aslani, Ata Allah Taleizadeh, Simone Zanoni |
An EOQ model with partial backordering with regard to random yield: two strategies to improve mean and variance of the yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Ind. Eng. ![In: Comput. Ind. Eng. 112, pp. 379-390, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
22 | Renzhong Song, Tao Cheng 0003, Xia Yao, Yongchao Tian, Yan Zhu 0005, Weixing Cao |
Evaluation of Landsat 8 time series image stacks for predicitng yield and yield components of winter wheat. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IGARSS ![In: 2016 IEEE International Geoscience and Remote Sensing Symposium, IGARSS 2016, Beijing, China, July 10-15, 2016, pp. 6300-6303, 2016, IEEE, 978-1-5090-3332-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
22 | Yu Huang 0005, Wu Yang, Wu-Tung Cheng |
Advancements in diagnosis driven yield analysis (DDYA): A survey of state-of-the-art scan diagnosis and yield analysis technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 20th IEEE European Test Symposium, ETS 2015, Cluj-Napoca, Romania, 25-29 May, 2015, pp. 1-10, 2015, IEEE, 978-1-4799-7603-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
22 | Junichi Hirase |
Introduction of Yield Quadrant and Yield Capability Index for VLSI Manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 97-C(6), pp. 609-618, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Yang Xu 0019, Bo Wang 0010, Jürgen Teich |
Parametric yield optimization using leakage-yield-driven floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS), Palma de Mallorca, Spain, September 29 - Oct. 1, 2014, pp. 1-6, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Juanjuan Dai, Yaojian Wu, Yurong Ouyang |
Calculations of the National Average Yield, Equivalence Factor and Yield Factor in Ten Years Based on National Hectares' Ecological Footprint Model - A Case Study of Xiamen City. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GRMSE ![In: Geo-Informatics in Resource Management and Sustainable Ecosystem - Second International Conference, GRMSE 2014, Ypsilanti, MI, USA, October 3-5, 2014. Proceedings, pp. 338-349, 2014, Springer, 978-3-662-45736-8. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Eshan Singh |
Modeling location based wafer die yield variation in estimating 3D stacked IC yield from wafer to wafer stacking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
22 | Felix Rembold, Clement Atzberger, Igor V. Savin, Oscar Rojas |
Using Low Resolution Satellite Imagery for Yield Prediction and Yield Anomaly Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 5(4), pp. 1704-1733, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Felix Rembold, Clement Atzberger, Igor V. Savin, Oscar Rojas |
Correction: Rembold, F.; Atzberger, C.; Savin, I.; Rojas, O. Using Low Resolution Satellite Imagery for Yield Prediction and Yield Anomaly Detection. RemoteSens 2013, 5, 1704-1733. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Remote. Sens. ![In: Remote. Sens. 5(11), pp. 5572-5573, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Eun Ju Hwang, Wook Kim, Young Hwan Kim |
Timing Yield Slack for Timing Yield-Constrained Optimization and Its Application to Statistical Leakage Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 21(10), pp. 1783-1796, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
22 | Seyyed Hassan Khalilinezhad, Akram Reza, Midia Reshadi |
Yield modeling and yield-aware mapping for application specific networks-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCHIP ![In: 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, pp. 1-4, 2011, IEEE, 978-1-4577-0514-4. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Wei Tian, Zhensheng Guo, Yanxia Liu, Shenju Zhang |
Research on the Yield Formation Characteristics of Zheng-Wheat 7698 under the Super-High Yield Condition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDMA ![In: Second International Conference on Digital Manufacturing and Automation, ICDMA 2011, Zhangjiajie, Hunan, China, August 5-7, 2011, pp. 1042-1045, 2011, IEEE Computer Society, 978-1-4577-0755-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Yuanjie He, Jiang Zhang |
Random yield supply chain with a yield dependent secondary market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 206(1), pp. 221-230, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta 0001 |
Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010, pp. 1249-1254, 2010, IEEE Computer Society, 978-1-4244-7054-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
22 | Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta 0001 |
SIRUP: Switch Insertion in RedUndant Pipeline Structures for Yield and Yield/Area Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: Proceedings of the Eighteentgh Asian Test Symposium, ATS 2009, 23-26 November 2009, Taichung, Taiwan, pp. 193-199, 2009, IEEE Computer Society, 978-0-7695-3864-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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