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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 7713 publication records. Showing 7713 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
24 | Mladen Nikitovic, Mats Brorsson |
An adaptive chip-multiprocessor architecture for future mobile terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002, pp. 43-49, 2002, ACM, 1-58113-575-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
chip-multiprocessor (CMP), power consumption, mobile terminals, energy-aware scheduling |
24 | Lucian Codrescu, D. Scott Wills, James D. Meindl |
Architecture of the Atlas Chip-Multiprocessor: Dynamically Parallelizing Irregular Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(1), pp. 67-82, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Thread speculation, multiscalar, parallelization, chip-multiprocessor, multithreading, value prediction |
24 | Andreas A. Veglis, Andreas S. Pombortsis |
Performance Analysis of Multiprocessor Architectures via Analytical Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 33th Annual Simulation Symposium (SS 2000), 16-22 April 2000, Washington, DC, USA, pp. 326-332, 2000, IEEE Computer Society, 0-7695-0598-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
analytical simulation, MathConnex, performance, multiprocessor |
24 | Håkan Sundell, Philippas Tsigas |
Space efficient wait-free buffer sharing in multiprocessor real-time systems based on timing information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 12-14 December 2000, Cheju Island, South Korea, pp. 433-440, 2000, IEEE Computer Society, 0-7695-0930-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
space-efficient wait-free algorithm, real-time multiprocessor systems, deadline guarantees, nonblocking algorithms, unbounded time-stamps, time-stamp bounding, concurrent read/write operations, real-time systems, protocol, data structures, data structures, timing, multiprocessing systems, mutual exclusion, blocking, buffer storage, timing information, shared buffer, memory protocols |
24 | Randall S. Janka, Linda M. Wills |
Combining Virtual Benchmarking with Rapid System Prototyping for Real-Time Embedded Multiprocessor Signal Processing System Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 20-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
signal processor, specification and design methodology, middleware, multiprocessor, embedded, rapid prototyping, codesign |
24 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya |
Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 8-13, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Design Space Exploration, SDL, Hardware/Software Codesign, Performance Estimation, Multiprocessor Architectures |
24 | Satoshi Fujita, Tadanori Nakagawa |
Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication Delay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 212-220, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
inevitable communication delay, lower bound, Multiprocessor scheduling problem |
24 | Dwight Sunada, David Glasco, Michael J. Flynn |
Multiprocessor Architecture Using an Audit Trail for Fault Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTCS ![In: Digest of Papers: FTCS-29, The Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing, Madison, Wisconsin, USA, June 15-18, 1999, pp. 40-47, 1999, IEEE Computer Society, 0-7695-0213-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
apparatus, tightly-coupled multiprocessor, fault tolerance, algorithm, checkpoint |
24 | G. Manimaran, C. Siva Ram Murthy |
An Efficient Dynamic Scheduling Algorithm For Multiprocessor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 9(3), pp. 312-319, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
parallelizable tasks, real-time systems, Multiprocessor, dynamic scheduling, resource constraints |
24 | Ho-fung Leung, Hing-Fung Ting |
An Optimal Algorithm for Global Termination Detection in Shared-Memory Asynchronous Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 8(5), pp. 538-543, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
optimality, Termination detect, shared-memory multiprocessor systems |
24 | Chun Xia, Josep Torrellas |
Improving the Data Cache Performance of Multiprocessor Operating Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 85-94, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
data cache performance, operating system effect on caches, bus-based multiprocessor, address trace evaluation, block operations, latency hiding |
24 | Xiaofan Yang, Tinghuai Chen, Zehan Cao, Zhongshi He, Hongqing Cao |
A New Scheme For The Fault Diagnosis Of Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 5th Asian Test Symposium (ATS '96), November 20-22, 1996, Hsinchu, Taiwan, pp. 289-294, 1996, IEEE Computer Society, 0-8186-7478-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
system-level probabilistic diagnosis, K-Step-Voting algorithm, generalised Majority-Voting algorithm, BGM model, pessimistic model, fault tolerance, fault diagnosis, high-performance computing, multiprocessing systems, fault model, multiprocessor systems, computer simulations, random graphs, PMC model, diagnosis algorithm, connection assignment, hypercube systems |
24 | Jan Jonsson, Jonas Vasell |
A Comparative Study of Methods for Time-Deterministic Message Delivery in a Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 392-398, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Time-deterministic communication, point-to-point interconnection networks, link contention analysis, implementation cost, multiprocessor architectures, communication scheduling, real-time channels |
24 | Sajal K. Das 0001, Sanjoy K. Sen |
Analysis of Memory Interference in Buffered Multiprocessor Systems in Presence of Hot Spots and Favorite Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 281-285, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
buffered multiprocessor systems, discrete Markov chain model, processor-memory interconnections, hot memory, favorite memory, mean queue length, memory request, asymptotic bandwidth, performance evaluation, Markov processes, shared memory systems, upper bound, hot spots, simulation studies, memory interference, mean waiting time |
24 | Chung-Sei Rhee, Heok-Jung Kwon, Young-Tak Kwon, Byung-Whan Choi |
On the real time diagnosability of multiprocessor systems by comparison approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: Third International Workshop on Real-Time Computing Systems Application (RTCSA '96), October 30 - November 01, 1996, Seoul, Korea, pp. 154-161, 1996, IEEE Computer Society, 0-8186-7626-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
real time diagnosability, comparison approach, multiprocessing systems, multiprocessor systems, polynomial time algorithm, faulty processors |
24 | Johan Stärner, Joakim Adomat, John Furunäs, Lennart Lindh |
Real-Time Scheduling Co-Processor in Hardware for Single and Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 509-512, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
real-time scheduling co-processor, predictable time behaviour, digital chip, Real-Time Unit, global resources, task synchronisation, multiprocessor systems, timing analysis, processor scheduling |
24 | Edward David Moreno Ordonez, Sergio Takeo Kofuji |
Performance evaluation of the fixed sequential prefetching on a bus-based multiprocessor: preliminary results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), June 12-14, 1996, Beijing, China, pp. 487-493, 1996, IEEE Computer Society, 0-8186-7460-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
fixed sequential prefetching, bus-based multiprocessor, sequential prefetching, OBL policy, performance evaluation, performance evaluation, Petri nets, Petri nets, shared memory systems, shared memory systems, cache storage, data prefetching |
24 | Xuemin Lin 0001, Simon Fox |
An effective parallelization of execution of multijoins in multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), June 12-14, 1996, Beijing, China, pp. 63-69, 1996, IEEE Computer Society, 0-8186-7460-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
multijoins execution, synchronous execution strategy, processor allocation problem, inter-operator parallelization problem, parallelization, relational databases, multiprocessing systems, multiprocessor systems, processor scheduling |
24 | Victor B. Lortz, Kang G. Shin |
Semaphore Queue Priority Assignment for Real-Time Multiprocessor Synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 21(10), pp. 834-844, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
multiprocessor synchronization, concurrency control, Real-time scheduling, priority assignment |
24 | Cosimo Antonio Prete, Luigi M. Ricciardi, Gianpaolo Prina |
Reducing coherence-related overhead in multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), January 25-27, 1995, San Remo, Italy, pp. 444-451, 1995, IEEE Computer Society, 0-8186-7031-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
coherence-related overhead, snooping protocol, shared copies, performance evaluation, caching, consistency, multiprocessing systems, multiprocessor systems, shared memory systems, concurrent processes |
24 | Gary S. H. Tan, Yong Meng Teo |
Experiences in simulating a declarative multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 28st Annual Simulation Symposium (SS '95), April 25-28, 1995, Santa Barbara, California, USA, pp. 95-104, 1995, IEEE Computer Society, 0-8186-7091-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
declarative multiprocessor simulation, declarative programming languages, Flagship parallel reduction machine, packet-based graph reduction model, executional units, timing characteristics, event-driven timing scheme, tightly-coupled processor-store pairs, performance evaluation, performance evaluation, parallel architectures, virtual machines, timing, parallel machines, synchronisation, synchronisation, parallel languages, functional languages, functional languages, functional simulator, parallel computer architectures, MIMD architecture, delta network |
24 | Apratim Purakayastha, Carla Schlatter Ellis, David Kotz, Nils Nieuwejaar, Michael L. Best |
Characterizing parallel file-access patterns on a large-scale multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 165-172, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
parallel file-access patterns, performance evaluation, parallel machines, workload, workloads, file organisation, parallel file systems, CM-5, parallel scientific applications, usage studies, large-scale multiprocessor |
24 | Bapiraju Vinnakota, Niraj K. Jha |
Design of Algorithm-Based Fault-Tolerant Multiprocessor Systems for Concurrent Error Detection and Fault Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(10), pp. 1099-1106, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
fault-tolerant multiprocessor systems, algorithm-basedmultiprocessor systems, algorithm-based faulttolerance, low-overhead system-level error detection, fault location scheme, ABFTsystems, design procedure, data element sharing, ABFT system design, reliability, fault diagnosis, fault tolerant computing, multiprocessing systems, fault location, system recovery, concurrent error detection, parallelarchitectures |
24 | Helmar Burkhart, Rudolf Eigenmann, Heinz Kindlimann, Michael Moser, Heinz Scholian |
The M3 Multiprocessor Laboratory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(5), pp. 507-519, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
M/sup 3/ multiprocessor laboratory, integrated programming environment, softwaredevelopment cycle, parallel program, parallel programming, debugging, programming, programming environments, performance measurement, configuration |
24 | Chia Shen, Krithi Ramamritham, John A. Stankovic |
Resource Reclaiming in Multiprocessor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(4), pp. 382-397, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
multiprocessor real-time systems, worst case computation times, resource reclaiming, scheduling, real-time systems, resource allocation, multiprocessing systems, real-time scheduling, deadline, local optimization, resource requirements, computationalcomplexity |
24 | Gilbert C. Sih, Edward A. Lee |
Declustering: A New Multiprocessor Scheduling Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(6), pp. 625-637, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
acyclicprecedence graphs, scheduling, multiprocessing systems, contention, multiprocessor scheduling, interprocessor communication, declustering, graph-analysis, shared resource, scheduling heuristic, compile-time |
24 | Thin-Fong Tsuei, Mary K. Vernon |
A Multiprocessor Bus Design Model Validated by System Measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(6), pp. 712-727, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
commercial multiprocessor bus, bus design, asynchronous memorywrite operations, in-order delivery, processor read requests, memoryresponses, outstanding processor requests, two-level hierarchical model, mean value analysis techniques, measured system performance, parallel program workloads, memory access characteristics, analytic queueing models, model tractability, detailed simulation, system design tradeoffs, parallel programming, formal verification, Markov chain, Markov processes, queueing theory, multiprocessing systems, queueing networks, system buses, priority scheduling, performanceevaluation, system measurement |
24 | Nayeem Islam, Roy H. Campbell |
Design Considerations for Shared Memory Multiprocessor Message Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(6), pp. 702-711, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
comparative performance, message passing system designs, shared memory EncoreMultimax multiprocessor, example parallel applications, shared memorymachine results, Intel iPSC/2, NX/2 operating system, bufferorganization, value semantics, kernel space, memory caching, message sizes, synchronization, benchmarks, message passing, program testing, parallel machines, shared memory systems, design alternatives, parallelprogramming, copying, coordination strategy |
24 | Imadeldin O. Mahgoub, Ahmed K. Elmagarmid |
Performance Analysis of a Generalized Class of M-Level Hierarchical Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(2), pp. 129-138, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
hierarchical multiprocessor systems, system bandwidth, hierarchically nonuniform reference, local requests, m-level system, crossbar system, performance evaluation, performance analysis, probability, multiprocessing systems, multiprocessorinterconnection networks, memory modules, multiple-bus system |
24 | János Sztrik, Demetres D. Kouvatsos |
Asymptotic Analysis of a Heterogeneous Multiprocessor System in a Randomly Changing Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(10), pp. 1069-1075, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
asymptotic queuing theoretic approach, heterogeneous multiprocessor computer system, randomly changing environment, stochastic times, random environment, service rates, busy period length, exponentially distributed random variable, steady-state performance measures, mean delay time, expected waiting time, performance evaluation, reliability, queueing theory, multiprocessing systems, stochastic processes, bus, system throughput, FCFS |
24 | Krithi Ramamritham, John A. Stankovic, Perng-Fei Shiah |
Efficient Scheduling Algorithms for Real-Time Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 1(2), pp. 184-194, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
real-time multiprocessor systems, worst-case computation times, partial schedule, scheduling, real-time systems, multiprocessing systems, scheduling algorithms, dynamic scheduling, deadlines, deadlines, resources requirements, feasible schedule, heuristic functions |
24 | Lionel M. Ni, Ching-Farn Eric Wu |
Design Tradeoffs for Process Scheduling in Shared Memory Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 15(3), pp. 327-334, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
hill climbing simulation, software bottleneck, monitor bottleneck, low process utilization, load imbalancing, memory requests, fixed monitor selection, supervisory programs, scheduling, performance evaluation, performance evaluation, multiprocessing systems, process scheduling, multiprocessing programs, shared memory multiprocessor systems |
24 | Ghassan Z. Qadah, Keki B. Irani |
The Join Alogorithms on a Shared-Memory Multiprocessor Database Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 14(11), pp. 1668-1683, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
shared-memory multiprocessor database machine, performance evaluation, performance evaluation, parallel algorithms, parallel algorithms, parallel architectures, parallel architectures, relational databases, relational databases, special purpose computers, join algorithms |
23 | Ari Kulmala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen |
Evaluating SoC Network Performance in MPEG-4 Encoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 56(2-3), pp. 105-123, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
FPGA multiprocessor, Multiprocessor, System-on-chip, Network-on-chip, MPEG-4, MPSoC, On-chip interconnection |
23 | M. A. Sarwar, Alan D. George, David E. Collins |
Reliability Modeling of SCI Ring-Based Topologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: Proceedings 27th Conference on Local Computer Networks, Tampa, Florida, USA, 8-10 November, 2000, pp. 126-134, 2000, IEEE Computer Society, 0-7695-0912-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
SCI ring-based topologies, cluster interconnects, point-to-point ring-based interconnect, switched ring topologies, 1D k-ary n-cube switching fabrics, 2D k-ary n-cube switching fabrics, UltraSAN, single-ring system, redundant ring, fault tolerance, Petri nets, multiprocessor interconnection networks, network topology, reliability modeling, link failures, system buses, multiprocessor interconnects, scalable coherent interface |
23 | Rong-Yuh Hwang |
An Efficient Technique of Instruction Scheduling on a Superscalar-Based Mulprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 33-39, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
FLASH multiprocessor, block data transfer, multiple communication protocols, embedded protocol processor, protocol, shared memory, prefetching, cache storage, FLASH, cache coherence protocol, multiprocessor architecture, MAGIC |
23 | Jens Kargaard Madsen, Stephen I. Long |
A High-Speed Interconnect Network Using Ternary Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 2-7, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high-speed interconnect network, STARI, delay differences, crossbar topology, LSI GaAs chips, MESFET process, multiprocessor interconnection networks, multiprocessor system, buffers, clock skew, ternary logic, ternary logic, point-to-point communication |
23 | Kelvin K. Yue, David J. Lilja |
Parameter estimation for a generalized parallel loop scheduling algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (2) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 187-191, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
generalized parallel loop scheduling algorithm, strategy evolution, CS-2, FS-alt, chunk scheduling, genetic algorithms, genetic algorithm, scheduling, parallel algorithms, virtual machines, parameter estimation, parameter estimation, shared-memory multiprocessor, shared memory systems, factoring, program control structures, multiprocessor simulator |
23 | Sivaramakrishnan Venkatraman, Sharad C. Seth, Prathima Agrawal |
Parallel test generation with low communication overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 116-120, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
parallel test generation, low communication overhead, dynamic search-space allocation strategy, Sequent multiprocessor, parallel algorithms, logic testing, Boolean functions, analytical model, combinational circuits, shared memory multiprocessor, shared memory systems, processor scheduling, software performance evaluation, boolean satisfiability, combinational logic, greedy heuristic |
23 | Ronald D. Fellman, Robert Grygiel, Isaac Chu |
The effect of preemptive queuing in a priority-based real-time network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), November 6-10, 1995, Fort Lauderdale, Florida, USA, pp. 322-, 1995, IEEE Computer Society, 0-8186-7123-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
preemptive queuing, priority-based real-time network, real-time multiprocessor system, interprocessor communications network entrance, data buffering, simulations, performance evaluation, real-time systems, virtual machines, multiprocessor interconnection networks, queueing theory, packet switching, packet switches, performance improvement |
23 | Tsern-Huei Lee, Jin-Jye Chou |
Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(11), pp. 1206-1210, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
dynamic full access property, multistage interconnectionnetworks, faulty banyan networ, multiprocessor system reconfiguration, test procedure, faulty switching elements, fault tolerant computing, probability, multiprocessor interconnection networks, reconfigurable architectures, computer testing, network decomposition |
23 | Qing Yang 0001, George Thangadurai, Laxmi N. Bhuyan |
Design of an Adaptive Cache Coherence Protocol for Large Scale Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(3), pp. 281-293, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
adaptive cache coherence protocol, cache-based multiprocessor, cache coherence scheme, memoryarchitecture, protocols, multiprocessor interconnection networks, multistage interconnection network, buffer storage, hierarchical network |
23 | Victor E. Mendia, Dilip Sarkar |
Optimal Broadcasting on the Star Graph. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(4), pp. 389-396, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
message broadcasting, all-to-all broadcasting algorithm, parallel algorithms, parallel algorithms, computational complexity, graph theory, multiprocessor interconnection network, multiprocessor interconnection networks, symmetry, optimal algorithm, star graph, one-to-all broadcasting, recursive partitioning, n-cube, faulttolerant |
23 | Shuo-Hsien Hsiao, C. Y. Roger Chen |
Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(5), pp. 632-640, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
message size, circuit switched multistage interconnection networks, hold strategy, processor-memory communications, processor processing time, closed queuing network model, performance evaluation, performance evaluation, multiprocessor interconnection networks, queueing theory, multiprocessor systems, switching theory, memory access |
23 | Ishfaq Ahmad, Arif Ghafoor |
Semi-Distributed Load Balancing For Massively Parallel Multicomputer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 17(10), pp. 987-1004, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
massively parallel multicomputer systems, semidistributed approach, fully distributed approaches, two-level hierarchical control, independent symmetric regions, distance transitive graphs, scheduling points, fully distributed strategy, scheduling, distributed systems, computational complexity, load balancing, parallel architectures, multiprocessor interconnection networks, parallel machines, multiprocessor system, NP-complete problem, simulation study, interconnection structure, interconnection structures, state information, Hadamard matrix, combinatorial structure |
20 | Peter Sewell |
Memory, an elusive abstraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMM ![In: Proceedings of the 9th International Symposium on Memory Management, ISMM 2010, Toronto, Ontario, Canada, June 5-6, 2010, pp. 51-52, 2010, ACM, 978-1-4503-0054-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
semantics, relaxed memory models |
20 | Myoung-Jo Jung, Yeong Rak Seong, Cheol-Hoon Lee |
Optimal RM scheduling for simply periodic tasks on uniform multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICHIT ![In: Proceedings of the 2009 International Conference on Hybrid Information Technology, ICHIT 2009, Daejeon, Korea, August 27-29, 2009, pp. 383-389, 2009, ACM, 978-1-60558-662-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Gautam Altekar, Ion Stoica |
ODR: output-deterministic replay for multicore debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: Proceedings of the 22nd ACM Symposium on Operating Systems Principles 2009, SOSP 2009, Big Sky, Montana, USA, October 11-14, 2009, pp. 193-206, 2009, ACM, 978-1-60558-752-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
debugging, multicore, inference, deterministic replay |
20 | Hamid R. Arabnia |
A Scalable Network Topology for Medical Imaging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: 10th IEEE International Conference on High Performance Computing and Communications, HPCC 2008, 25-27 Sept. 2008, Dalian, China, pp. 4, 2008, IEEE Computer Society, 978-0-7695-3352-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Nagesh B. Lakshminarayana, Hyesoon Kim |
Understanding performance, power and energy behavior in asymmetric multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 471-477, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Björn B. Brandenburg, James H. Anderson |
A Comparison of the M-PCP, D-PCP, and FMLPon LITMUSRT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OPODIS ![In: Principles of Distributed Systems, 12th International Conference, OPODIS 2008, Luxor, Egypt, December 15-18, 2008. Proceedings, pp. 105-124, 2008, Springer, 978-3-540-92220-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | N. V. Bocharov |
Concurrent Programming Technologies and Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Program. Comput. Softw. ![In: Program. Comput. Softw. 29(1), pp. 2-12, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Les Gasser, Kelvin Kakugawa |
MACE3J: fast flexible distributed simulation of large, large-grain multi-agent systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAMAS ![In: The First International Joint Conference on Autonomous Agents & Multiagent Systems, AAMAS 2002, July 15-19, 2002, Bologna, Italy, Proceedings, pp. 745-752, 2002, ACM. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Dilma Da Silva, Karsten Schwan, Greg Eisenhauer |
CTK: Configurable Object Abstractions for Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 27(6), pp. 531-549, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
high-performance objects, object fragmentation, complex parallel programming, library operating systems, dynamic adaptation, Configurable systems |
20 | Riccardo Foschia, Thomas Rauber, Gudula Rünger |
Modeling the Communication Behavior of the Intel Paragon. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 1997, Proceedings of the Fifth International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, January 12-15, 1997 Haifa, Israel, pp. 117-124, 1997, IEEE Computer Society, 0-8186-7758-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
20 | Diana Göhringer, Michael Hübner 0001, Michael Benz, Jürgen Becker 0001 |
A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 286, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
designflow, toolchain, fpga, partitioning, reconfigurable computing, mpsoc, hardware/software co-design |
20 | Marco Ceriani, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto, Antonino Tumeo |
Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 1267-1274, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multi-objective evolution, systems-on-chip synthesis |
20 | Dongyoon Lee, Benjamin Wester, Kaushik Veeraraghavan, Satish Narayanasamy, Peter M. Chen, Jason Flinn |
Respec: efficient online multiprocessor replayvia speculation and external determinism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010, pp. 77-90, 2010, ACM, 978-1-60558-839-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
external determinism, speculative execution, replay |
20 | Khaled Z. Ibrahim, Smaïl Niar |
Power-Aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. High Perform. Embed. Archit. Compil. ![In: Transactions on High-Performance Embedded Architectures and Compilers II, pp. 286-306, 2009, Springer, 978-3-642-00903-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Marko Bertogna, Michele Cirinei, Giuseppe Lipari |
Schedulability Analysis of Global Scheduling Algorithms on Multiprocessor Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 20(4), pp. 553-566, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur |
Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 57(2), pp. 263-283, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Multiprocessors System on Chip (MPSoC), Optimizations, Multimedia, Parallelism, Memory, Multi-threading |
20 | Rong Deng, Changjun Jiang, Fei Yin |
Ant colony optimization for precedence-constrained heterogeneous multiprocessor assignment problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GEC Summit ![In: Proceedings of the first ACM/SIGEVO Summit on Genetic and Evolutionary Computation, GEC Summit 2009, Shanghai, China, June 12-14, 2009, pp. 89-96, 2009, ACM, 978-1-60558-326-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
precedence-constrained problems, ant colony optimization, heterogeneous environment, ant colony system, DAG scheduling |
20 | Pablo Montesinos, Matthew Hicks, Samuel T. King, Josep Torrellas |
Capo: a software-hardware interface for practical deterministic multiprocessor replay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2009, Washington, DC, USA, March 7-11, 2009, pp. 73-84, 2009, ACM, 978-1-60558-406-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
capo, capoone, replay sphere, deterministic replay |
20 | Rodolfo Pellizzoni, Marco Caccamo |
M-CASH: A real-time resource reclaiming algorithm for multiprocessor platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 40(1), pp. 117-147, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Real-time resource reservation, Real-time scheduling, Symmetric multiprocessors |
20 | UmaMaheswari C. Devi, James H. Anderson |
Tardiness bounds under global EDF scheduling on a multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 38(2), pp. 133-189, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Partitioning, Migrations, EDF, Preemptions, Soft real-time, Global scheduling, Tardiness |
20 | Keqin Li 0001 |
Performance Analysis of Power-Aware Task Scheduling Algorithms on Multiprocessor Computers with Dynamic Voltage and Speed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 19(11), pp. 1484-1497, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt |
Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8), pp. 1439-1452, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto |
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1039-1044, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann |
Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1462-1467, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Diana Göhringer, Michael Hübner 0001, Thomas Perschke, Jürgen Becker 0001 |
New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 495-498, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Alexander Klimm, Lars Braun, Jürgen Becker 0001 |
An adaptive and scalable multiprocessor system For Xilinx FPGAs using minimal sized processor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-7, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Georgios-Grigorios Mplemenos, Ioannis Papaefstathiou |
MPLEM: An 80-processor FPGA Based Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2008, 14-15 April 2008, Stanford, Palo Alto, California, USA, pp. 273-274, 2008, IEEE Computer Society, 978-0-7695-3307-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Jian (Denny) Lin, Albert Mo Kim Cheng |
Real-Time Task Assignment in Rechargeable Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: The Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2008, Kaohisung, Taiwan, 25-27 August 2008, Proceedings, pp. 279-284, 2008, IEEE Computer Society, 978-0-7695-3349-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Jude Angelo Ambrose, Sri Parameswaran, Aleksandar Ignjatovic |
MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 678-684, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Lars Lundberg, Håkan Lennerstad |
Slack-based global multiprocessor scheduling of aperiodic tasks in parallel embedded real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: The 6th ACS/IEEE International Conference on Computer Systems and Applications, AICCSA 2008, Doha, Qatar, March 31 - April 4, 2008, pp. 465-472, 2008, IEEE Computer Society, 978-1-4244-1967-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | George W. Dunlap, Dominic G. Lucchetti, Michael A. Fetterman, Peter M. Chen |
Execution replay of multiprocessor virtual machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 4th International Conference on Virtual Execution Environments, VEE 2008, Seattle, WA, USA, March 5-7, 2008, pp. 121-130, 2008, ACM, 978-1-59593-796-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ReVirt, direct memory access, execution replay, hardware page protections, virtual machines, multiprocessors, multithreading, determinism, Xen |
20 | Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino |
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(5), pp. 606-621, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
embedded multimedia, low power, energy efficiency, MPSoCs, programming models, task-level parallelism |
20 | Liliana Cucu, Joël Goossens |
Feasibility intervals for multiprocessor fixed-priority scheduling of arbitrary deadline periodic systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1635-1640, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 720-725, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, Kai Huang 0001 |
Mapping Applications to Tiled Multiprocessor Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 10-13 July 2007, Bratislava, Slovak Republic, pp. 29-40, 2007, IEEE Computer Society, 978-0-7695-2902-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Hsin-Wen Wei, Yi-Hsiung Chao, Shun-Shii Lin, Kwei-Jay Lin, Wei-Kuan Shih |
Current Results on EDZL Scheduling for Multiprocessor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 21-24 August 2007, Daegu, Korea, pp. 120-130, 2007, IEEE Computer Society, 0-7695-2975-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Akira Yamawaki 0002, Masahiko Iwane |
An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Yanhong Liu, Bharadwaj Veeravalli, Sivakumar Viswanathan |
Novel critical-path based low-energy scheduling algorithms for heterogeneous multiprocessor real-time embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Changjiu Xian, Yung-Hsiang Lu, Zhiyuan Li 0001 |
Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 664-669, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Alaa R. Alameldeen, David A. Wood 0001 |
IPC Considered Harmful for Multiprocessor Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(4), pp. 8-17, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Instructions per cycle, multithreaded workloads, simulation, IPC |
20 | Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Damien Lyonnard, Olivier Benny, Bruno Lavigueur, David Lo 0002, Giovanni Beltrame, Vincent Gagné, Gabriela Nicolescu |
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(7), pp. 667-680, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Sanjoy K. Baruah, Nathan Fisher |
The Partitioned Multiprocessor Scheduling of Deadline-Constrained Sporadic Task Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(7), pp. 918-923, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multiprocessors, resource augmentation, Sporadic tasks, partitioned scheduling |
20 | Shaoxiong Hua, Gang Qu 0001, Shuvra S. Bhattacharyya |
Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(2), pp. 321-341, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
completion ratio, Energy minimization, hardware/software co-design, multi-processor, multiple voltage |
20 | Radu Marculescu, Ümit Y. Ogras, Nicholas H. Zamora |
Computation and communication refinement for multiprocessor SoC design: A system-level perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 11(3), pp. 564-592, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
communication, Embedded systems, performance analysis, prototype, Markov chains, systems-on-chip, networks-on-chip, traffic, energy optimization |
20 | Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo |
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006, pp. 107-114, 2006, IEEE, 1-4244-0155-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Sanjoy K. Baruah, Nathan Fisher |
The Feasibility Analysis of Multiprocessor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECRTS ![In: 18th Euromicro Conference on Real-Time Systems, ECRTS'06, 5-7 July 2006, Dresden, Germany, Proceedings, pp. 85-96, 2006, IEEE Computer Society, 0-7695-2619-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Wayne H. Wolf |
Multiprocessor Systems-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany, pp. 4, 2006, IEEE Computer Society, 0-7695-2533-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Frédéric Pétrot, Alain Greiner, Pascal Gomez |
On Cache Coherency and Memory Consistency Issues in NoC Based Shared Memory Multiprocessor SoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 53-60, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Jörg-Christian Niemann, Christoph Puttmann, Mario Porrmann, Ulrich Rückert 0001 |
GigaNetIC - A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2006, 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings, pp. 268-282, 2006, Springer, 3-540-32765-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczok |
A multiprocessor architecture for the massively parallel model GCA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Riad Ben Mouhoub, Omar Hammami |
Multiprocessor on chip: beating the simulation wall through multiobjective design space exploration with direct execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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20 | Faezeh Montazeri, Mehdi Salmani Jelodar, S. Najmeh Fakhraie, Seid Mehdi Fakhraie |
Evolutionary Multiprocessor Task Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 68-76, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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20 | Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau 0001, Frédéric Pétrot, Ahmed Amine Jerraya |
Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 14-16 June 2006, Chania, Crete, Greece, pp. 69-75, 2006, IEEE Computer Society, 0-7695-2580-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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20 | Milan Pastrnak, Peter H. N. de With, Jef L. van Meerbergen |
Realization of QoS management using negotiation algorithms for multiprocessor NoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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20 | Wayne H. Wolf |
Design Challenges in Multiprocessor Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DIPES ![In: From Model-Driven Design to Resource Management for Distributed Embedded Systems, IFIP TC 10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2006), October 11-13, 2006, Braga, Portugal, pp. 1-8, 2006, Springer, 978-0-387-39361-2. The full citation details ...](Pics/full.jpeg) |
2006 |
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