Search results for "DRAM"

Hits ?▲	Authors	Title	Venue	Year	Link
13	Shivendra Singh, Ekta Tiwari, Abhinav Gupta, Sneh Saurabh	Improving Retention Time of 1T DRAM using Electrostatic Barrier: Proposal and Analysis.	VLSID	2024	DBLP DOI BibTeX RDF
13	Nikolaos Athanasios Anagnostopoulos, Nico Mexis, Yufan Fan, Stephanie Senjuty Bartsch, Tanja Schaier, Stefan Katzenbeisser 0001, Tolga Arul	Studying the Effects of Prolonged Thermal Stress Aiming to Induce Artificial Aging on DRAM Retention-Based Physical Unclonable Functions.	ICCE	2024	DBLP DOI BibTeX RDF
13	Cong Li, Zhe Zhou, Yang Wang, Fan Yang, Ting Cao, Mao Yang, Yun Liang 0001, Guangyu Sun 0003	PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization.	ASPLOS (2)	2024	DBLP DOI BibTeX RDF
13	Daewoong Lee, Jaehyeok Baek, Hye-Jung Kwon, Daehyun Kwon, Chulhee Cho, Sang-Hoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, Hyoung-Joo Kim, Ho-Seok Seol, Juhwan Kim, Jung-Bum Shin, Gil-Young Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, ChanYong Lee, Seungseob Lee, TaeHoon Park, Chi-Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, Jung-Hwan Choi, Jooyoung Lee	A 16-Gb T-Coil-Based GDDR6 DRAM With Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus Achieving 27-Gb/s/Pin in NRZ.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
13	Myeong-Jae Park, Jinhyung Lee, Kyungjun Cho, Ji Hwan Park, Junil Moon, Sung-Hak Lee, Tae-Kyun Kim, Sanghoon Oh, Seokwoo Choi, Yongsuk Choi, Ho Sung Cho, Tae-Sik Yun, Young Jun Koo, Jae-Seung Lee, Byung Kuk Yoon, Young Jun Park, Sangmuk Oh, Chang Kwon Lee, Seong-Hee Lee, Hyun-Woo Kim, Yucheon Ju, Seung-Kyun Lim, Kyo Yun Lee, Sang-Hoon Lee, Woo Sung We, Seungchan Kim, Seung Min Yang, Keonho Lee, In-Keun Kim, Younghyun Jeon, Jae-Hyung Park, Jong Chan Yun, Seonyeol Kim, Dong-Yeol Lee, Su-Hyun Oh, Junghyun Shin, Yeonho Lee 0002, Jieun Jang, Joohwan Cho	A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
13	Yeonwook Jung, Seongseop Lee, Hyojun Kim, SeongHwan Cho	A Supply-Noise-Induced Jitter Canceling Adaptive Filter for LPDDR5 Mobile DRAM.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
13	Yesin Ryu, Sung-Gi Ahn, Jae Hoon Lee, Jaewon Park, Yong-Ki Kim, Hyochang Kim, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Suk Han Lee, Kyounghwan Lim, Jungyu Lee 0002, Jeong Hoan Park, Jae-Seung Jeong, Sunghwan Jo, Dajung Cho, Sooyoung Kim, Minsu Lee, Hyunho Kim, Minhwan Kim, Jae San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young-Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee	A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
13	Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park 0006, Chihun Song, Nam Sung Kim, Jung Ho Ahn	X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands.	IEEE Comput. Archit. Lett.	2023	DBLP DOI BibTeX RDF
13	Chintam Shravan, Kaleem Fatima, P. Chandra Sekhar	Design and Development of Novel Refresh Technique for Gain Cell Embedded DRAM.	SN Comput. Sci.	2023	DBLP DOI BibTeX RDF
13	Tareq A. Alawneh, Mutsam M. Jarajreh, Jawdat S. Alkasassbeh, Ahmed A. M. Sharadqh	High-Performance and Power-Saving Mechanism for Page Activations Based on Full Independent DRAM Sub-Arrays in Multi-Core Systems.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Jin-Woo Han, Minki Suh, Gyeongyeop Lee, Jungsik Kim	Overhang Saddle Fin Sidewall Structure for Highly Reliable DRAM Operation.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Zhengtao Li, Jianxi Chen	Eukv: Enabling Efficient Updates for Hybrid PM-DRAM Key-Value Store.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Gyeongyeop Lee, Minki Suh, Minsang Ryu, Yunjong Lee, Jin-Woo Han, Jungsik Kim	Investigation Into the Degradation of DDR4 DRAM Owing to Total Ionizing Dose Effects.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Seyoung Kim, Seungho Yang, Hyein Lim, Hyein Lee 0008, Jongwook Jeon, Jung Yun Choi, Jaeha Kim	Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Chang Hyun Kim, Won Jun Lee, Yoonah Paik, Seok Young Kim, Seon Wook Kim	BL-PIM: Varying the Burst Length to Realize the All-Bank Performance and Minimize the Multi-Workload Interference for in-DRAM PIM.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Jianjun Luo 0003, Hailuan Liu, Ying He, César Vargas Rosales, Lingyan Fan	High-Density NVMe SSD With DRAM-Less eRAID Architecture.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
13	Fujun Bai, Song Wang, Xuerong Jia, Yixin Guo, Bing Yu, Hang Wang, Cong Lai, Qiwei Ren, Hongbin Sun 0001	A Low-Cost Reduced-Latency DRAM Architecture With Dynamic Reconfiguration of Row Decoder.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
13	Joo-Hyung Chae	Design of Clocked Comparator Preventing Bit Errors to Improve Reliability of Low-Speed DRAM Measurement.	IEEE Trans. Instrum. Meas.	2023	DBLP DOI BibTeX RDF
13	Binyamin Frankel, Eyal Sarfati, Davide Rossi, Shmuel Wimer	Energy Efficiency of Opportunistic Refreshing for Gain-Cell Embedded DRAM.	IEEE Trans. Circuits Syst. I Regul. Pap.	2023	DBLP DOI BibTeX RDF
13	Tae-Bin Kim, Hyun-Jin Kim, Kee-Won Kwon	Fast and Efficient Offset Compensation by Noise-Aware Pre-Charge and Operation of DRAM Bit Line Sense Amplifier.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
13	Jiho Kim, Soonhee Kwon, Jaesang Noh, Dong-Joon Shin	Construction of Cyclic Redundancy Check Codes for SDDC Decoding in DRAM Systems.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
13	Seongcheol Kim, Jincheol Sim, Hyunsu Park, Yoonjae Choi, Jonghyuck Choi, Chulwoo Kim	A 15-Gb/s Single-Ended NRZ Receiver Using Self-Referenced Technique With 1-Tap Latched DFE for DRAM Interfaces.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
13	Tongyu Song, Xuebin Tan, Jing Ren 0002, Wenyu Hu, Sheng Wang 0006, Shizhong Xu, Xiong Wang 0001, Gang Sun 0001, Hongfang Yu	DRAM: A DRL-based resource allocation scheme for MAR in MEC.	Digit. Commun. Networks	2023	DBLP DOI BibTeX RDF
13	Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge	Rethinking DRAM's Page Mode With STT-MRAM.	IEEE Trans. Computers	2023	DBLP DOI BibTeX RDF
13	Haodong Lin, Jun Li 0062, Zhibing Sha, Zhigang Cai, Yuanquan Shi, Balazs Gerofi, Jianwei Liao 0001	Adaptive Management With Request Granularity for DRAM Cache Inside nand-Based SSDs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
13	Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie 0008	MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing.	ACM Trans. Archit. Code Optim.	2023	DBLP DOI BibTeX RDF
13	Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami 0001, Hasan Hassan, Oguz Ergin, Onur Mutlu	PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM.	ACM Trans. Archit. Code Optim.	2023	DBLP DOI BibTeX RDF
13	Shengzhe Yan, Zhaori Cong, Nianduan Lu, Jinshan Yue, Qing Luo	Recent progress in InGaZnO FETs for high-density 2T0C DRAM applications.	Sci. China Inf. Sci.	2023	DBLP DOI BibTeX RDF
13	Michael Shaffer, Mikayla A. Borton, Ben Bolduc, José P. Faria, Rory M. Flynn, Parsa Ghadermazi, Janaka N. Edirisinghe, Elisha M. Wood-Charlson, Christopher S. Miller, Siu Hung Joshua Chan, Matthew B. Sullivan, Christopher S. Henry, Kelly C. Wrighton	kb_DRAM: annotation and metabolic profiling of genomes with DRAM in KBase.	Bioinform.	2023	DBLP DOI BibTeX RDF
13	Po-Chen Yeh, Chin-Hsien Wu, Yung-Hsiang Lin, Ming-Yan Wu	A Write-Related and Read-Related DRAM Allocation Strategy Inside Solid-State Drives (SSDs).	ACM Trans. Embed. Comput. Syst.	2023	DBLP DOI BibTeX RDF
13	Durgesh Addala, Sanjeet Kumar Sinha, Mohan Chandu Gadiparthi, Sweta Chander	1T-DRAM Cell with Different FET Technologies for Low Power Application.	Wirel. Pers. Commun.	2023	DBLP DOI BibTeX RDF
13	Ranyang Zhou, Sabbir Ahmed, Adnan Siraj Rakin, Shaahin Angizi	DNN-Defender: An in-DRAM Deep Neural Network Defense Mechanism for Adversarial Weight Attack.	CoRR	2023	DBLP DOI BibTeX RDF
13	Yuhao Shu, Hongtu Zhang, Hao Sun, Mengru Zhang, Wenfeng Zhao, Qi Deng, Zhidong Tang, Yumeng Yuan, Yongqi Hu, Yu Gu, Xufeng Kou, Yajun Ha	Cryogenic quasi-static embedded DRAM for energy-efficient compute-in-memory applications.	CoRR	2023	DBLP DOI BibTeX RDF
13	Maryam Babaie, Ayaz Akram, Jason Lowe-Power	A Cycle-level Unified DRAM Cache Controller Model for 3DXPoint Memory Systems in gem5.	CoRR	2023	DBLP DOI BibTeX RDF
13	Haocong Luo, Yahya Can Tugrul, F. Nisa Bostanci, Ataberk Olgun, Abdullah Giray Yaglikçi, Onur Mutlu	Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator.	CoRR	2023	DBLP DOI BibTeX RDF
13	Maryam Babaie, Ayaz Akram, Jason Lowe-Power	Enabling Design Space Exploration of DRAM Caches in Emerging Memory Systems.	CoRR	2023	DBLP DOI BibTeX RDF
13	Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Ataberk Olgun, Geraldo F. Oliveira, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu	PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips.	CoRR	2023	DBLP DOI BibTeX RDF
13	Donghyuk Kim, Jae-Young Kim, Wontak Han, Jongsoon Won, Haerang Choi, Yongkee Kwon, Joo-Young Kim 0001	Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics.	CoRR	2023	DBLP DOI BibTeX RDF
13	Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami 0001, Juan Gómez-Luna, Onur Mutlu	Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips.	CoRR	2023	DBLP DOI BibTeX RDF
13	Ranyang Zhou, Jacqueline Liu, Sabbir Ahmed, Nakul Kochar, Adnan Siraj Rakin, Shaahin Angizi	Threshold Breaker: Can Counter-Based RowHammer Prevention Mechanisms Truly Safeguard DRAM?	CoRR	2023	DBLP DOI BibTeX RDF
13	Leonid Yavits	DRAMA: Commodity DRAM based Content Addressable Memory.	CoRR	2023	DBLP DOI BibTeX RDF
13	Onur Mutlu	Retrospective: An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms.	CoRR	2023	DBLP DOI BibTeX RDF
13	Haocong Luo, Ataberk Olgun, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu	RowPress: Amplifying Read Disturbance in Modern DRAM Chips.	CoRR	2023	DBLP DOI BibTeX RDF
13	Onur Mutlu	Retrospective: Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors.	CoRR	2023	DBLP DOI BibTeX RDF
13	Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park 0006, Chihun Song, Nam Sung Kim, Jung Ho Ahn	X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands.	CoRR	2023	DBLP DOI BibTeX RDF
13	Supreeth Mysore Shivanandamurthy, Sairam Sri Vatsavai, Ishan G. Thakkar, Sayed Ahmad Salehi	AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning.	CoRR	2023	DBLP DOI BibTeX RDF
13	Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami 0001, Juan Gómez-Luna, Onur Mutlu	An Experimental Analysis of RowHammer in HBM2 DRAM Chips.	CoRR	2023	DBLP DOI BibTeX RDF
13	Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen 0001, Yi Kang	NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM.	CoRR	2023	DBLP DOI BibTeX RDF
13	Onur Mutlu	Retrospective: RAIDR: Retention-Aware Intelligent DRAM Refresh.	CoRR	2023	DBLP DOI BibTeX RDF
13	Seungki Hong, Dongha Kim, Jaehyung Lee, Reum Oh, Changsik Yoo, Sang Joon Hwang, Jooyoung Lee	DSAC: Low-Cost Rowhammer Mitigation Using In-DRAM Stochastic and Approximate Counting Algorithm.	CoRR	2023	DBLP DOI BibTeX RDF
13	Lukas Steiner, Timo Lehnigk-Emden, Markus Fehrenz, Norbert Wehn	A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication.	CoRR	2023	DBLP DOI BibTeX RDF
13	Fatemeh Najafi, Masoud Kaveh, Mohammad Reza Mosavi, Alessandro Brighente, Mauro Conti	EPUF: A Novel Scheme Based on Entropy Features of Latency-based DRAM PUFs Providing Lightweight Authentication in IoT Networks.	CoRR	2023	DBLP DOI BibTeX RDF
13	Zhibing Sha, Jun Li 0062, Fengxiang Zhang, Min Huang, Zhigang Cai, François Trahay, Jianwei Liao 0001	Visibility Graph-based Cache Management for DRAM Buffer Inside Solid-state Drives.	ACM Trans. Storage	2023	DBLP DOI BibTeX RDF
13	Owen Millwood, Jack Miskelly, Bohao Yang, Prosanta Gope, Elif Bilge Kavun, Chenghua Lin	PUF-Phenotype: A Robust and Noise-Resilient Approach to Aid Group-Based Authentication With DRAM-PUFs Using Machine Learning.	IEEE Trans. Inf. Forensics Secur.	2023	DBLP DOI BibTeX RDF
13	Fan Zhang 0069, Shaahin Angizi, Jiao Sun, Wei Zhang 0076, Deliang Fan	Aligner-D: Leveraging In-DRAM Computing to Accelerate DNA Short Read Alignment.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
13	Mingkai Liu, Haohua Que, Xinghua Yang, Kaitong Zhang, Qingyang Yu, Lingxiao Yan, Tong Wang, Yu Jin, Ni Zhou	A Selective Bit Dropping and Encoding Co-Strategy in Image Processing for Low-Power Design in DRAM and SRAM.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
13	Julien Maillard, Thomas Hiscock, Maxime Lecomte, Christophe Clavier	Cache Side-Channel Attacks Through Electromagnetic Emanations of DRAM Accesses.	IACR Cryptol. ePrint Arch.	2023	DBLP BibTeX RDF
13	Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu	Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators.	IEEE Des. Test	2023	DBLP DOI BibTeX RDF
13	Jingyu Wang, Rulin Huang, Kaixin Huang, Yuting Chen	A server bypass architecture for hopscotch hashing key-value store on DRAM-NVM memories.	J. Syst. Archit.	2023	DBLP DOI BibTeX RDF
13	Xiangjun Peng, Zheng Huang, Alex Cantrell, Bihua Shu, Ke Ke Xie, Yi Li, Yu Li, Li Jiang 0009, Qiang Xu, Ming-Chang Yang	EXPERT: EXPloiting DRAM ERror Types to Improve the Effective Forecasting Coverage in the Field.	DSN-S	2023	DBLP DOI BibTeX RDF
13	Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami 0001, Juan Gómez-Luna, Onur Mutlu	An Experimental Analysis of RowHammer in HBM2 DRAM Chips.	DSN-S	2023	DBLP DOI BibTeX RDF
13	Qi Chen, Hao Hu, Cai Deng, Dingbang Liu, Shiyi Li, Bo Tang 0016, Ting Yao, Wen Xia	EEPH: An Efficient Extendible Perfect Hashing for Hybrid PMem-DRAM.	ICDE	2023	DBLP DOI BibTeX RDF
13	Enas E. Abulibdeh, Leen Younes, Baker Mohammad, Hani H. Saleh, Mahmoud Al-Qutayri, Khaled Humood	DRAM Bitline as A Delay Path for Potential PUF.	ICM	2023	DBLP DOI BibTeX RDF
13	Preeti Ranjan Panda, Shailja Pandey	Education Abstract: Thermal Challenges and Mitigation in 3D DRAM.	CODES+ISSS	2023	DBLP BibTeX RDF
13	Hyeongseok Oh, Myungsun Chun, Jiwon Lee, Shi-Jie Wen, Nick Yu, Byung-Gun Park, Sanghyeon Baeg	Write Recovery Time Degradation by Thermal Neutrons in DDR4 DRAM Components.	IRPS	2023	DBLP DOI BibTeX RDF
13	Hyewon Seo, Taiuk Rim, Eunsun Lee, Sekyoung Jang, Kyosuk Chae, Jeonghoon Oh, Hyodong Ban, Jooyoung Lee	Analysis of Intermittent Single-bit Failure on 10-nm node generation DRAM Devices.	IRPS	2023	DBLP DOI BibTeX RDF
13	Longda Zhou, Jie Li, Zheng Qiao, Pengpeng Ren, Zixuan Sun, Jianping Wang, Blacksmith Wu, Zhigang Ji, Runsheng Wang, Kanyu Cao, Ru Huang	Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and Mitigation.	IRPS	2023	DBLP DOI BibTeX RDF
13	Taiuk Rim, Kyosuk Che, Sehyun Kwon, Jin-Seong Lee, Jeonghoon Oh, Hyodong Ban, Jooyoung Lee	Enhanced DRAM Single Bit Characteristics from Process Control of Chlorine.	IRPS	2023	DBLP DOI BibTeX RDF
13	J. H. Lee, B. W. Woo, Y. M. Lee, N. H. Lee, S. H. Lee, Y. S. Lee, H. S. Kim, S. Pae	Reliability Improvement with Optimized BEOL Process in Advanced DRAM.	IRPS	2023	DBLP DOI BibTeX RDF
13	S. Lee, N.-H. Lee, K. W. Lee, J. H. Kim, J. H. Jin, Y. S. Lee, Y. C. Hwang, H. S. Kim, S. Pae	Development and Product Reliability Characterization of Advanced High Speed 14nm DDR5 DRAM with On-die ECC.	IRPS	2023	DBLP DOI BibTeX RDF
13	Wonju Sung, Hyun Seung Kim, Jung Hoon Han, Seguen Park, Jeonghoon Oh, Hyodong Ban, Jooyoung Lee	Investigation on NBTI Control Techniques of HKMG Transistors for Low-power DRAM applications.	IRPS	2023	DBLP DOI BibTeX RDF
13	Shinwoo Jeong, Jin-Seong Lee, Jiuk Jang, Jooncheol Kim, Hyunsu Shin, Jihun Kim, Jeongwoo Song, Dongsoo Woo, Jeonghoon Oh, Jooyoung Lee	Investigation of Sub-20nm 4th generation DRAM cell transistor's parasitic resistance and scalable methodology for Sub-20nm era.	IRPS	2023	DBLP DOI BibTeX RDF
13	Qiang Liu 0011, Longtao Guo, Honghui Tang	Fault Model Analysis of DRAM under Electromagnetic Fault Injection Attack.	DATE	2023	DBLP DOI BibTeX RDF
13	Ranyang Zhou, Sepehr Tabrizchi, Mehrdad Morsali, Arman Roohi, Shaahin Angizi	P-PIM: A Parallel Processing-in-DRAM Framework Enabling Row Hammer Protection.	DATE	2023	DBLP DOI BibTeX RDF
13	Hyeong Kon Bae, Myung Jae Chung, Young-Ho Gong, Sung Woo Chung	Twin ECC: A Data Duplication Based ECC for Strong DRAM Error Resilience.	DATE	2023	DBLP DOI BibTeX RDF
13	Michael Jaemin Kim, Minbok Wi, Jaehyun Park 0006, Seoyoung Ko, Jaeyoung Choi, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn, Eojin Lee	How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM.	MICRO	2023	DBLP DOI BibTeX RDF
13	Jeageun Jung, Mattan Erez	Predicting Future-System Reliability with a Component-Level DRAM Fault Model.	MICRO	2023	DBLP DOI BibTeX RDF
13	Yongwon Shin, Juseong Park, Sungjun Cho, Hyojin Sung	PIMFlow: Compiler and Runtime Support for CNN Models on Processing-in-Memory DRAM.	CGO	2023	DBLP DOI BibTeX RDF
13	Youngin Kim 0003, Hyeonjin Kim, William J. Song	NOMAD: Enabling Non-blocking OS-managed DRAM Cache via Tag-Data Decoupling.	HPCA	2023	DBLP DOI BibTeX RDF
13	Minbok Wi, Jaehyun Park 0006, Seoyoung Ko, Michael Jaemin Kim, Nam Sung Kim, Eojin Lee, Jung Ho Ahn	SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling.	HPCA	2023	DBLP DOI BibTeX RDF
13	Majed Valad Beigi, Yi Cao, Sudhanva Gurumurthi, Charles Recchia, Andrew C. Walton, Vilas Sridharan	A Systematic Study of DDR4 DRAM Faults in the Field.	HPCA	2023	DBLP DOI BibTeX RDF
13	Xiangjun Peng, Yaohua Wang, Ming-Chang Yang	CHOPPER: A Compiler Infrastructure for Programmable Bit-serial SIMD Processing Using Memory in DRAM.	HPCA	2023	DBLP DOI BibTeX RDF
13	Ming-Yan Wu, Chin-Hsien Wu	A Multi-Stream-aware DRAM Allocation Strategy inside Solid-State Drives (SSDs).	RACS	2023	DBLP DOI BibTeX RDF
13	Maryam Babaie, Ayaz Akram, Jason Lowe-Power	Enabling Design Space Exploration of DRAM Caches for Emerging Memory Systems.	ISPASS	2023	DBLP DOI BibTeX RDF
13	Tao Huang, Run Run, Yi Hu, Li Yin, Liyang Pan, Guolin Li, Xiang Xie	An Energy-Efficient Gain-Cell Embedded DRAM Design with Weight Encoding for CNN Applications.	ICTA	2023	DBLP DOI BibTeX RDF
13	Frank Schirrmeister, Rocco Jonack, Michael Frank 0008	Addressing DRAM Performance Analysis Challenges for Network-on-Chip (NoC) Design.	MEMSYS	2023	DBLP DOI BibTeX RDF
13	Steffen Buch	Error Detecting and Correcting Codes for DRAM Functional Safety.	MEMSYS	2023	DBLP DOI BibTeX RDF
13	Ayaz Akram	The Feasibility of Utilizing Low-Power DRAM in Disaggregated Systems.	MEMSYS	2023	DBLP DOI BibTeX RDF
13	Yuansheng Zhao, Zixuan Shen, Jiarui Xu, Kevin C. T. Chai, Yanqing Wu, Chao Wang 0096	A Novel Transpose 2T-DRAM based Computing-in-Memory Architecture for On-chip DNN Training and Inference.	AICAS	2023	DBLP DOI BibTeX RDF
13	Owen Millwood, Meltem Kurt Pehlivanoglu, Aryan Mohammadi Pasikhani, Jack Miskelly, Prosanta Gope, Elif Bilge Kavun	A Generic Obfuscation Framework for Preventing ML-Attacks on Strong-PUFs through Exploitation of DRAM-PUFs.	EuroS&P	2023	DBLP DOI BibTeX RDF
13	Kevin Loughlin, Jonah Rosenblum, Stefan Saroiu, Alec Wolman, Dimitrios Skarlatos 0002, Baris Kasikci	Siloz: Leveraging DRAM Isolation Domains to Prevent Inter-VM Rowhammer.	SOSP	2023	DBLP DOI BibTeX RDF
13	Song Wang, Bing Yu, Wenwu Xiao, Fujun Bai, Xiaodong Long, Liang Bai, Xuerong Jia, Fengguo Zuo, Jie Tan, Yixin Guo, Peng Sun, Jun Zhou, Qiong Zhan, Sheng Hu, Yu Zhou, Yi Kang, Qiwei Ren, Xiping Jiang	A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSV.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
13	Yuki Okamoto, Yusuke Komura, T. Mizuguchi, Toshihiko Saito, M. Ito, K. Kimura, Tatsuya Onuki, Yoshinori Ando, H. Sawai, T. Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, H. Kimura, M. Fujita, Makoto Ikeda, Shunpei Yamazaki	1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
13	Seongho Kim, Young-Keun Park, Gyu Soup Lee, Eui Joong Shin, Woon-San Ko, Hi Deok Lee, Ga-Won Lee 0001, Byung Jin Cho	Epitaxial Strain Control of HfxZr1-xO2 with Sub-nm IGZO Seed Layer Achieving EOT=0.44 nm for DRAM Cell Capacitor.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
13	Attilio Belmonte, S. Kundu, S. Subhechha, Adrian Vaisman Chasin, Nouredine Rassoul, Harold Dekkers, H. Puliyalil, F. Seidel, P. Carolan, Romain Delhougne, Gouri Sankar Kar	Lowest IOFF < 3×10-21 A/μm in capacitorless DRAM achieved by Reactive Ion Etch of IGZO-TFT.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
13	Kanguk Kim, Youngwoo Son, Hoin Ryu, Byunghyun Lee, Jooncheol Kim, Hyunsu Shin, Joonyoung Kang, Jihun Kim, Shinwoo Jeong, Kyosuk Chae, Dongkak Lee, Ilwoo Jung, Yongkwan Kim, Boyoung Song, Jeonghoon Oh, Jungwoo Song, Seguen Park, Keumjoo Lee, Hyodong Ban, Jiyoung Kim, Jooyoung Lee	14nm DRAM Development and Manufacturing.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
13	Jaehoon Heo, Yongwon Shin, Sangjin Choi, Sungwoong Yune, Jung-Hoon Kim, Hyojin Sung, Youngjin Kwon, Joo-Young Kim 0001	PRIMO: A Full-Stack Processing-in-DRAM Emulation Framework for Machine Learning Workloads.	ICCAD	2023	DBLP DOI BibTeX RDF
13	Daohuan Feng, Yi Jiang, Yunsong Qiu, Yuhong Zheng, Harry Kim, Jaewoo Kim, Jian Chu, Guangsu Shao, Yucheng Liao, Chen Yang, Minrui Hu, Wenli Zhao, Linjiang Xia, Jianfeng Xiao, Di Ma, Yuan Cheng, Xiangbo Kong, Chao Lin, Tianming Li, Yongjie Li 0002, Jingheng Meng, Kai Shao, Yan Wang, Xiaoan Yang, Xiang Liu, Qinghua Han, Huiming Li, Yanzhe Tang, Mingde Liu, Eric Wu, Xiaoping Li, Renrui Huang, Mingtang Zhang, Long Hou, Xuan Pan, Xinwen Jin, Shuiping Zhao, Dh Han, Ted Park, Deyuan Xiao, Chao Zhao, Abraham Yoo	Vertical Channel Transistor (VCT) as Access Transistor for Future 4F2 DRAM Architecture.	IMW	2023	DBLP DOI BibTeX RDF
13	Z. Asher Bai, Yixian Wang, Lixue Liu, Xi Zhang, Feng Yuan, Junsheng Meng, Zhongming Liu, Js Jeon, James Cho, Blacksmith Wu, Huihui Li, Guilei Wang, Chao Zhao, Kanyu Cao	Dielectric Relaxation Performance of DRAM Storage Capacitors and Ways of Improvement.	IMW	2023	DBLP DOI BibTeX RDF
13	Wei-Chen Chen, Hang-Ting Lue, Tzu-Hsuan Hsu, Keh-Chung Wang, Chih-Yuan Lu	A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable Gate-Controlled Thyristor (GCT) DRAM Device.	IMW	2023	DBLP DOI BibTeX RDF