Search results for "PI-Bus"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
29	Bjorn De Sutter, Hans Vandierendonck, Bruno De Bus, Koenraad De Bosschere	On the side-effects of code abstraction.	LCTES	2003	DBLP DOI BibTeX RDF	code abstraction, performance, code compaction
29	Bjorn De Sutter, Bruno De Bus, Koenraad De Bosschere	Sifting out the mud: low level C++ code reuse.	OOPSLA	2002	DBLP DOI BibTeX RDF	code size reduction, code compaction
29	Libor Bus, Pavel Tvrdík	Distributed Memory Auction Algorithms for the Linear Assignment Problem.	IASTED PDCS	2002	DBLP BibTeX RDF
29	Hinderk M. Buß	Finite element methods for variational problems based on nonconforming dual mixed discretisations.	J. Num. Math.	2001	DBLP DOI BibTeX RDF
29	Bjorn De Sutter, Bruno De Bus, Koenraad De Bosschere, Saumya K. Debray	Combining Global Code and Data Compaction.	LCTES/OM	2001	DBLP DOI BibTeX RDF
29	Libor Bus, Pavel Tvrdík	A Parallel Algorithm for Connected Components on Distributed Memory Machines.	PVM/MPI	2001	DBLP DOI BibTeX RDF
29	Bjorn De Sutter, Bruno De Bus, Koen De Bosschere, Saumya Debray	Combining Global Code and Data Compaction.	OM@PLDI	2001	DBLP DOI BibTeX RDF
29	Bjorn De Sutter, Bruno De Bus, Koenraad De Bosschere, P. Keyngnaert, Bart Demoen	On the Static Analysis of Indirect Control Transfers in Binaries.	PDPTA	2000	DBLP BibTeX RDF
29	Roland Buß, Lothar Mühlbach, Detlef Runde	Advantages and disadvantages of a 3D virtual environment for supporting informal communication in distributed workgroups compared with a text-chat and a chat/cam system.	HCI (2)	1999	DBLP BibTeX RDF
29	J. C. P. Bus, T. J. Dekker	Two Efficient Algorithms with Guaranteed Convergence for Finding a Zero of a Function.	ACM Trans. Math. Softw.	1975	DBLP DOI BibTeX RDF
27	Madhu Mutyam	Selective shielding technique to eliminate crosstalk transitions.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	power consumption, Crosstalk, switching activity, bus encoding
27	Taufik, Makbul Anwari	Modeling and Simulation of Current Ripple in DC Link Connecting Two PWM Inverters Using Matlab/Simulink.	Asia International Conference on Modelling and Simulation	2008	DBLP DOI BibTeX RDF	DC bus Current Ripple, PWM Inverter
27	Márcio Oyamada, Flávio Rech Wagner, Marius Bonaciu, Wander O. Cesário, Ahmed Amine Jerraya	Software Performance Estimation in MPSoC Design.	ASP-DAC	2007	DBLP DOI BibTeX RDF	cycle-accurate simulation model, software performance estimation, MPSoC design, software-dominated embedded systems, integrated methodology, bus-functional model, multiprocessor platform, MPEG4 encoder, neural networks, performance analysis, design space exploration, design validation
27	Wenqian Huang, Liping Chen, Zhijun Meng, Chunjiang Zhao 0001	Design of Can-based Variable Rate Fertilizer Control System.	CCTA	2007	DBLP DOI BibTeX RDF	variable rate fertilizer, DSP, PID control, Precision Agriculture, CAN bus
27	Brett H. Meyer, Donald E. Thomas	Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	bus architecture synthesis, embedded multiprocessor systems-on-chip, partitioning, sharing, memory allocation, data mapping
27	Zili Shao, Bin Xiao 0001, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha	Loop scheduling with timing and switching-activity minimization for VLIW DSP.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	instruction bus optimization, low-power optimization, compilers, software pipelining, VLIW, retiming, instruction scheduling, loops
27	Ming Zhang 0026, Qing Yang 0001	BUCS - A Bottom-Up Cache Structure for Networked Storage Servers.	ICPP	2004	DBLP DOI BibTeX RDF	cache structure, intelligent controller, networked storage, bus contention
27	Luca Benini, Angelo Galati, Alberto Macii, Enrico Macii, Massimo Poncino	Energy-efficient data scrambling on memory-processor interfaces.	ISLPED	2003	DBLP DOI BibTeX RDF	data scrambling, bus encoding, power attacks
27	Jörg Kaiser, Michael Mock	Implementing the Real-Time Publisher/Subscriber Model on the Controller Area Network (CAN).	ISORC	1999	DBLP DOI BibTeX RDF	Real-Time Communication Systems, Publisher/Subsrciber Model, Tag-based addressing, CAN-Bus
27	Jin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu	Hierarchical Testing Using the IEEE Std 1149.5 Module Test and Maintenance Slave Interface Module.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	MTM Bus, Boundary Scan, Hierarchical Testing
27	Duc J. Vianney, James H. Thomas, Vicki Rabaza	The Gould NP1 system interconnecting.	ICS	1988	DBLP DOI BibTeX RDF	Gould NP1, dual-cpu, processor farm, inter-system bus link, multiprocessor
27	Jean-Philippe Lombardi, Jürgen Vogel 0001	Wizard-based process modeling for business users.	AVI	2010	DBLP DOI BibTeX RDF
27	Qin Li 0002, Huibiao Zhu, Jifeng He 0001	Towards the Service Composition Through Buses.	HASE	2008	DBLP DOI BibTeX RDF
27	Po-Tsang Huang, Wei-Li Fang, Yin-Ling Wang, Wei Hwang	Low Power and Reliable Interconnection with Self-Corrected Green Coding Scheme for Network-on-Chip.	NOCS	2008	DBLP DOI BibTeX RDF	interconnnection, reliability, low power, network-on-chip
27	Mehdi Dehbashi, Vahid Lari, Seyed Ghassem Miremadi, Mohammad Shokrollah-Shirazi	Fault Effects in FlexRay-Based Networks with Hybrid Topology.	ARES	2008	DBLP DOI BibTeX RDF	FlexRay Protocol, Fault Injection, Error Propagation, Distributed Embedded Systems, Dependability Evaluation
27	Michel Sede, Xu Li 0009, Da Li, Min-You Wu, Minglu Li 0001, Wei Shu	Routing in Large-Scale Buses Ad Hoc Networks.	WCNC	2008	DBLP DOI BibTeX RDF
27	Krishnan Sundaresan, Nihar R. Mahapatra	An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires.	DAC	2007	DBLP DOI BibTeX RDF
27	Brock J. LaMeres, Kanupriya Gulati, Sunil P. Khatri	Controlling inductive cross-talk and power in off-chip buses using CODECs.	ASP-DAC	2006	DBLP DOI BibTeX RDF
27	Vasily V. Balashov, Valery A. Kostenko, Ruslan L. Smeliansky, S. V. Vavinov	A tool system for automatic scheduling of data exchange in real-time distributed embedded systems.	ISCN	2006	DBLP DOI BibTeX RDF
27	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De	Reducing the data switching activity of serialized datastreams.	ISCAS	2006	DBLP DOI BibTeX RDF
27	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De	Reducing the Data Switching Activity on Serial Link Buses.	ISQED	2006	DBLP DOI BibTeX RDF
27	Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie 0001, Chita R. Das, Vijay Degalahal	A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks.	VLSI Design	2006	DBLP DOI BibTeX RDF
27	Youtao Zhang, Lan Gao, Jun Yang 0002, Xiangyu Zhang 0001, Rajiv Gupta 0001	SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors.	HPCA	2005	DBLP DOI BibTeX RDF
27	Tung-Chieh Chen, Yao-Wen Chang	Modern floorplanning based on fast simulated annealing.	ISPD	2005	DBLP DOI BibTeX RDF	simulated annealing, floorplanning
27	Eun-Gu Jung, Eonpyo Hong, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har	Self-timed Interconnect with Layered Interface Based on Distributed and Modularized Control for Multimedia SoCs.	PCM (1)	2005	DBLP DOI BibTeX RDF
27	Maged Ghoneima, Yehea I. Ismail	Utilizing the effect of relative delay on energy dissipation in low-power on-chip buses.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
27	Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram	Transition reduction in memory buses using sector-based encoding techniques.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
27	Jayapreetha Natesan, Damu Radhakrishnan	Shift Invert Coding (SINV) for Low Power VLSI.	DSD	2004	DBLP DOI BibTeX RDF
27	Byung-Soo Choi, Jeong-A Lee, Dong-Soo Har	High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
27	Maged Ghoneima, Yehea I. Ismail	Formal derivation of optimal active shielding for low-power on-chip buses.	ICCAD	2004	DBLP DOI BibTeX RDF
27	Madhu Mutyam	Preventing Crosstalk Delay using Fibonacci Representation.	VLSI Design	2004	DBLP DOI BibTeX RDF
27	Sandeep Gupta, M. M. Gore	BUSTRAP - An Efficient Travel Planner for Metropolitans.	IWDC	2004	DBLP DOI BibTeX RDF
27	Yi Pan 0001	Computing on the Restricted LARPBS Model.	ISPA	2003	DBLP DOI BibTeX RDF
27	Tiehan Lv, Wayne H. Wolf, Jörg Henkel, Haris Lekatsas	An Adaptive Dictionary Encoding Scheme for SOC Data Buses.	DATE	2002	DBLP DOI BibTeX RDF
27	Junji Ogawa, Mark Horowitz	A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro.	Intelligent Memory Systems	2000	DBLP DOI BibTeX RDF
27	Henrik Lönn, Jakob Axelsson	A comparison of fixed-priority and static cyclic scheduling for distributed automotive control applications.	ECRTS	1999	DBLP DOI BibTeX RDF
27	Julio Sahuquillo, Ana Pont	The Filter Cache: A Run-Time Cache Management Approach1.	EUROMICRO	1999	DBLP DOI BibTeX RDF	multi-lateral cache, data cache management, multiprocessor systems, memory architectures, data locality
27	Jong Hyuk Choi, Bong Wan Kim, Kyu Ho Park, Kwang-Il Park	A Bandwidth-Efficient Implementation of Mesh with Multiple Broadcasting.	ICPP	1999	DBLP DOI BibTeX RDF	Mesh with Buses, Parallel Computing, Multicast, Interconnection Network, Broadcast, Collective Communication
27	Ching-Chih Han, Kang G. Shin	Real-time communication in FieldBus multiaccess networks.	IEEE Real Time Technology and Applications Symposium	1995	DBLP DOI BibTeX RDF	field buses, FieldBus multiaccess networks, automated factories, absolute deadline guarantees, multiaccess local area networks, SP-50 FieldBus, industrial standard protocol, manufacturing applications, token-passing networks, centralized scheduling multiaccess network, centralized token scheduling, pinwheel, distance-constrained scheduling, centralized-scheduling multiaccess networks, message deadlines, scheduling, real-time systems, protocols, local area networks, timing constraints, real-time communication, random access, embedded real-time systems, computer integrated manufacturing, token networks, multi-access systems, CSMA/CD, industrial process controls, multiaccess networks
27	James A. Davis	A functional language architecture that supports fine-grain parallelism (extended abstract).	ACM Conference on Computer Science	1987	DBLP DOI BibTeX RDF
27	Mohamed G. Gouda, Umeshwar Dayal	Optimal Semijoin Schedules For Query Processing in Local Distributed Database Systems.	SIGMOD Conference	1981	DBLP DOI BibTeX RDF
27	Hoo-Min D. Toong, Svein O. Strommen, Earl R. Goodrich II	A Gemeral Multi-Microprocessor Interconnection Mechanism for Non-Numeric Processing.	Computer Architecture for Non-Numeric Processing	1980	DBLP DOI BibTeX RDF
26	Jin-Tai Yan, Zhi-Wei Chen	Two-sided single-detour untangling for bus routing.	DAC	2010	DBLP DOI BibTeX RDF	board-level routing, bus routing
26	Xueqiang Mi, Xinhuai Tang, Xiaozhou Yuan, Delai Chen, Xiangfeng Luo	Multifactor-Driven Hierarchical Routing on Enterprise Service Bus.	WISM	2009	DBLP DOI BibTeX RDF	Message Routing, Enterprise Integration, Enterprise Service Bus
26	Ray Bittner	Bus mastering PCI express in an FPGA.	FPGA	2009	DBLP DOI BibTeX RDF	bus mastering, pcie, performance, fpga, design, pci express
26	Janusz Sosnowski, Dawid Trawczynski, Janusz Zalewski	Safety Issues in Modern Bus Standards.	Computer	2008	DBLP DOI BibTeX RDF	bus standards, standards, safety-critical applications
26	Ricky E. Sward, Kelly J. Whitacre	A multi-language service-oriented architecture using an enterprise service bus.	SIGAda	2008	DBLP DOI BibTeX RDF	multi-language development, service-oriented architecture, soa, software architecture, enterprise service bus, esb
26	Michael N. Skoufis, Kedar Karmarkar, Themistoklis Haniotakis, Spyros Tragoudas	A High-Performance Bus Architecture for Strongly Coupled Interconnects.	ISQED	2008	DBLP DOI BibTeX RDF	high-speed bus, crosstalk
26	Sixto Ortiz Jr.	Getting on Board the Enterprise Service Bus.	Computer	2007	DBLP DOI BibTeX RDF	service-oriented architectures, Enterprise service bus
26	Kin Choong Yow 0001, Lin Chen, Xiaoyu Liu	BlueBus: a scalable solution for localized mobile service in a public bus.	Mobility Conference	2007	DBLP DOI BibTeX RDF	public bus, mobile device, Bluetooth, data service
26	Arvind Ashok, Christian M. Beck, Nick Quagliara	Ri-Ri: assisting bus conductors in madras (chennai).	CHI Extended Abstracts	2007	DBLP DOI BibTeX RDF	CHI 2007, Madras, transportation, bus, MTC
26	Dariusz Koscielnik	The Structure of a Control Network Integrated with the S-bus of an ISDN Network.	ICN	2007	DBLP DOI BibTeX RDF	field network, controll network, S-bus, system integration
26	Muhammet Mustafa Ozdal, Martin D. F. Wong	Two-layer bus routing for high-speed printed circuit boards.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	min-max length constraints, High-speed, bus routing, PCB
26	Jin Guo 0001, Antonis Papanikolaou, Pol Marchal, Francky Catthoor	Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture.	SLIP	2006	DBLP DOI BibTeX RDF	segmented bus, floorplanning, trade-offs
26	Yuh-Rau Wang, Shi-Jinn Horng, Chin-Hsiung Wu	Efficient Algorithms for the All Nearest Neighbor and Closest Pair Problems on the Linear Array with a Reconfigurable Pipelined Bus System.	IEEE Trans. Parallel Distributed Syst.	2005	DBLP DOI BibTeX RDF	LARPBS, reconfigurable bus model, Parallel algorithm, closest pair, all nearest neighbors
26	Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh	Structured interconnect architecture: a solution for the non-scalability of bus-based SoCs.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	BFT, scalability, pipelining, bus, MP-SoC
26	Alberto Bocca, Sabino Salerno, Enrico Macii, Massimo Poncino	Energy-efficient bus encoding for LCD displays.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	LCD displays, digital display interfaces, low-power bus encoding
26	Marc Bertola, Guy Bois	A methodology for the design of AHB bus master wrappers.	DSD	2003	DBLP DOI BibTeX RDF	AMBA AHB, slave, methodology, Wrapper, master, bus protocol
26	Amitava Datta	Efficient Graph-Theoretic Algorithms on a Linear Array with a Reconfigurable Pipelined Bus System.	J. Supercomput.	2002	DBLP DOI BibTeX RDF	reconfigurable pipelined bus, minimum spanning forest, parallel algorithm, graph algorithms, connected components, optical computing, biconnected components
26	Marcellin Buisson, Alexandre Bustico, Stéphane Chatty, François-Régis Colin, Yannick Jestin, Sébastien Maury, Christophe P. Mertz, Philippe Truillet	Ivy: un bus logiciel au service du développement de prototypes de systèmes interactifs.	IHM	2002	DBLP DOI BibTeX RDF	interactive systems engineering, prototyping tools, software bus
26	Amal de Silva	Combining Constraint Programming and Linear Programming on an Example of Bus Driver Scheduling.	Ann. Oper. Res.	2001	DBLP DOI BibTeX RDF	bus driver scheduling, constraint programming, column generation
26	Keqin Li, Victor Y. Pan	Parallel Matrix Multiplication on a Linear Array with a Reconfigurable Pipelined Bus System.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	Bilinear algorithm, optical pipelined bus, distributed memory system, matrix multiplication, speedup, PRAM, reconfigurable system, linear array, cost-optimality
26	Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou	Intrinsic response for analog module testing using an analog testability bus.	ACM Trans. Design Autom. Electr. Syst.	2001	DBLP DOI BibTeX RDF	analog testability bus, intrinsic response, design for testability, analog testing, boundary scan
26	Keqin Li 0001, Yi Pan 0001, Si-Qing Zheng	Efficient Deterministic and Probabilistic Simulations of PRAMs on Linear Arrays with Reconfigurable Pipelined Bus Systems.	J. Supercomput.	2000	DBLP DOI BibTeX RDF	Concurrent read, concurrent write, deterministic simulation, probabilistic simulation, sorting, shared memory, time complexity, parallel random access machine, linear array, optical bus
26	Bharadwaj Veeravalli, Xiaolin Li 0001, Chi Chung Ko	On the Influence of Start-Up Costs in Scheduling Divisible Loads on Bus Networks.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	optimal sequence, bus networks, communication delay, Divisible loads, processing time
26	Zhou Qiang, Luo Zhiqiang, Huagang Xiong, Li Qiao	Real-Time Performance Analysis for Linear Token Passing Bus Networks.	LCN	2000	DBLP DOI BibTeX RDF	real-time performance analysis, linear token passing bus networks, LTPB network, exact network timing property, optimal bandwidth allocation scheme, WCAU, worst available utilization, protocols, local area networks, bandwidth allocation, mission-critical systems
26	Keqin Li 0001, Yi Pan 0001, Si-Qing Zheng	Fast and Processor Efficient Parallel Matrix Multiplication Algorithms on a Linear Array With a Reconfigurable Pipelined Bus System.	IEEE Trans. Parallel Distributed Syst.	1998	DBLP DOI BibTeX RDF	Compound algorithm, optical pipelined bus, Strassen's algorithm, reconfigurability, matrix multiplication, linear array
26	Ahmed El-Amawy, Priyalal Kulasinghe	Algorithmic Mapping of Feedforward Neural Networks onto Multiple Bus Systems.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	back error propagation, computation graph, optimal mapping, Artificial neural networks, broadcasting, computation time, communication time, multiple bus system, feedforward network
26	Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour	A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer.	HPDC	1997	DBLP DOI BibTeX RDF	bus-efficient low-latency network interface, PDSS multicomputer, unprivileged code, cache-to-cache communications, distributed barrier-synchronization mechanism, single-chip implementation, commodity processor, routing, multiprocessor interconnection networks, interconnect, cache coherence protocols
26	Yi Pan 0001, Keqin Li 0001, Si-Qing Zheng	Fast nearest neighbor algorithms on a linear array with a reconfigurable pipelined bus system.	ISPAN	1997	DBLP DOI BibTeX RDF	reconfigurable pipelined bus, nearest neighbor problem, O(log log n)time, n/sup 3/ processors, O(1) time, image processing, binary image, linear array, nearest neighbor algorithms
26	Arshad Ali, Ramachandran Vaidyanathan	Exact Bounds on Running ASCEND/DESCEND and FAN-IN Algorithms on Synchronous Multiple Bus Networks.	IEEE Trans. Parallel Distributed Syst.	1996	DBLP DOI BibTeX RDF	ASCEND/DESCEND algorithms, FAN-IN algorithms, multiple bus networks, synchronous parallelism, scheduling, parallel algorithms
26	Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tzu Ting	Metrology for analog module testing using analog testability bus.	ICCAD	1996	DBLP DOI BibTeX RDF	analog module, analog module testing, multiple instantiation, test response analysis, test waveform, testability bus, design for testability
26	Shigeki Shibayama, Kazumasa Hamaguchi, Toshiyuki Fukui, Yoshiaki Sudo, Tomohiko Shimoyama, Shuichi Nakamura	An Optical Bus Computer Cluster with a deferred cache coherence protocol.	ICPADS	1996	DBLP DOI BibTeX RDF	Optical Bus Computer Cluster, deferred cache coherence protocol, optical star-coupler, one-hop simultaneous broadcasting, wavelength multiplexing, deferred cache coherence, coherence maintenance, protocols, wavelength-division multiplexing, optical interconnections, cache storage
26	Roberto Giorgi, Cosimo Antonio Prete, Luigi M. Ricciardi, Gianpaolo Prina	A Hybrid Approach to Trace Generation for Performance Evaluation of Shared-Bus Multiprocessors.	EUROMICRO	1996	DBLP DOI BibTeX RDF	software approach, user references, virtual-to-physical address translation, kernel reference stream, general-purpose machine, multitasking operating system, performance evaluation, performance evaluation, shared-memory multiprocessor, process scheduling, hybrid approach, trace generation, shared-bus multiprocessors
26	Tzong-Wann Kao, Shi-Jinn Horng	Computing Dominators and Its Applications on Processor Arrays with Reconfigurable Bus Systems.	ISPAN	1996	DBLP DOI BibTeX RDF	bridge-connected components, reconfigurable bus system, dominator, undirected graphs, bridge, dominator tree, biconnected components, articulation point
26	Arun K. Jagota	A near-optimal algorithm for gossiping in a d-dimensional mesh bus interconnection network.	IPPS	1995	DBLP DOI BibTeX RDF	near-optimal algorithm, d-dimensional mesh bus interconnection network, geometric characterization, parallel algorithms, multiprocessor interconnection networks, upper bound, gossiping, message transmission
26	Sérgio Vale Aguiar Campos, Edmund M. Clarke, Wilfredo R. Marrero, Marius Minea	Verifying the performance of the PCI local bus using symbolic techniques.	ICCD	1995	DBLP DOI BibTeX RDF	PCI local bus, model checking techniques, performance evaluation, logic testing, system buses, symbolic techniques, timing information, finite-state systems, temporal behavior
26	Tai-Kuo Woo, Stanley Y. W. Su	PCBN: A High-Performance Partitionable Circular Bus Network for Distributed Systems.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	high-performance partitionable circular bus network, distributednetwork, graph traversal algorithm, idlingproblem, nonconflicting requests, distributed systems, synchronization, distributed processing, synchronisation, graph colouring, maximal independent sets
25	Jeffrey M. Carver, Richard Neil Pittman, Alessandro Forin	Automatic bus macro placement for partially reconfigurable FPGA designs.	FPGA	2009	DBLP DOI BibTeX RDF	emips, reconfigurable computing, dynamic partial reconfiguration, floor-planning
25	Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang	A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization.	ASP-DAC	2009	DBLP DOI BibTeX RDF
25	Jianbing Ma, Weiru Liu, Paul Miller 0003, WeiQi Yan 0001	Event Composition with Imperfect Information for Bus Surveillance.	AVSS	2009	DBLP DOI BibTeX RDF
25	Carsten Albrecht, Philipp Roß, Roman Koch, Thilo Pionteck, Erik Maehle	Performance Analysis of Bus-Based Interconnects for a Run-Time Reconfigurable Co-Processor Platform.	PDP	2008	DBLP DOI BibTeX RDF	Network Co-processor, SoC Interconnect, Run-Time Reconfiguration
25	Dae Hyun Kim 0004, Sung Kyu Lim	Bus-aware microarchitectural floorplanning.	ASP-DAC	2008	DBLP DOI BibTeX RDF
25	Sudeep Pasricha, Nikil D. Dutt	ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip.	ASP-DAC	2008	DBLP DOI BibTeX RDF
25	Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang	Verifying external interrupts of embedded microprocessor in SoC with on-chip bus.	ICCAD	2008	DBLP DOI BibTeX RDF
25	Yan-Jie Chai, Ji-Yin Sun, Jing Gao, Ling-Jiao Tao, Jing Ji, Fei-Hu Bao	Improvement of I2C Bus and RS-232 Serial Port under Complex Electromagnetic Environment.	CSSE (4)	2008	DBLP DOI BibTeX RDF
25	Fang Zhu, Jie Song, Ruixia Yang, Junhua Gu	Research on Counting Method of Bus Passenger Flow Based on Kinematics of Human Body.	CSSE (1)	2008	DBLP DOI BibTeX RDF
25	Sampo Tuuna, Jouni Isoaho, Hannu Tenhunen	Analysis of Delay Variation in Encoded On-Chip Bus Signaling under Process Variation.	VLSI Design	2008	DBLP DOI BibTeX RDF
25	Shangyao Yan, Yu-Jung Tung, Ching-Hui Tang	Intercity Bus Scheduling Model Incorporating Variable Market Share.	IEEE Trans. Syst. Man Cybern. Part A	2007	DBLP DOI BibTeX RDF
25	Hyung Gyu Lee, Naehyuck Chang, Ümit Y. Ogras, Radu Marculescu	On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	MPEG-2 encoder, system-on-chip, Networks-on-chip, FPGA prototype, point-to-point