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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 73 occurrences of 45 keywords
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Results
Found 107 publication records. Showing 107 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
89 | Jin-Fu Li 0001, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow |
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 393-402, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
built-in redundancy-analysis, built-in self-test, memory testing, semiconductor memory, built-in self-repair |
75 | Rei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu |
Economic Aspects of Memory Built-in Self-Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 24(2), pp. 164-172, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
BIRA, BIST, yield, overhead, economic models, BISR, redundancy analysis, built-in self-repair |
70 | Xiaogang Du, Sudhakar M. Reddy, Wu-Tung Cheng, Joseph Rayhawk, Nilanjan Mukherjee 0001 |
At-Speed Built-in Self-Repair Analyzer for Embedded Word-Oriented Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 895-900, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
66 | Chih-Sheng Hou, Jin-Fu Li 0001, Che-Wei Chou |
Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 3-7, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
test, test scheduling, repair, RAM, built-in self-repair |
63 | Rita Zappa, Carolina Selva, Danilo Rimondi, Cosimo Torelli, M. Crestan, Giovanni Mastrodomenico, Lara Albani |
Micro Programmable Built-In Self Repair for SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 12th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2004), 9-10 August 2004, San Jose, CA, USA, pp. 72-77, 2004, IEEE Computer Society, 0-7695-2193-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
63 | Pinaki Mazumder, Jih-Shyr Yih |
A new built-in self-repair approach to VLSI memory yield enhancement by using neural-type circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(1), pp. 124-136, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
61 | Michael Nicolaidis, Nadir Achouri, Slimane Boutobza |
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10590-10595, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
59 | Michael Nicolaidis, Nadir Achouri, Lorena Anghel |
A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 22nd IEEE VLSI Test Symposium (VTS 2004), 25-29 April 2004, Napa Valley, CA, USA, pp. 313-318, 2004, IEEE Computer Society, 0-7695-2134-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
ECC codes, word repair, nanotechnologies, memory repair, high defect densities |
57 | Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri |
Optimal Spare Utilization in Repairable and Reliable Memory Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 11th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2003), 28-29 July 2003, San Jose, CA, USA, pp. 64-71, 2003, IEEE Computer Society, 0-7695-2004-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Embedded Memory Repair and Reliability, Fault-Tolerant Memory Core, System-on-chip, Yield, Built-In-Self-Repair |
56 | Shyue-Kung Lu |
A Novel Built-In Self-Repair Approach for Embedded RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(3), pp. 315-324, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
divided word line, fault tolerance, redundancy, low power design, embedded memory |
55 | Yu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu |
A Built-In Self-Repair Scheme for NOR-Type Flash Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 114-119, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
53 | Kanad Chakraborty |
Testing and Reliability Techniques for High-Bandwidth Embedded RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 20(1), pp. 89-108, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multiport RAM, BIST (built-in self-test), BISR (built-in self-repair), column-multiplexed addressing, fault tolerance, reliability, bandwidth |
53 | Da-Ming Chang, Jin-Fu Li 0001, Yu-Jen Huang |
A Built-In Redundancy-Analysis Scheme for Random Access Memories with Two-Level Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(1-3), pp. 181-192, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Built-in self-repair (BISR), Built-in redundancy-analysis (BIRA), Two-level redundancy, Random access memory, System-on-chip (SOC) |
50 | Jin-Fu Li 0001, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu |
A built-in self-repair design for RAMs with 2-D redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(6), pp. 742-745, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | Rei-Fu Huang, Chin-Lung Su, Cheng-Wen Wu, Shen-Tien Lin, Kun-Lun Luo, Yeong-Jar Chang |
Fail Pattern Identification for Memory Built-In Self-Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 366-371, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
48 | Rei-Fu Huang, Jin-Fu Li 0001, Jen-Chieh Yeh, Cheng-Wen Wu |
Raisin: Redundancy Analysis Algorithm Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 24(4), pp. 386-396, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
repair rate, BIRA, Raisin, yield, BISR, redundancy analysis, algorithm simulation |
48 | Michael Nicolaidis, Nadir Achouri, Slimane Boutobza |
Dynamic Data-bit Memory Built-In Self- Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 588-594, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
46 | R. Chandramouli |
Managing Test and Repair of Embedded Memory Subsystem in SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 452, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Tsu-Wei Tseng, Chun-Hsien Wu, Yu-Jen Huang, Jin-Fu Li 0001, Alex Pao, Kevin Chiu, Eliot Chen |
A Built-In Self-Repair Scheme for Multiport RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pp. 355-360, 2007, IEEE Computer Society, 0-7695-2812-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Michael Nicolaidis, Nadir Achouri, Lorena Anghel |
Memory Built-In Self-Repair for Nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 7-9 July 2003, Kos Island, Greece, pp. 94-, 2003, IEEE Computer Society, 0-7695-1968-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
43 | S. Habermann, René Kothe, Heinrich Theodor Vierhaus |
Built-in Self Repair by Reconfiguration of FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy, pp. 187-188, 2006, IEEE Computer Society, 0-7695-2620-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
43 | Michael Nicolaidis, Nadir Achouri, Lorena Anghel |
A Memory Built-In Self-Repair for High Defect Densities Based on Error Polarities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 459-466, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
39 | Yu-Chih Tsai, Wen-Chien Ting, Chia-Chun Wang, Chia-Cheng Chang, Ren-Shuo Liu |
Built-in Self-Test and Built-in Self-Repair Strategies Without Golden Signature for Computing in Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023, pp. 1-6, 2023, IEEE, 978-3-9819263-7-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
36 | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
A heterogeneous built-in self-repair approach using system-level synthesis flexibility. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 53(1), pp. 93-101, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Lorena Anghel, Nadir Achouri, Michael Nicolaidis |
Evaluation of Memory Built-in Self Repair Techniques for High Defect Density Technologie. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2004), 3-5 March 2004, Papeete, Tahiti, pp. 315-320, 2004, IEEE Computer Society, 0-7695-2076-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
36 | Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu |
A Processor-Based Built-In Self-Repair Design for Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 366-371, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Tsu-Wei Tseng, Jin-Fu Li 0001, Da-Ming Chang |
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 53-58, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Minsu Choi, Noh-Jin Park, K. M. George, Byoungjae Jin, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi |
Fault Tolerant Memory Design for HW/SW Co-Reliability in Massively Parallel Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NCA ![In: 2nd IEEE International Symposium on Network Computing and Applications (NCA 2003), 16-18 April 2003, Cambridge, MA, USA, pp. 341-350, 2003, IEEE Computer Society, 0-7695-1938-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Built-in-self-repair (BISR), Field Reconfiguration, HW/SW Co-reliability, Reliability Assurance, Reliability, High performance computing, Yield, Massively parallel computing, Fault-tolerant memory, Modular Redundancy |
32 | Chih-Hsien Hsu, Shyue-Kung Lu, Sy-Yen Kuo |
Novel Fault-Tolerant Techniques for High Capacity RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 8th Pacific Rim International Symposium on Dependable Computing (PRDC 2001), 17-19 December 2001, Seoul, Korea, pp. 11-18, 2001, IEEE Computer Society, 0-7695-1414-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
divided bit-line, divided word-line, fault tolerance and redundancy, built-in self-repair |
30 | Michael Nicolaidis, Lorena Anghel, Nadir Achouri |
Memory Defect Tolerance Architectures for Nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(4), pp. 445-455, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
word repair, nanotechnologies, BISR, memory repair, high defect densities |
30 | Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto |
Agent Based DBIST/DBISR And Its Web/Wireless Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 952-960, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta |
A physical design tool for built-in self-repairable RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(2), pp. 352-364, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
28 | Uthman Alsaiari, Resve A. Saleh |
Partitioning for Selective Flip-Flop Redundancy in Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 798-803, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Partitioning, Redundancy, Yield, Flip-Flop |
25 | Chao-Da Huang, Jin-Fu Li 0001, Tsu-Wei Tseng |
ProTaR: An Infrastructure IP for Repairing RAMs in System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(10), pp. 1135-1143, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Yu-Jen Huang, Da-Ming Chang, Jin-Fu Li 0001 |
A Built-In Redundancy-Analysis Scheme for Self-Repairable RAMs with Two-Level Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA, pp. 362-370, 2006, IEEE Computer Society, 0-7695-2706-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Sabyasachee Banerjee, Subhashis Majumder, Bhargab B. Bhattacharya |
On Managing Test-Time, Power, and Layer Assignment in 3D SoCs with Built-In-Self-Repair Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 684-689, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
24 | Youngkwang Lee, Donghyun Han, Sungho Kang 0001 |
TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 31(4), pp. 578-590, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Shyue-Kung Lu, Xin Dong |
Integrated Progressive Built-In Self-Repair (IPBISR) Techniques for NAND Flash Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC-Asia ![In: IEEE International Test Conference in Asia, ITC-Asia 2023, Matsue, Japan, September 12-14, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-1281-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
24 | Shyue-Kung Lu, Shi-Chun Tseng, Kohei Miyase |
Fine-Grained Built-In Self-Repair Techniques for NAND Flash Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2022, Anaheim, CA, USA, September 23-30, 2022, pp. 391-399, 2022, IEEE, 978-1-6654-6270-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
24 | Hayoung Lee, Hyunggoy Oh, Sungho Kang 0001 |
On-Chip Error Detection Reusing Built-In Self-Repair for Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 56443-56456, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
24 | Tianming Ni, Hao Chang, Yao Yao, Xueyun Li, Zhengfeng Huang |
A Novel Built-In Self-Repair Scheme for 3D Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 65052-65059, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Aditya Kumar Singh Pundir |
Novel modified memory built in self-repair (MMBISR) for SRAM using hybrid redundancy-analysis technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 13(6), pp. 836-842, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
24 | Keewon Cho, Young-Woo Lee, Sungyoul Seo, Sungho Kang |
An efficient built-in self-repair scheme for area reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2017, Seoul, South Korea, November 5-8, 2017, pp. 105-106, 2017, IEEE, 978-1-5386-2285-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Shyue-Kung Lu, Cheng-Ju Tsai, Masaki Hashizume |
Enhanced Built-In Self-Repair Techniques for Improving Fabrication Yield and Reliability of Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(8), pp. 2726-2734, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Wooheon Kang, Changwook Lee, Hyunyul Lim, Sungho Kang |
Optimized Built-In Self-Repair for Multiple Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(6), pp. 2174-2183, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Itsuo Takanami, Tadayoshi Horita, Masakazu Akiba, Mina Terauchi, Tsuneo Kanno |
A Built-in Self-repair Circuit for Restructuring Mesh-Connected Processor Arrays by Direct Spare Replacement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. Comput. Sci. ![In: Transactions on Computational Science XXVII, pp. 97-119, 2016, Springer, 978-3-662-50411-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Stefan Kristofík, Marcel Baláz |
Built-in self-repair architecture generator for digital cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Kosice, Slovakia, April 20-22, 2016, pp. 138-143, 2016, IEEE, 978-1-5090-2467-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Chih-Sheng Hou, Yong-Xiao Chen, Jin-Fu Li 0001, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou |
A built-in self-repair scheme for DRAMs with spare rows, columns, and bits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2016 IEEE International Test Conference, ITC 2016, Fort Worth, TX, USA, November 15-17, 2016, pp. 1-7, 2016, IEEE, 978-1-4673-8773-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Wooheon Kang, Changwook Lee, Hyunyul Lim, Sungho Kang |
A 3 Dimensional Built-In Self-Repair Scheme for Yield Improvement of 3 Dimensional Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 64(2), pp. 586-595, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Shi-Yu Huang, Meng-Ting Tsai, Zeng-Fu Zeng, Kun-Han Hans Tsai, Wu-Tung Cheng |
General Timing-Aware Built-In Self-Repair for Die-to-Die Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(11), pp. 1836-1846, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Shyue-Kung Lu, Hao-Wei Lin, Masaki Hashizume |
An enhanced built-in self-repair technique for yield and reliability improvement of embedded memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8483-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | Marcel Baláz, Stefan Kristofík, Mária Fischerová |
Generic built-in self-repair architectures for SoC logic cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 45-50, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Shi-Yu Huang, Zeng-Fu Zeng, Kun-Han Tsai, Wu-Tung Cheng |
On-the-fly timing-aware built-in self-repair for high-speed interposer wires in 2.5-D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 19th IEEE European Test Symposium, ETS 2014, Paderborn, Germany, May 26-30, 2014, pp. 1-2, 2014, IEEE, 978-1-4799-3415-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Che-Wei Chou, Yu-Jen Huang, Jin-Fu Li 0001 |
A Built-In Self-Repair Scheme for 3-D RAMs With Interdie Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4), pp. 572-583, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Kundan Nepal, Xi Shen, Jennifer Dworak, Theodore W. Manikas, R. Iris Bahar |
Built-in Self-Repair in a 3D die stack using programmable logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 243-248, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Caleb Serafy, Ankur Srivastava 0001 |
Online TSV health monitoring and built-in self-repair to overcome aging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013, pp. 224-229, 2013, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Chih-Sheng Hou, Jin-Fu Li 0001 |
Allocation of RAM built-in self-repair circuits for SOC dies of 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013, pp. 1-6, 2013, IEEE Computer Society, 978-1-4673-5542-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Yu-Jen Huang, Jin-Fu Li 0001 |
Built-In Self-Repair Scheme for the TSVs in 3-D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10), pp. 1600-1613, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Shyue-Kung Lu, Zhen-Yu Wang, Yi-Ming Tsai, Jiann-Liang Chen |
Efficient Built-In Self-Repair Techniques for Multiple Repairable Embedded RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4), pp. 620-629, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Roland Dobai, Marcel Baláz, Mária Fischerová |
Automated Generation of Built-In Self-Repair Architectures for Random Logic SoC Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 15th Euromicro Conference on Digital System Design, DSD 2012, Cesme, Izmir, Turkey, September 5-8, 2012, pp. 73-78, 2012, IEEE Computer Society, 978-1-4673-2498-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Michael Nicolaidis, Vladimir Pasca, Lorena Anghel |
Through-silicon-via built-in self-repair for aggressive 3D integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012, pp. 91-96, 2012, IEEE Computer Society, 978-1-4673-2082-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Tze-Hsin Wu, Po-Yuan Chen, Mincent Lee, Bin-Yen Lin, Cheng-Wen Wu, Chen-Hung Tien, Hung-Chih Lin, Hao Chen 0053, Ching-Nen Peng, Min-Jer Wang |
A memory yield improvement scheme combining built-in self-repair and error correction codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012, pp. 1-9, 2012, IEEE Computer Society, 978-1-4673-1594-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Mincent Lee, Li-Ming Denq, Cheng-Wen Wu |
A Memory Built-In Self-Repair Scheme Based on Configurable Spares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(6), pp. 919-929, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Chih-Sheng Hou, Jin-Fu Li 0001, Tsu-Wei Tseng |
Memory Built-in Self-Repair Planning Framework for RAMs in SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11), pp. 1731-1743, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Tobias Koal, Heinrich Theodor Vierhaus |
Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011, pp. 219-224, 2011, IEEE Computer Society, 978-1-4244-9755-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Xiaodong Wang, Dilip P. Vasudevan, Hsien-Hsin S. Lee |
Global Built-In Self-Repair for 3D memories with redundancy sharing and parallel testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
3DIC ![In: 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31 - February 2, 2012, pp. 1-8, 2011, IEEE, 978-1-4673-2189-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Michael Nicolaidis, Vladimir Pasca, Lorena Anghel |
I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011, pp. 208, 2011, IEEE Computer Society, 978-0-7695-4433-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Tobias Koal, Daniel Scheit, Mario Schölzel, Heinrich Theodor Vierhaus |
On the Feasibility of Built-In Self Repair for Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011, Vancouver, BC, Canada, October 3-5, 2011, pp. 316-324, 2011, IEEE Computer Society, 978-1-4577-1713-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Daniel Scheit |
Fault-tolerant integrated interconnections based on built-in self-repair and codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2011 |
RDF |
|
24 | Tsu-Wei Tseng, Jin-Fu Li 0001, Chih-Chiang Hsu |
ReBISR: A Reconfigurable Built-In Self-Repair Scheme for Random Access Memories in SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 18(6), pp. 921-932, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Tsu-Wei Tseng, Yu-Jen Huang, Jin-Fu Li 0001 |
DABISR: A Defect-Aware Built-In Self-Repair Scheme for Single/Multi-Port RAMs in SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(10), pp. 1628-1639, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Yu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu |
Built-In Self-Repair Schemes for Flash Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(8), pp. 1243-1256, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Michael Nicolaidis, Vladimir Pasca, Lorena Anghel |
Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 5-7 July, 2010, Corfu, Greece, pp. 218, 2010, IEEE Computer Society, 978-1-4244-7724-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Tsu-Wei Tseng, Chih-Sheng Hou, Jin-Fu Li 0001 |
Automatic generation of memory built-in self-repair circuits in SOCs for minimizing test time and area cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA, pp. 21-26, 2010, IEEE Computer Society, 978-1-4244-6648-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Zhen-Yu Wang, Yi-Ming Tsai, Shyue-Kung Lu |
Built-In Self-Repair Techniques for Heterogeneous Memory Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2009, Shanghai, China, 16-18 November 2009, pp. 69-74, 2009, IEEE Computer Society, 978-0-7695-3849-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Tsu-Wei Tseng, Jin-Fu Li 0001 |
A Shared Parallel Built-In Self-Repair Scheme for Random Access Memories in SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2008 IEEE International Test Conference, ITC 2008, Santa Clara, California, USA, October 26-31, 2008, pp. 1-9, 2008, IEEE Computer Society, 978-1-4244-2403-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Pawel Pawlowski, Adam Dabrowski, Mario Schölzel |
Proposal of VLIW Architecture for Application Specific Processors with Built-in-Self-Repair Facility via Variable Accuracy Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007, pp. 313-318, 2007, IEEE Computer Society, 1-4244-1161-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Tomokazu Yoneda, Yuusuke Fukuda, Hideo Fujiwara |
Test Scheduling for Memory Cores with Built-In Self-Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 16th Asian Test Symposium, ATS 2007, Beijing, China, October 8-11, 2007, pp. 199-206, 2007, IEEE, 0-7695-2890-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Swapnil Bahl |
A Sharable Built-in Self-Repair for Semiconductor Memories with 2-D Redundancy Schema. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy., pp. 331-339, 2007, IEEE Computer Society, 0-7695-2885-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Tsu-Wei Tseng, Jin-Fu Li 0001, Chih-Chiang Hsu, Alex Pao, Kevin Chiu, Eliot Chen |
A Reconfigurable Built-In Self-Repair Scheme for Multiple Repairable RAMs in SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-9, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Jihyun Lee, Young-Jun Lee, Yong-Bin Kim |
SRAM word-oriented redundancy methodology using built in self-repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: Proceedings 2004 IEEE International SOC Conference, September 12-15, 2004, Hilton Santa Clara, CA, USA, pp. 219-222, 2004, IEEE, 0-7803-8445-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Jun Ohtani, Tukasa Ooishi, Tomoya Kawagoe, Mitsutaka Niiro, Masanao Maruta, Hideto Hidaka |
A shared built-in self-repair analysis for multiple embedded memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001, pp. 187-190, 2001, IEEE, 0-7803-6591-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
24 | Shyue-Kung Lu, Chih-Hsien Hsu |
Built-In self-repair for divided word line memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 13-16, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
24 | Volker Schöber, Steffen Paul, Olivier Picot |
Memory built-in self-repair using redundant words. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001, pp. 995-1001, 2001, IEEE Computer Society, 0-7803-7169-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
24 | Tomoya Kawagoe, Jun Ohtani, Mitsutaka Niiro, Tukasa Ooishi, Mitsuhiro Hamada, Hideto Hidaka |
A built-in self-repair analyzer (CRESTA) for embedded DRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 567-574, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
24 | Ilyoung Kim, Yervant Zorian, Goh Komoriya, Hai Pham, Frank P. Higgins, Jim L. Lewandowski |
Built in self repair for embedded high density SRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 1112-1119, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
24 | Pinaki Mazumder, Jih-Shyr Yih |
Restructuring of square processor arrays by built-in self-repair circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(9), pp. 1255-1265, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
24 | Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey |
High Level Synthesis Techniques for Efficient Built-In-Self Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, October 27-29, 1993, Venice, Italy, Proceedings, pp. 41-48, 1993, IEEE Computer Society, 0-8186-3502-9. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP BibTeX RDF |
|
24 | Pinaki Mazumder, Jih-Shyr Yih |
A novel built-in self-repair approach to VLSI memory yield enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1990, Washington, D.C., USA, September 10-14, 1990, pp. 833-841, 1990, IEEE Computer Society, 0-8186-9064-X. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
24 | Jih-Shyr Yih |
Built-in self-repair of embedded VLSI arrays by electronic neural nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1990 |
RDF |
|
24 | Pinaki Mazumder, Jih-Shyr Yih |
Neural computing for built-in self-repair of embedded memory arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTCS ![In: Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, FTCS 1989, Chicago, IL, USA, 21-23 June, 1989, pp. 480-487, 1989, IEEE Computer Society, 0-8186-1959-7. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
23 | Said Hamdioui, Georgi Gaydadjiev, Ad J. van de Goor |
The State-of-Art and Future Trends in Testing Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 12th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2004), 9-10 August 2004, San Jose, CA, USA, pp. 54-59, 2004, IEEE Computer Society, 0-7695-2193-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto |
Towards Microagent based DBIST/DBISR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 867-874, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Liviu Miclea, Szilárd Enyedi, Alfredo Benso |
Itelligent Agents and BIST/BISR - Working Together in Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 940-946, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
distributed systems BIST, distributed BISR, Intelligent agent, self-repair, embedded testing, high-level testing |
23 | Xingguo Xiong, Yu-Liang Wu, Wen-Ben Jone |
Design and Analysis of Self-Repairable MEMS Accelerometer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 3-5 October 2005, Monterey, CA, USA, pp. 21-32, 2005, IEEE Computer Society, 0-7695-2464-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Rei-Fu Huang, Jin-Fu Li 0001, Jen-Chieh Yeh, Cheng-Wen Wu |
A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France, pp. 68-, 2002, IEEE Computer Society, 0-7695-1617-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
simulation, memory testing, embedded memory, redundancy analysis, memory repair |
21 | Rei-Fu Huang, Jin-Fu Li 0001, Jen-Chieh Yeh, Cheng-Wen Wu |
A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 8-10 July 2002, Isle of Bendor, France, pp. 262-, 2002, IEEE Computer Society, 0-7695-1641-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
simulation, memory testing, embedded memory, redundancy analysis, memory repair |
21 | Tobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus |
A scheme of logic self repair including local interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, April 15-17, 2009, Liberec, Czech Republic, pp. 8-11, 2009, IEEE Computer Society, 978-1-4244-3341-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri |
Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings, pp. 419-427, 2002, IEEE Computer Society, 0-7695-1831-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Uthman Alsaiari, Resve A. Saleh |
Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 703-710, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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