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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 17 occurrences of 17 keywords
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Results
Found 19 publication records. Showing 19 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
147 | Cynthia F. Murphy, Magdy S. Abadir, Peter Sandborn |
Economic Analysis of Test Process Flows for Multichip Modules Using Known Good Die. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
known good die, bare die test, multichip modules |
86 | Larry Gilg |
Known Good Die. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
known good die, KGD, chip scale (size) package, multi-chip module (MCM), wafer probe, membrane probe card, buckling beam probe card, KGD carrier, CSP, burn-in |
73 | Joel A. Jorgenson, Russell J. Wagner |
Design-For-Test in a Multiple Substrate Multichip Module. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
Multichip Module (MCM) Test, Known-Good Die (KGD), Ball Grid Array (BGA), Built-In-Self-Test (BIST), boundary-scan |
58 | Jee-Youl Ryu, Bruce C. Kim, Iboun Taimiya Sylla |
A Novel RF Test Scheme Based on a DFT Method. |
J. Electron. Test. |
2006 |
DBLP DOI BibTeX RDF |
RF design-for-testability, known-good-die, defects, low noise amplifier, RF test |
58 | Madhavan Swaminathan, Bruce C. Kim, Abhijit Chatterjee |
A Survey of Test Techniques for MCM Substrates. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
multi-chip module, MCM substrates, known-good-die, interconnect test |
37 | James Quinn, Barbara Loferer |
Quality in 3D assembly - Is "Known Good Die" good enough? |
3DIC |
2013 |
DBLP DOI BibTeX RDF |
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28 | Dave Armstrong, Gary Maier |
Known-good-die test methods for large, thin, high-power digital devices. |
ITC |
2016 |
DBLP DOI BibTeX RDF |
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28 | Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono, Yuji Oda, Susumu Imaoka, Keiichi Usui, Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Masakazu Okada, Atsushi Ishii, Tsutomu Yoshihara, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara |
A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die. |
IEEE J. Solid State Circuits |
2008 |
DBLP DOI BibTeX RDF |
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28 | Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono, Yuji Oda, Susumu Imaoka, Keiichi Usui, Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Masakazu Okada, Atsushi Ishii, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara |
A 65nm Embedded SRAM with Wafer-Level Burn-In Mode, Leak-Bit Redundancy and E-Trim Fuse for Known Good Die. |
ISSCC |
2007 |
DBLP DOI BibTeX RDF |
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28 | Harry K. Charles Jr. |
Tradeoffs in multichip module yield and cost with known good die probability and repair. |
Microelectron. Reliab. |
2001 |
DBLP DOI BibTeX RDF |
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28 | Adit D. Singh, Phil Nigh, C. Mani Krishna 0001 |
Screening for Known Good Die (KGD) Based on Defect Clustering: An Experimental Study. |
ITC |
1997 |
DBLP DOI BibTeX RDF |
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28 | Alan W. Righter |
Solving Known Good Die (and Substrate) Test Issues. |
ITC |
1995 |
DBLP DOI BibTeX RDF |
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28 | A. Frisch, Mitch Aigner, T. Almy, Hans J. Greub, M. Hazra, S. Mohr, Nicholas J. Naclerio, W. Russell, M. Stebniskey |
Supplying Known-Good Die for MCM Applications Using Low-Cost Embedded Testing. |
ITC |
1995 |
DBLP DOI BibTeX RDF |
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28 | Barbara Vasquez, Don R. Van Overloop, Scott E. Lindsey |
Known-good-die technologies on the horizon. |
VTS |
1994 |
DBLP DOI BibTeX RDF |
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28 | Toshiaki Ueno, You Kondoh |
Membrane Prove Technology for MCM Known-Good-Die. |
ITC |
1994 |
DBLP DOI BibTeX RDF |
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28 | Lina Prokopchak |
Development of a Solution for Achieving Known-Good-Die. |
ITC |
1994 |
DBLP DOI BibTeX RDF |
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12 | Davide Appello, Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda |
System-in-Package Testing: Problems and Solutions. |
IEEE Des. Test Comput. |
2006 |
DBLP DOI BibTeX RDF |
IEEE1500 SECT, KGD, System-on-Chip, SoC, test access mechanism, SiP, System-in-Package, System-on-Package |
9 | Anne E. Gattiker, Wojciech Maly |
Smart Substrate MCMs. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
smart substrate, testing, cost model, MCM |
9 | Wojciech Maly, Derek Feltham, Anne E. Gattiker, Mark D. Hobaugh, Kenneth Backus, Michael E. Thomas |
Smart-Substrate Multichip-Module Systems. |
IEEE Des. Test Comput. |
1994 |
DBLP DOI BibTeX RDF |
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