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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 751 occurrences of 379 keywords
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Results
Found 2203 publication records. Showing 2203 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
110 | Sudarshan Bahukudumbi, Sule Ozev, Krishnendu Chakrabarty, Vikram Iyengar |
AWafer-Level Defect Screening Technique to Reduce Test and Packaging Costs for "Big-D/Small-A" Mixed-Signal SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 823-828, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
mixed-signal cores, wafer-level defect screening, packaging cost reduction, big-D/small-A mixed-signal system-on-chip designs, mixed-signal SoC, consumer electronics market, wafer-level testing, correlation-based signature analysis, low-cost digital testers, generic cost model, mixed-signal test, digital logic, test cost reduction |
72 | Johan Verfaillie, Didier Haspeslagh |
A general purpose design-for-test methodology at the analog-digital boundary of mixed-signal VLSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 109-115, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed-signal DFT, mixed-signal boundary scan, modular mixed-signal test |
57 | Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José L. Huertas |
Testing mixed-signal cores: practical oscillation-based test in an analog macrocell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 31-38, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
analog macrocell, mixed signal integrated circuit, OBT, mixed-signal macrocell, integrated circuit testing, mixed analogue-digital integrated circuits, oscillation-based test |
55 | Rajesh Ramadoss, Michael L. Bushnell |
Test Generation for Mixed-Signal Devices Using Signal Flow Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 14(3), pp. 189-205, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
analog test generation, mixed-signal test generation, back tracing, parametric faults, catastrophic faults |
54 | Robert L. Ewing |
Technology Road Map to Methodologies for Mixed-Signal System Design and Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 22(2), pp. 123-134, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
53 | Sudip Chakrabarti, Abhijit Chatterjee |
Compact Fault Dictionary Construction for Efficient Isolation of Faults in Analog and Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 327-341, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
fault diagnosis, analog, Design automation, mixed-signal, fault isolation |
51 | Rajesh Ramadoss, Michael L. Bushnell |
Test generation for mixed-signal devices using signal flow graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 242-248, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed-signal devices, reverse simulation approach, component tolerances, analog input sinusoids, test generation results, analog backtrace method, high-order analog circuits, fault diagnosis, test generation, integrated circuit testing, automatic testing, circuit analysis computing, mixed analogue-digital integrated circuits, signal flow graphs, signal flow graphs, nonlinear circuits |
51 | Ananta K. Majhi, Vishwani D. Agrawal |
Mixed-Signal Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 285-288, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
a survey of mixed-signal testing, tools and methods for mixed-signal test, Analog test |
51 | Javier Argüelles, Salvador Bracho |
Signature analysis for fault detection of mixed-signal ICs based on dynamic power-supply current. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 89-107, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed-signal IC testing, design for test in mixed-signal IC, built-in current sensors |
48 | Jaeha Kim |
Mixed-Signal System Verification: A High-Speed Link Example. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 21st International Conference, CAV 2009, Grenoble, France, June 26 - July 2, 2009. Proceedings, pp. 16, 2009, Springer, 978-3-642-02657-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
analog and mixed-signal verification, analog design intent, linear system models |
48 | Jie Liu 0001, Edward A. Lee |
A component-based approach to modeling and simulating mixed-signal and hybrid systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Model. Comput. Simul. ![In: ACM Trans. Model. Comput. Simul. 12(4), pp. 343-368, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
actors-oriented design, hierarchical heterogeneity, mixed-signal systems, simulation, hybrid systems, Component-based modeling, Ptolemy II |
48 | Nur Engin, Hans G. Kerkhoff, Ronald J. W. T. Tangelder, Han Speek |
Integrated Design and Test of Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 14(1-2), pp. 75-83, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
design and test integration, test plan generation, specification-based testing, mixed-signal test |
48 | Pierluigi Daglio |
A complete and fully qualified design flow for verification of mixed-signal SoC with embedded flash memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 94-99, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
46 | Joonsung Park, Hongjoong Shin, Jacob A. Abraham |
Parallel Loopback Test of Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 309-316, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Test Quality and Reliability, Loopback Test, Characterization, Mixed-signal Test, Parallel Test |
46 | Sasikumar Cherubal, Abhijit Chatterjee |
A Methodology for Efficient Simulation and Diagnosis of Mixed-Signal Systems Using Error Waveforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings, pp. 357-, 1999, IEEE Computer Society, 0-7695-0325-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
fault simulation, Mixed-signal test, fault isolation |
46 | Pascal Caunegre, Claude Abraham |
Fault simulation for mixed-signal systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 8(2), pp. 143-152, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed-signal systems, fault simulation, bridging faults |
46 | Gordon W. Roberts |
Metrics, techniques and recent developments in mixed-signal testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 514-521, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
manufacturing environment, measurement setups, quality, mixed-signal testing, mixed analogue-digital integrated circuits, manufacturing defects, product cost |
44 | Stephen K. Sunter, Aubin Roy |
A Mixed-Signal Test Bus and Analog BIST with 'Unlimited' Time and Voltage Resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011, pp. 81-86, 2011, IEEE Computer Society, 978-0-7695-4433-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
mixed-signal DFT, analog bus, mixed-signal BIST |
43 | José Machado da Silva, José Silva Matos, Ian M. Bell, Gaynor E. Taylor |
Mixed current/voltage observation towards effective testing of analog and mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 75-88, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
mixed current/voltage testing, design for testability, mixed-signal testing, cross-correlation |
42 | Daniela De Venuto, Michael J. Ohletz |
On-Chip Test for Mixed-Signal ASICs using Two-Mode Comparators with Bias-Programmable Reference Voltages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(3-4), pp. 243-253, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
mixed-signal ASIC, hardware conversion, GO/NOGO test, bias programming, DfT, power consumption, overhead |
42 | Li-Rong Zheng 0001, Hannu Tenhunen |
Noise Margin Constraints for Interconnectivity in Deep Submicron Low Power and Mixed-Signal VLSI Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 123-136, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Mixed-Signal VLSI, Interconnection, Crosstalk, Noise Margin |
42 | Ashok Balivada, Hong Zheng, Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham |
A unified approach for fault simulation of linear mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(1-2), pp. 29-41, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
arithmetic distance, testing, fault simulation, mixed-signal |
42 | José Luis Huertas |
Test and design-for-test of mixed-signal integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 4, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
42 | Junwei Hou, William H. Kao, Abhijit Chatterjee |
A novel concurrent fault simulation method for mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 448-451, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
41 | Mehdi M. Mechaik |
Electrical Characterization of Signal Routability and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 329-336, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
40 | Nathaniel J. August |
A Robust and Efficient Pre-Silicon Validation Environment for Mixed-Signal Circuits on Intel's Test Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 423-428, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pre-silicon, validation, mixed-signal |
40 | Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng 0001 |
WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 209-214, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Flash memory design, WCOMP, waveform comparison tool, full-chip validation, design cost, automated mixed-signal validation regression, functional match, time-to-market |
40 | Trent McConaghy, Georges G. E. Gielen |
Automation in mixed-signal design: challenges and solutions in the wake of the nano era. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 461-463, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
computer-aided design, analog, integrated circuits, mixed-signal |
40 | Gladys Omayra Ducoudray, Jaime Ramírez-Angulo |
Innovative Built-In Self-Test Schemes for On-Chip Diagnosis, Compliant with the IEEE 1149.4 Mixed-Signal Test Bus Standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(1), pp. 21-28, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
iDD analysis, built-in self-test, mixed-signal test |
40 | Mike W. T. Wong, K. Y. Ko, Yim-Shu Lee |
Analog and Mixed-Signal IP Cores Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 3-7, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mixed-signal design, analog circuit testing, SOCs |
40 | Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg, Mani Soma |
Efficient Test Set Design for Analog and Mixed-Signal Circuits and Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 239-, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Efficient, ATPG, Digital, Analog, Mixed-Signal |
38 | Daniele Bonomi, Giorgio Boselli, Gabriella Trucco, Valentino Liberali |
Effects of digital switching noise on analog voltage references in mixed-signal CMOS ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 226-231, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
crosstalk, mixed-signal ICs |
38 | Erik A. McShane, Krishna Shenai, Leon Alkalai, E. Kolawa, Victor Boyadzhyan, Brent R. Blaes, Wai-Chi Fang |
Novel Design for Testability of a Mixed-Signal VLSI IC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 97-100, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Mixed-signal VLSI, verification, microprocessor, testability, RF |
38 | João Paulo Costa, Mike Chou, L. Miguel Silveira |
Efficient Techniques for Accurate Modeling and Simulation of Substrate Coupling in Mixed-Signal IC's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 892-898, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Eigenfunction, Eigenpair, Fast Fourier Transform, Discrete Cosine Transform, Eigenvalue, Mixed-Signal, Substrate Coupling |
38 | Sree Ganesan, Ranga Vemuri |
Analog-Digital Partitioning for Field-Programmable Mixed Signal Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 14-16 March 2001, Salt Lake City, UT, USA, pp. 172-187, 2001, IEEE Computer Society, 0-7695-1037-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
36 | V. Loukusa |
Embedded System Level Self-Test for Mixed-Signal IO Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(4-6), pp. 463-470, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
IO connectivity, DFT, histogram, testability, self-test, mixed-signal, system level |
35 | Sri Chandra |
Driving Analog Mixed Signal Verification through Verilog-AMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 731, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Liyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, JinJun Guo, Peng Zhang |
A mixed-signal simulator for VHDL-AMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 287-292, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Huimin Xia, Khaldoun Bataineh, Marwan Hassoun, Joe Kryzak |
A mixed-signal behavioral level implementation of 1000BASE-X physical layer for gigabit Ethernet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 431-434, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
34 | Erik A. McShane, Krishna Shenai, Leon Alkalai, E. Kolawa, Victor Boyadzhyan, Brent R. Blaes, Wai-Chi Fang |
Monolithic Microprocessor and RF Transceiver in 0.25-micron FDSOI CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 332-333, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Mixed-signal VLSI, VLSI circuits process for mixed-signal VLSI in a die size measuring 2.2 mm x 2.2 mm, low-power, microprocessor, RF |
34 | ByongChan Lim, Jaeha Kim, Mark A. Horowitz |
An efficient test vector generation for checking analog/mixed-signal functional models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 767-772, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
linear abstraction, validation, equivalence checking, verilog, functional model, test vector, mixed-signal circuits |
34 | Anirudh Devgan, Bulent Basaran, David Colleran, Mar Hershenson |
Accelerated design of analog, mixed-signal circuits in Titan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009, pp. 67-72, 2009, ACM, 978-1-60558-449-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
analog circuit layout, analog/digital, custom design, layout, physical design, analog circuits, mixed-signal circuits |
34 | Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong |
Guess, solder, measure, repeat: how do I get my mixed-signal chip right? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 520-521, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Verilog-AMS, analog behavioral modeling, low power verification, mixed-signal verification, VHDL, SPICE, functional verification, Verilog, performance verification |
34 | Sounil Biswas, R. D. (Shawn) Blanton |
Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 299-308, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pass-fail test data, boolean minimization, minimum constrained subset cover, Mixed-signal test, test compaction |
34 | Brian P. Ginsburg, Anantha P. Chandrakasan |
The mixed signal optimum energy point: voltage and parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 244-249, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
optimization, low-power, analog-to-digital converters, mixed-signal circuits |
34 | Dana Brown, John Ferrario, Randy Wolf, Jing Li, Jayendra Bhagat, Mustapha Slamani |
RF Testing on a Mixed Signal Tester. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 23(1), pp. 85-94, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
DFT, ATE, RF, mixed signal, IC testing |
34 | David Walter, Scott Little, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda |
Symbolic Model Checking of Analog/Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 316-323, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
analog/mixed-signal circuits, Boolean based symbolic model checking algorithm, VHDL-AMS description, labeled hybrid Petri nets, Boolean signals, temporal logic formulas, timed CTL, Boolean variables, Boolean function, binary decision diagram, hardware description language |
34 | Cristoforo Marzocca, Francesco Corsi |
Mixed-Signal Circuit Classification in a Pseudo-Random Testing Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(3), pp. 333-342, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
circuit signature, mixed-signal test, pseudo-random test |
34 | Adil Koukab, Catherine Dehollain, Michel J. Declercq |
HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 767-770, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mixed-signal noise, supply noise, noise, numerical analysis, boundary-element-method, substrate noise, switching circuits, substrate coupling |
34 | Jan Arild Tofte, Chee-Kian Ong, Jiun-Lang Huang, Kwang-Ting (Tim) Cheng |
Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada, pp. 237-246, 2000, IEEE Computer Society, 0-7695-0613-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
cross-correlation signature register, CCSR, implicit functional testing, harmonic distortion, THD, classification, synthesis, noise, BIST, convex hull, polygon, discrimination, analog test, cross-correlation, mixed-signal, pseudo-random, pseudo-random, labview, impulse response, performance parameter, analog BIST |
34 | Sasikumar Cherubal, Abhijit Chatterjee |
An Efficient Hierarchical Fault Isolation Technique for Mixed-Signal Boards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 550-555, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
mixed-signal boards, fault verification, Fault isolation |
34 | Jeongjin Roh, Jacob A. Abraham |
A Mixed-Signal BIST Scheme with Time-Division Multiplexing (TDM) Comparator and Counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 572-, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
BIST, Time-division multiplexing, Comparator, Mixed-signal, Signature analyzer |
34 | Serge N. Demidenko, Vincenzo Piuri, Vyacheslav N. Yarmolik, A. Shmidman |
BIST Module for Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 2-4 November 1998, Austin, TX, USA, Proceedings, pp. 349-, 1998, IEEE Computer Society, 0-8186-8832-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Built-in Selft-Test, Test Data Generator, Mixed-Signal Circuits, Signature Analyzer |
34 | Eric Felt, Stefano Zanella, Carlo Guardiani, Alberto L. Sangiovanni-Vincentelli |
Hierarchical statistical characterization of mixed-signal circuits using behavioral modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 374-380, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
statistical characterization, behavioral modeling, mixed-signal circuits |
33 | Akira Matsuzawa |
High Quality Analog CMOS and Mixed Signal LSI Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA, pp. 97-104, 2001, IEEE Computer Society, 0-7695-1025-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
32 | Diego Vázquez, Gloria Huertas, África Luque, Manuel J. Barragan Asian, Gildas Léger, Adoración Rueda, José Luis Huertas |
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 21(3), pp. 221-232, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
BIST, analog testing, mixed-signal testing, sigma-delta modulation |
32 | Chauchin Su, Yi-Ren Cheng, Yue-Tsang Chen, Shing Tenchen |
Analog signal metrology for mixed signal ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 194-, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Analog signal metrology, multiple period low-rate sampled waveform, high-rate sampled waveform, DSP based testing, on-chip ADC, 20 MHz, mixed analogue-digital integrated circuits, Signal reconstruction, mixed signal IC |
32 | Kevin J. Kerns, Ivan L. Wemple, Andrew T. Yang |
Stable and efficient reduction of substrate model networks using congruence transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 207-214, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
mixed-signal integrated circuits, rc network reduction, congruence transform, pade approximation, lanczos process, stability, voronoi tesselation, substrate noise |
31 | Robert J. Bowman |
An Educational Program for Engineering Careers in Analog and Mixed-Signal Electronic Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2005 International Conference on Microelectronics Systems Education, MSE 2005, Anaheim, CA, USA, June 12-13, 2005, pp. 39-40, 2005, IEEE Computer Society, 0-7695-2374-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | John Marty Emmert, Jason A. Cheatham, Badhri Jagannathan, Sandeep Umarani |
A Monolithic Spectral BIST Technique for Control or Test of Analog or Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 303-, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Rajdeep Mukhopadhyay, Subrat Kumar Panda, Pallab Dasgupta, John Gough |
Instrumenting AMS assertion verification on commercial platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(2), pp. 21:1-21:47, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
OVL, SVA, integrated mixed signal design, verification library, simulation, Assertion |
30 | Pradip A. Thaker |
Holistic verification: myth or magic bullet? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 204-208, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
SoC verification, mixed-signal verification, power management verification, emulation |
30 | Christopher Labrecque |
Near-term industrial perspective of analog CAD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 456-457, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
computer-aided design, analog, integrated circuits, mixed-signal |
30 | Yu Liu, Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita |
System level design language extensions for timed/untimed digital-analog combined system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 130-133, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
AMS extension, timed/untimed, synchronization, system level design, mixed-signal |
30 | L. Cassol, O. Betat, Luigi Carro, Marcelo Lubaszewski |
The SigmaDelta-BIST Method Applied to Analog Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(1), pp. 13-20, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
BIST, analog test, mixed signal testing, sigma-delta modulator |
30 | Hans A. R. Manhaeve, Johan Verfaillie, B. Straka, J. P. Cornil |
Application of Supply Current Testing to Analogue Circuits, Towards a Structural Analogue Test Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(3), pp. 227-234, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
supply current test, I DD, I DDX monitor, analog test, structural test, mixed-signal test, current monitor |
30 | Fernando da Rocha Paixão Cortes, Sergio Bampi |
A fully integrated CMOS RF front-end for a multi-band analog mixed-signal interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 271-275, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
RF front-end, VGA, analog/RF design, frequency translation, mixer |
29 | Hari Vijay Venkatanarayanan, Michael L. Bushnell |
An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 161-168, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty |
A Flexible Design Methodology for Analog Test Wrappers in Mixed-Signal SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 137-142, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Shibaji Banerjee, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury |
Computer Aided Test (CAT) Tool for Mixed Signal SOCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 787-790, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Geert Seuren, Tom Waayers |
Extending the Digital Core-based Test Methodology to Support Mixed-Signal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 281-289, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | John A. Nestor, David A. Rich |
Integrating Digital, Analog, and Mixed-Signal Design in an Undergraduate ECE Curriculum. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2003 International Conference on Microelectronics Systems Education, MSE 2003, Educating Tomorrow's Microsystems Designers, Anaheim, CA, USA, June 1-2, 2003, pp. 89-90, 2003, IEEE Computer Society, 0-7695-1973-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty |
TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 95-99, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Meigen Shen, Li-Rong Zheng 0001, Hannu Tenhunen |
Case study of cost and performance trade-off analysis for mixed-signal integration in system-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 585-588, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda, Ralf Seepold, Natividad Martínez Madrid |
A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 310-314, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Stephan Ohr, Rob A. Rutenbar, Henry Chang, Georges G. E. Gielen, Rudolf Koch, Roy McGuffin, K. C. Murphy |
Survival strategies for mixed-signal systems-on-chip (panel session). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 579-580, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Sudip Chakrabarti, Abhijit Chatterjee |
Fault modeling and fault sampling for isolating faults in analog and mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 444-447, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Chen-Yang Pan, Kwang-Ting Cheng |
Pseudorandom testing for mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(10), pp. 1173-1185, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
29 | Edward K. F. Lee |
Reconfigurable data converter as a building block for mixed-signal test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 359-363, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
28 | Gordon W. Roberts |
Test Methods For Sigma-Delta Data Converters and Related Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 3, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
sigma-delta converter, mixed-signal testing |
28 | Kumar L. Parthasarathy, Turker Kuyel, Dana Price, Le Jin, Degang Chen 0001, Randall L. Geiger |
BIST and production testing of ADCs using imprecise stimulus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(4), pp. 522-545, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ADC linearity, imprecision measurement, imprecision stimulus, built-in self-test, Analog and mixed-signal testing, production test |
28 | Wei-Yu Chen, Sandeep K. Gupta 0001, Melvin A. Breuer |
Test Generation for Crosstalk-Induced Faults: Framework and Computational Results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(1), pp. 17-28, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
time-based test generation, fault modeling, crosstalk, mixed-signal test |
28 | Wei-Yu Chen, Sandeep K. Gupta 0001, Melvin A. Breuer |
Test generation for crosstalk-induced faults: framework and computational result. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 305-310, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
2-vector test generation, crosstalk-induced faults, noise effects, design effort, debugging effort, pulses, signal speedup, signal slowdown, digital combinational circuits, mixed-signal test generator, XGEN, static values, dynamic signals, signal arrival times, rise times, fall times, integrated circuit testing, automatic test pattern generation, combinational circuits, accuracy, vectors, circuit analysis computing, crosstalk, transitions, integrated logic circuits, technology scaling, SPICE simulations, gate delay, circuit performance, timing information, clock frequency |
28 | W. P. M. Allen, Donald G. Bailey, Serge N. Demidenko, Vincenzo Piuri |
Analysis and application of digital spectral warping in analog and mixed-signal testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 52(4), pp. 444-457, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Aarthi M. Reddy, Bhiksha Raj |
Soft Mask Methods for Single-Channel Speaker Separation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Speech Audio Process. ![In: IEEE Trans. Speech Audio Process. 15(6), pp. 1766-1776, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Byoungho Kim, Nash Khouzam, Jacob A. Abraham |
Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 293-298, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Loopback Test, Aperture Jitter, Digital-to-Analog Converter, Analog-to-Digital Converter, ADC, Mixed-Signal Testing, DAC |
27 | Thomas Brandtner |
Chip-Package Codesign Flow for Mixed-Signal SiP Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 23(3), pp. 196-202, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Mixed-Signal System-in-Package design, SiP |
27 | Antonio Andrade Jr., Érika F. Cota, Marcelo Lubaszewski |
Improving mixed-signal SOC testing: a power-aware reuse-based approach with analog BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 105-110, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
system-on-chip, BIST, power aware, mixed-signal test |
27 | Gabriella Trucco, Giorgio Boselli, Valentino Liberali |
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 129-134, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
crosstalk, mixed-signal ICs |
27 | Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Matthew R. Guthaus, Richard B. Brown |
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 520-525, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
low voltage analog, varactor, low power, SoC, system-on-chip, design methodology, MEMS, microcontroller, ADC, mixed-signal, PGA, microsystem, SD, inductor, clock generation |
27 | Daniela De Venuto, Michael J. Ohletz, Bruno Riccò |
Digital Window Comparator DfT Scheme for Mixed-Signal ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(2), pp. 121-128, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mixed-signal ASIC, window comparator, GO/NOGO test, signal level evaluation, DfT |
27 | José Vicente Calvano, Vladimir Castro Alves, Antonio Carneiro de Mesquita Filho, Marcelo Lubaszewski |
Filters Designed for Testability Wrapped on the Mixed-Signal Test Bus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April - 2 May 2002, Monterey, CA, USA, pp. 201-206, 2002, IEEE Computer Society, 0-7695-1570-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
BIST, design for test, analog test, mixed-signal test |
27 | Anna Maria Brosa, Joan Figueras |
Digital Signature Proposal for Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(5), pp. 385-393, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
BIST, analog test, mixed-signal test |
27 | Carsten Wegener, Michael Peter Kennedy |
Incorporation of Hard-Fault-Coverage in Model-Based Testing of Mixed-Signal ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France, pp. 765, 2000, IEEE Computer Society / ACM, 0-7695-0537-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Defect and Tolerance-Oriented Test, ATPG and Fault Modeling, Analog and Mixed-Signal Test |
27 | Naim Ben-Hamida, Khaled Saab 0001, David Marche, Bozena Kaminska |
A perturbation based fault modeling and simulation for mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 182-187, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
analog circuit fault simulation, perturbation fault model, fault abstraction, structural fault modeling, perturbation estimation, fault observation, hierarchical analog fault simulator, complexity, test generation, CMOS, mixed-signal circuits, mixed analogue-digital integrated circuits, functional fault modeling, physical defects |
27 | Naim Ben-Hamida, Bechir Ayari, Bozena Kaminska |
Testing of embedded A/D converters in mixed-signal circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 135-136, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
embedded A/D converters testing, integral nonlinearity error, differential nonlinearity error, offset error, gain error, boolean function manipulation, FFT, histogram, functional testing, transfer function, digital circuit, signal-to-noise ratio, mixed-signal circuit, analogue-digital conversion |
27 | Karim Arabi, Bozena Kaminska |
Oscillation-test strategy for analog and mixed-signal integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 476-482, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
circuit oscillations, oscillation test strategy, analog ICs, low-cost test method, oscillation frequency deviation, wafer-probe testing, final production testing, ASIC testing, integrated circuit testing, operational amplifiers, analogue integrated circuits, mixed analogue-digital integrated circuits, production testing, analogue-digital conversion, mixed-signal ICs |
27 | Mitra Mirhassani |
Mixed-signal CVNS adder for two-operand binary addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EIT ![In: 2009 IEEE International Conference on Electro/Information Technology, EIT 2009, Windsor, Ontario, Canada, June 7-9, 2009, pp. 226-229, 2009, IEEE, 978-1-4244-3355-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Le Jin, Chengming He, Degang Chen 0001, Randall L. Geiger |
An SoC compatible linearity test approach for precision ADCs using easy-to-generate sinusoidal stimuli. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 928-931, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Hak-soo Yu, Hongjoong Shin, Ji Hwan (Paul) Chun, Jacob A. Abraham |
Performance Characterization of Mixed-Signal Circuits Using a Ternary Signal Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1389-1397, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
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