Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
25 | Suet Fong Tin, Ashraf A. Osman, Kartikeya Mayaram |
Comments on "A small-signal MOSFET model for radio frequency IC applications". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(4), pp. 372-374, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
25 | Xinghai Tang, Vivek De, James D. Meindl |
Intrinsic MOSFET parameter fluctuations due to random dopant placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 5(4), pp. 369-376, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Ming-Jer Chen, Jib-Shin Ho |
A three-parameters-only MOSFET subthreshold current CAD model considering back-gate bias and process variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(4), pp. 343-352, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Mitiko Miura-Mattausch, Ute Feldmann, Alexander Rahm, Michael Bollu, Dominique Savignac |
Unified complete MOSFET model for analysis of digital and analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(1), pp. 1-7, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
25 | Abhijit Chatterjee, Charles F. Machala III, Ping Yang 0001 |
A submicron DC MOSFET model for simulation of analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(10), pp. 1193-1207, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
25 | Mark G. Graham, John J. Paulos, Douglas W. Nychka |
Template-based MOSFET device model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(8), pp. 924-933, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
25 | Rupert Howes, William Redman-White, Ken G. Nichols, Peter J. Mole, Michael J. Robinson, Simon Bird |
An SOS MOSFET model based on calculation of the surface potential. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(4), pp. 494-506, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
25 | Mitiko Miura-Mattausch, Ute Feldmann, Alexander Rahm, Michael Bollu, Dominique Savignac |
Unified complete MOSFET model for analysis of digital and analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 264-267, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
25 | Yu Hen Hu, ShaoWei Pan |
SaPOSM: an optimization method applied to parameter extraction of MOSFET models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10), pp. 1481-1487, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
25 | Victor Martin Agostinelli Jr., Gregory Munson Yeric, A. F. Tasch Jr. |
Universal MOSFET hole mobility degradation models for circuit simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(3), pp. 439-445, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
25 | Hiroyoshi Tanimoto, Naoyuki Shigyo |
Discretization error in MOSFET device simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(7), pp. 921-925, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
25 | James A. Power, W. A. Lane |
An enhanced SPICE MOSFET model suitable for analog applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(11), pp. 1418-1425, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
25 | Hong June Park, Ping Keung Ko, Chenming Hu |
A non-quasi-static MOSFET model for SPICE-AC analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(10), pp. 1247-1257, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
25 | A. R. Boothroyd, Stan W. Tarasewicz, Cezary Slaby |
MISNAN-a physically based continuous MOSFET model for CAD applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(12), pp. 1512-1529, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
25 | Martin Thurner, Philipp Lindorfer, Siegfried Selberherr |
Numerical treatment of nonrectangular field-oxide for 3-D MOSFET simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(11), pp. 1189-1197, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
25 | Lee-Sup Kim, Robert W. Dutton |
Modeling of the distributed gate RC effect in MOSFET's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(12), pp. 1365-1367, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
25 | Jerry G. Fossum, Surya Veeraraghavan, Dan Fitzpatrick |
Model selection for SOI MOSFET circuit simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(4), pp. 541-544, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
22 | Giovanni Stracquadanio, Concetta Drago, Vittorio Romano, Giuseppe Nicosia |
Multi-objective optimization of doping profile in semiconductor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 1243-1250, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
semiconductor design, multi-objective optimization, electronic design automation |
22 | Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya |
A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 95-96, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Samed Maltabas, Martin Margala, Ugur Çilingiroglu |
Varicap threshold logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 239-244, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
minnick tl network, variable capacitance, threshold logic, parallel counter |
22 | Mian Dong, Lin Zhong 0001 |
Logic Synthesis with Nanowire Crossbar: Reality Check and Standard Cell-based Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 268-271, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Jader A. De Lima, Wallace A. Pimenta |
A current limiter for DC/DC regulators with internal compensation for process and temperature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008, pp. 94-99, 2008, ACM, 978-1-60558-231-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
DC/DC converter, LDO, PVT compensation, current limitation, switcher |
22 | Hamilton Klimach, Márcio C. Schneider, Carlos Galup-Montoro |
An M-2M digital-to-analog converter design methodology based on a physical mismatch model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2254-2257, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Jader A. De Lima, Wallace A. Pimenta |
A current limiter for LDO regulators with internal compensation for process and temperature variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2238-2241, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei |
A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 331-336, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Hsiao-Chun Wu, Sameer R. Herlekar, M. Saquib, Ashok Srivastava |
Hot Carrier Effects in Wireless Communication Systems Built on Short-Channel MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 6(7), pp. 2402-2406, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Bipul C. Paul, Shinobu Fujita, Masaki Okajima, Thomas Lee |
Prospect of ballistic CNFET in high performance applications: Modeling and analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 3(3), pp. 12, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Ballistic carbon nanotube FET (CNFET), circuit compatible model, parasitic capacitance, process variability, circuit performance |
22 | Il Song Han |
Membership Function Circuit for Neural/Fuzzy Hardware of Analog-Mixed Operation Based on the Programmable Conductance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FUZZ-IEEE ![In: FUZZ-IEEE 2007, IEEE International Conference on Fuzzy Systems, Imperial College, London, UK, 23-26 July, 2007, Proceedings, pp. 1-4, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Reza Navid, Thomas H. Lee, Robert W. Dutton |
A Circuit-Based Noise Parameter Extraction Technique for MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3347-3350, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Erik J. Mentze, Herbert L. Hess, Kevin M. Buck, T. G. Windley |
A Scalable High-Voltage Output Driver for Low-Voltage CMOS Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(12), pp. 1347-1353, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Mutlu Avci, Tülay Yildirim |
Neural Network Based MOS Transistor Geometry Decision for TSMC 0.18µ Process Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (4) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part IV, pp. 615-622, 2006, Springer, 3-540-34385-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Shih-Ching Lo, Shao-Ming Yu |
A Quantum Hydrodynamic Simulation of Strained Nanoscale VLSI Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (1) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part I, pp. 1038-1042, 2006, Springer, 3-540-34379-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Arijit Raychowdhury, Xuanyao Fong, Qikai Chen, Kaushik Roy 0001 |
Analysis of super cut-off transistors for ultralow power digital logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 2-7, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
carbon nanotube FETs, tunneling transistors |
22 | Nasser Talebbeydokhti, Pavan Kumar Hanumolu, Peter Kurahashi, Un-Ku Moon |
Constant transconductance bias circuit with an on-chip resistor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Yajie Chen, Steve Hall, Liam McDaid, Octavian Buiu, Peter M. Kelly |
On the Design of a Low Power Compact Spiking Neuron Cell Based on Charge-Coupled Synapses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN ![In: Proceedings of the International Joint Conference on Neural Networks, IJCNN 2006, part of the IEEE World Congress on Computational Intelligence, WCCI 2006, Vancouver, BC, Canada, 16-21 July 2006, pp. 1511-1517, 2006, IEEE, 0-7803-9490-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Victor Bourenkov, Kevin G. McCarthy, Alan Mathewson |
MOS table models for circuit simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3), pp. 352-362, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Gerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda |
Energy optimization of tapered buffers for CMOS on-chip switching power converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4453-4456, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Jin He 0003, Jane Xi, Mansun Chan, Hui Wan 0003, Mohan V. Dunga, Babak Heydari, Ali M. Niknejad, Chenming Hu |
Charge-Based Core and the Model Architecture of BSIM5. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 96-101, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Yanjie Wang, Yanbin Wang, Garry Tarr, Kris Iniewski |
A Temperature, Supply Voltage Compensated Floating-Gate MOS Dosimeter Using V_TH Extractor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 176-179, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Shanthi Pavan |
A fixed transconductance bias technique for CMOS analog integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 661-664, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
22 | Ram Suryanarayan, Anubhav Gupta, Travis N. Blalock |
A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 273-276, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
opamp, feedback, CMOS, compensation, operational amplifier, slew rate |
22 | J. Veerendra Kumar, K. Radhakrishna Rao |
A Low-Voltage Low Power CMOS Companding Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 309-314, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
22 | Sunay Shah, Steve Collins |
A temperature independent trimmable current source. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 713-716, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Volney C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider |
A low-voltage CMOS class-AB operational amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 603-606, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Azeez J. Bhavnagarwala, Blanca Austin, Keith A. Bowman, James D. Meindl |
A minimum total power methodology for projecting limits on CMOS GSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(3), pp. 235-251, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
22 | Hongchin Lin, Kai-Hsun Chang, Shyh-Chyi Wong |
Novel high positive and negative pumping circuits for low supply voltage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 238-241, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Hanspeter Schmid, George S. Moschytz |
A tunable, video-frequency, low-power, single-amplifier biquadratic filter in CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 128-131, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | James D. Meindl |
XXI Century Gigascale Integration (GSI) : The Interconnect Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 18th Conference on Advanced Research in VLSI (ARVLSI '99), 21-24 March 1999, Atlanta, GA, USA, pp. 88-, 1999, IEEE Computer Society, 0-7695-0056-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Abdolreza Nabavi-Lishi, Nicholas C. Rumin |
Inverter models of CMOS gates for supply current and delay evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(10), pp. 1271-1279, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
22 | Masayoshi Shirahata, Hiromi Kusano, Norihiko Kotani, Shigeru Kusanoki, Yoichi Akasaka |
A mobility model including the screening effect in MOS inversion layer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(9), pp. 1114-1119, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
22 | Hiroo Masuda, Jun'ichi Mano, Ryuichi Ikematsu, Hitoshi Sugihara, Yukio Aoki |
A submicrometer MOS transistor I-V model for circuit simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(2), pp. 161-170, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
22 | Chang G. Hwang, Robert W. Dutton |
Improved physical modeling of submicron MOSFETs based on parameter extraction using 2-D simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(4), pp. 370-379, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
22 | Alessandro Forghieri, Roberto Guerrieri, Paolo Ciampolini, Antonio Gnudi, Massimo Rudan, Giorgio Baccarani |
A new discretization strategy of the semiconductor equations comprising momentum and energy balance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(2), pp. 231-242, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
21 | Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov |
Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 27(2), pp. 26-35, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
statistical variability, statistical compact modeling, design and test, MOSFET, mismatch |
21 | Tuck-Boon Chan, Rani S. Ghaida, Puneet Gupta 0001 |
Electrical Modeling of Lithographic Imperfections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010, pp. 423-428, 2010, IEEE Computer Society, 978-0-7695-3928-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
lithographic imperfections, non-rectangular, transistor, mosfet |
21 | Subhas Chandra Mukhopadhyay, Gourab Sen Gupta, Ray Yueh-Min Huang |
A Combined Platform of Wireless Sensors and Actuators Based on Embedded Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SUTC ![In: IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC 2008), 11-13 June 2008, Taichung, Taiwan, pp. 470-474, 2008, IEEE Computer Society, 978-0-7695-3158-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Wireless sensors and actuators, Fireworks, Embedded Microcontroller, Detonation, Electric-Match, Wireless, MOSFET |
21 | Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun |
Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 305-310, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
static noise margin distribution, robust operation, active power, standby power distribution, double gate MOSFET, process variations, Cache memory |
21 | Alessandro Girardi, Fernando da Rocha Paixão Cortes, Eduardo Conrad Jr., Sergio Bampi |
T-shaped association of transistors: modeling of multiple channel lengths and regular associations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2005, Florianolpolis, Brazil, September 4-7, 2005, pp. 21-26, 2005, ACM. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
associations of transistors, modeling, analog design, MOSFET |
21 | Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider |
An ultra-low-power self-biased current reference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 147-150, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
inversion level, self-cascode MOSFET, design methodology, low-voltage, ultra-low-power, current reference |
21 | Hamilton Klimach, Alfredo Arnaud, Márcio C. Schneider, Carlos Galup-Montoro |
Characterization of MOS transistor current mismatch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 33-38, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
matching, analog design, MOSFET, mismatch, compact models |
21 | Keunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang |
Strained-si devices and circuits for low-power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 180-183, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
band offset, strained-Si MOSFET, mobility, SOI, SiGe |
21 | Christoph Wasshuber |
Recent advances and future prospects in single-electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 274-275, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
random background charge, single-electron logic, SET, MOSFET |
21 | Yiming Li 0005, S. M. Sze, Tien-Sheng Chao |
A Practical Implementation of Parallel Dynamic Load Balancing for Adaptive Computing in VLSI Device Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eng. Comput. ![In: Eng. Comput. 18(2), pp. 124-137, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
DTMOS, Dynamic domain decomposition, Parallel I-V points calculation, VLSI device simulation, Load balancing, MOSFET, Linux cluster |
21 | Kaveh Shakeri, James D. Meindl |
Temperature Variable Supply Voltage for Power Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 25-26 April 2002, Pittsburgh, PA, USA, pp. 71-74, 2002, IEEE Computer Society, 0-7695-1486-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
CMOS, Temperature, Power reduction, Dynamic Power, MOSFET, Static Power |
21 | John P. Denton, Sang Woo Pae, Gerold W. Neudeck |
Vertical integration of submicron MOSFETs in two separate layers of SOI islands formed by silicon epitaxial lateral overgrowth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, West Lafayette, Indiana, USA, 2001, pp. 129-132, 2001, ACM, 1-58113-351-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
SOI MOSFET, selective epitaxial growth, silicon, silicon on insulator, thin film SOI, three dimensional circuits |
21 | Noriaki Muranaka, Shigenobu Arai, Shigeru Imanishi, D. Michael Miller |
A Ternary Systolic Product-Sum Circuit for GF(3m) using Neuron MOSFETs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 26th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings, pp. 92-97, 1996, IEEE Computer Society, 0-8186-7392-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
neuron MOSFET, product sum computation, systolic array, Ternary logic |
14 | Jae-Sub Ko, Cheol Woong Choi, Woongkul Lee, Dae-Kyong Kim |
Novel Phase Shift Angle Compensation Method of DAB Converter Considering Parasitic Capacitance of SiC MOSFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 9138-9150, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Vibhav Pandey, Sougata Nayak, Kamalesh Hatua, Subhashish Bhattacharya |
A PCB-Incorporated Inductor Based Filter Design Solution for Differential Mode Noise of 3-Phase SiC-MOSFET Based VSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 34958-34972, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Haihua Wang, Zekun Zhao, Qiumeng Chen, Yu-Long Jiang, Jing Wan |
Back-Gate Fully Depleted Silicon-on-Insulator P-Channel Schottky Barrier MOSFET With Ultrahigh Voltage Sensitivity for Label-Free Virus RNA Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 73, pp. 1-8, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Mohammad Radpour, Leonid Belostotski |
Induced Back-Gate Noise in FDSOI MOSFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 71(3), pp. 1022-1026, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Lei Zhou, Chune Wang, Xiaozhong Chen |
A GHz-level memristor emulator with only MOSFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 52(3), pp. 1450-1464, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Soomin Kim, Seongjae Cho |
Effects of Misaligned Gate Lapping Over the Channel on Performances of Ultra-Thin Vertical-Pillar MOSFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEIC ![In: International Conference on Electronics, Information, and Communication, ICEIC 2024, Taipei, Taiwan, January 28-31, 2024, pp. 1-2, 2024, IEEE, 979-8-3503-7188-8. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Victor R. R. de Oliveira, Mirella M. de O. Carneiro, Carlos Fernando T. Soares, Fernanda D. V. R. Oliveira, José Gabriel R. C. Gomes |
MOSFET-C Filter Design using Genetic Algorithm with Restricted Mutation for Gate Multiplicity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 15th IEEE Latin America Symposium on Circuits and Systems, LASCAS 2024, Punta del Este, Uruguay, February 27 - March 1, 2024, pp. 1-5, 2024, IEEE, 979-8-3503-8122-1. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Monika Kumari, Manodipan Sahoo |
Sensitivity Enhancement of TMD MOSFET-Based Biosensor by Modeling and Optimization of Back Gate Parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 13-18, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Alba Ordonez Rodriguez, Fabien Gilibert, Francois Paolini, Pascal Urard, Roberto Guizzetti, John Samuel 0003, Remy Cellier, Lioua Labrak, Bastien Deveautour |
Artificial neural network-based solution for PSP MOSFET model card extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 6-12, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Xin Lei, Xingguo Gao, Jun Deng, Zhou Shu, Fang Tang |
A 15-V Tolerant and Radiation-Hardened MOSFET Driver With Positive and Negative References. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Aerosp. Electron. Syst. ![In: IEEE Trans. Aerosp. Electron. Syst. 59(2), pp. 851-857, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Elliot O. Omoru, Viranjay M. Srivastava |
Switching Speed Analysis of MOSFET-Based Absorber Integrated Antenna for 5G/WiMAX/WLAN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Commun. ![In: J. Commun. 18(5), pp. 274-282, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Sneha Narasimhan, Ajit Kanale, Subhashish Bhattacharya, B. Jayant Baliga |
Performance Evaluation of 3.3 kV SiC MOSFET and Schottky Diode Based Reverse Voltage Blocking Switch for Medium Voltage Current Source Inverter Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 89277-89289, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Nishant Anurag, Shabari Nath |
Switching Investigation of SiC MOSFET Based 4-Quadrant Switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 1094-1103, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Yufang Lu, Jiecheng Ai, Luyang Wei, Kai Meng, Chengfu Han |
A Novel Current Limiting Protection Control Strategy by Power MOSFET Thermal Management for Solid-State Power Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 104955-104965, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel |
Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 39650, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Karimeldeen Mohamed, Khaled Y. Yasseen, Boris Murmann, Hesham Omran |
Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 41205-41217, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Nilesh Kumar Jaiswal, V. N. Ramakrishnan |
An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 46998-47006, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Hiroshi Oka, Takumi Inaba, Shunsuke Shitakata, Kimihiko Kato, Shota Iizuka, Hidehiro Asai, Hiroshi Fuketa, Takahiro Mori |
Origin of Low-Frequency Noise in Si n-MOSFET at Cryogenic Temperatures: The Effect of Interface Quality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 121567-121573, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Donglin Xu, Ming Yang 0006, Kaiyuan Hu, Dianguo Xu 0001 |
A Transistor-Based Assist Gate Driver of SiC MOSFET for Crosstalk Suppression in a Phase-Leg Configuration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 91247-91259, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Yusuke Kikuchi, Jun Matsusue, Fuma Yamada, Takafumi Okuda, Takashi Nakamura |
Repetitive Partial Discharge Phenomena on Electrical Motor Coil Windings Under High-Repetition Nanosecond Pulsed Voltages Driven by SiC MOSFET Inverter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 68826-68835, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Haiguo Li, Zihan Gao, Fei Wang 0045, Yiwei Ma, Yu Su, Dingrui Li, Pengfei Yao, Shiqi Ji, Zhe Yang, Ruirui Chen 0003 |
Design, Development, and Testing of a Flexible Combined Heat and Power (F-CHP) System With 10-kV SiC MOSFET-Based Power Conditioning System (PCS) Converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 134769-134793, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Fatma A. Khera, Serhiy Bozhko, Pat Wheeler |
Design Analysis of SiC-MOSFET Based Bidirectional SSPC for Aircraft High Voltage DC Distribution Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 113900-113912, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Jacek Rabkowski, Mariusz Zdanowski, Rafal Kopacz, Fernando Gonzalez-Hernando, Irma Villar, Uxue Larrañaga |
From the Measurement of COSS-VDS Characteristic to the Estimation of the Channel Current in Medium Voltage SiC MOSFET Power Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 72, pp. 1-10, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Hocine Boulharts, Rudolf Fehringer, David Lechat |
Active dv/dt filter with SiC MOSFET - interlock-delay effect on the overvoltage at motor terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Elektrotech. Informationstechnik ![In: Elektrotech. Informationstechnik 140(1), pp. 66-81, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Jianwen Cao, Ze-kun Zhou, Yue Shi 0001, Bo Zhang 0027 |
On-Chip Active Turn-Off Driving Technique to Prevent Channel Current From Disappearing Prematurely in SiC MOSFET's Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(2), pp. 660-664, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Valentyn Solomko, Semen Syroiezhin, Robert Weigel |
High-Voltage Analog Switch Inspired by Stacked MOSFET-Based RF Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(11), pp. 4008-4012, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Faisal Bashir, Furqan Zahoor, Ali S. Alzahrani, Abdul Raouf Khan |
A Single Schottky Barrier MOSFET-Based Leaky Integrate and Fire Neuron for Neuromorphic Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(11), pp. 4018-4022, November 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Jongmin Park, Young Kim, Yosep Cho, Jinwook Burm |
Multi-Stage Reconfigurable RF-DC Converter With Deep-n-Well Biasing Using Body-Isolated MOSFET in 180-nm BCDMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(10), pp. 3817-3821, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Hasan Serdar |
MOSFET-C Shadow Filters Based on FDCCII for Cognitive Communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 32(8), pp. 2350137:1-2350137:14, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | JiaHao Wei, Haihua Wang, Tian Zhao, Yu-Long Jiang, Jing Wan |
A New Compact MOSFET Model Based on Artificial Neural Network With Unique Data Preprocessing and Sampling Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4), pp. 1250-1254, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Kun Wu, Nanlin Guo, Fei Li, Nengyong Zhu, Jun Tao 0001, Xin Li 0001 |
Efficient Statistical Parameter Extraction for Modeling MOSFET Mismatch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5), pp. 1618-1622, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Girish Pahwa, Ayushi Sharma, Ravi Goel, Garima Gill, Harshit Agarwal, Yogesh Singh Chauhan, Chenming Hu |
Robust Compact Model of High-Voltage MOSFET's Drift Region. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1), pp. 337-340, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Madan Mohan Tripathi, Ajay Kumar 0004 |
Small-Signal Modeling of GaN-BTG MOSFET for Wireless Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 132(3), pp. 2243-2253, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Roshan Sharma, Akash Patnaik, Pankaj Sharma |
Impact of doping concentration and recess depth to achieve enhancement mode operation in β-Ga2O3 MOSFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 135, pp. 105755, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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