Search results for "semiconductor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
25	Ivo Schanstra, Dharmajaya Lukita, Ad J. van de Goor, Kees Veelenturf, Paul J. van Wijnen	Semiconductor manufacturing process monitoring using built-in self-test for embedded memories.	ITC	1998	DBLP DOI BibTeX RDF	diagnosis, BIST, fault localization, process monitoring, bitmap, RAM testing, microcode
25	Ali Bouaricha, Stephan Mueller	A Portable Parallel Implementation of a 3D Semiconductor Device Simulator.	Euro-Par	1997	DBLP DOI BibTeX RDF
25	Mounir Hahad	A Parallel Sparse LU Decomposition with Application to Semiconductor Device Simulation.	Euro-Par	1997	DBLP DOI BibTeX RDF
25	Jacco L. Pleumeekers, Claude M. Simon, Serge Mottet	Investigation into the properties of the explicit method for the resolution of the semiconductor device equations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
25	Bruce F. Cockburn	Tutorial on semiconductor memory testing.	J. Electron. Test.	1994	DBLP DOI BibTeX RDF	Design for testability, fault models, functional test, memory testing, memory design
25	Shan-Ping Chin, Ching-Yuan Wu	A new methodology for two-dimensional numerical simulation of semiconductor devices.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1992	DBLP DOI BibTeX RDF
25	Duane S. Boning, Michael L. Heytens, Alexander S. Wong	The intertool profile interchange format: an object-oriented approach [semiconductor technology CAD/CAM].	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
25	Janet L. Murdock, Barbara Hayes-Roth	Intelligent Monitoring and Control of Semiconductor Manufacturing Equipment.	IEEE Expert	1991	DBLP DOI BibTeX RDF
25	Valery Axelrad	Fourier method modeling of semiconductor devices.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
25	Gen-Lin Tan, Xiao-Li Yuan, Qi-Ming Zhang, Walter H. Ku, An-Jui Shey	Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
23	Francis G. McCabe	Real-time event processing for high volume applications using StarRulesTM.	DEBS	2009	DBLP DOI BibTeX RDF	parallel programming, agents, functional programming, fault detection, event calculus, agent oriented programming, semiconductor manufacturing
23	Jagadish Jampani, Scott J. Mason	Column generation heuristics for multiple machine, multiple orders per job scheduling problems.	Ann. Oper. Res.	2008	DBLP DOI BibTeX RDF	Column generation, Semiconductor manufacturing, Machine scheduling
23	Victor V. Zhirnov, Ralph K. Cavin III, Greg Leeming, Kosmas Galatsis	An Assessment of Integrated Digital Cellular Automata Architectures.	Computer	2008	DBLP DOI BibTeX RDF	semiconductor technology, cellular automata, nanotechnology
23	Richard H. Stern	West Coast Federal Appeals Court Upholds Chip Protection Act Violation Finding.	IEEE Micro	2007	DBLP DOI BibTeX RDF	antitrust violation, Semiconductor Chip Protection Act, chip piracy, monopoly, Altera, Clear Logic, reverse engineering, ASICs, law, bitstream
23	Federico Di Palma, Giuseppe De Nicolao, Guido Miraglia, Oliver M. Donzelli	ACID: Automatic Sort-Map Classification for Interactive Process Diagnosis.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	AC/ID methodology, electrical sort test, commonality analysis, pattern recognition, fault diagnosis, statistical methods, semiconductor manufacturing
23	Jens Zimmermann, Lars Mönch	Design and Implementation of Adaptive Agents for Complex Manufacturing Systems.	HoloMAS	2007	DBLP DOI BibTeX RDF	Agent-based Production Control, Adaptability, Architecture, Semiconductor Manufacturing
23	Wangyuan Zhang, Xin Fu, Tao Li 0006, José A. B. Fortes	An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures.	ISPASS	2007	DBLP DOI BibTeX RDF	thread-aware reliability optimization, microarchitecture vulnerability, simultaneous multithreaded architecture, semiconductor transient fault, microprocessor reliability, processor throughput, soft error vulnerability analysis, SPEC CPU 2000 benchmark, microarchitecture structure, microarchitecture reliability profile, fetch policy, thread-level parallelism, multithreading architecture
23	Weichung Wang, Tsung-Min Hwang	Numerical Simulation of Three-Dimensional Vertically Aligned Quantum Dot Array.	International Conference on Computational Science (3)	2005	DBLP DOI BibTeX RDF	Semiconductor quantum dot array, the Schrödinger equation, energy levels, numerical simulation, wave function
23	Appa Iyer Sivakumar, Chin Soon Chong	Development of an Object Oriented Simulation Engine for On-Line Simulation and Optimization.	Annual Simulation Symposium	2000	DBLP DOI BibTeX RDF	semiconductor backend test manufacturing, dynamic scheduling, schedule optimization, On-line simulation
23	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu	Simulation-Based Test Algorithm Generation for Random Access Memories.	VTS	2000	DBLP DOI BibTeX RDF	RAM fault simulation, March test algorithm, Cocktail-March test algorithms, semiconductor memories, RAM testing
23	Stephen John Turner, Wentong Cai 0001, Boon-Ping Gan	Adapting a Supply-Chain Simulation for HLA.	DS-RT	2000	DBLP DOI BibTeX RDF	Supply-chain Simulation, Sematech Modeling Data Standard (MDS), High Level Architecture (HLA), Run-Time Infrastructure (RTI), Semiconductor Manufacturing
23	Amir A. Khwaja	Enhancing extensibility of the design rule checker of an EDA tool by object-oriented modeling.	COMPSAC	1997	DBLP DOI BibTeX RDF	design rule checker, design rule checking systems, electronic design automation tools, semiconductor technology, DRC systems, DRC module, IC package design tool, object oriented modeling technique, abstraction, inheritance, extensibility, object oriented modeling, encapsulation, circuit CAD, dynamic binding, EDA tool
23	Gerhard P. Fettweis	Design methodology for digital signal processing.	ASAP	1997	DBLP DOI BibTeX RDF	semiconductor integration density, architecture heterogeneity, hardwired digital circuits, software programmed signal processors, flexibly mapping, system simulation tools, system design, signal processing, digital signal processing, design methodology, data transfer, data manipulation
23	Andy Negoi, Alain Guyot, Jacques Zimmermann	A dedicated circuit for charged particles simulation using the Monte Carlo method.	ASAP	1997	DBLP DOI BibTeX RDF	dedicated circuit, charged particles simulation, dedicated integrated circuit, integro-differential Boltzmann equation, direct statistical computation, simulated particles distribution function, semiconductor device hardware simulator, microdynamical transport, Boltzmann equation, binary format, drift velocity, static uniform electric field, hot carrier effects, computational complexity, Monte Carlo method
23	Kenneth Fordyce, Gerald Gary Sullivan	Deploying Complex Decision Technologies with APL to Solve the Daily Output Planning Problem: A Tale from Two of the Last of the Jedi Knights.	APL	1995	DBLP DOI BibTeX RDF	APL2, daily output planning, micro-electronic chip production, APL, heuristic programming, goal programming, semiconductor manufacturing
23	P. R. Kumar 0001	Re-entrant lines.	Queueing Syst. Theory Appl.	1993	DBLP DOI BibTeX RDF	thin film lines, re-entrant lines, buffer priority policies, due date policies, variance of delay, machine failures, set-up times, stability, queueing networks, scheduling policies, Manufacturing systems, semiconductor manufacturing, stochastic control, mean delay
23	A. Ravishankar Rao, Ramesh C. Jain	Computerized Flow Field Analysis: Oriented Texture Fields.	IEEE Trans. Pattern Anal. Mach. Intell.	1992	DBLP DOI BibTeX RDF	flow field analysis, oriented texture fields, signal-to-symbol transformation, velocity vector fields, geometric theory, symbol set, phase portraits, symbolic descriptors, flow visualization pictures, semiconductor wafer inspection, optical flow fields, computer vision, computerised picture processing, computerised pattern recognition, computerised pattern recognition, differential equations, differential equations, optical information processing, symbolic representation
22	Anna Katarzyna Piotrowska, Adam Laszcz, Michal Zaborowski, Artur Broda, Dariusz Szmigiel	A New Approach for Sensitive Characterization of Semiconductor Laser Beams Using Metal-Semiconductor Thermocouples.	Sensors	2022	DBLP DOI BibTeX RDF
22	Wu Lu	Ultrawide Bandgap Nitride Semiconductor Heterojunction Field Effect Transistors.	BCICTS	2022	DBLP DOI BibTeX RDF
22	Martin Kuball, James W. Pomeroy, Filip Gucmann, Bahar Oner	Thermal analysis of semiconductor devices and materials - Why should I not trust a thermal simulation ?	BCICTS	2019	DBLP DOI BibTeX RDF
22	Lars Mönch, Reha Uzsoy, John W. Fowler	A survey of semiconductor supply chain models part I: semiconductor supply chains, strategic network design, and supply chain simulation.	Int. J. Prod. Res.	2018	DBLP DOI BibTeX RDF
22	Junghoon Kim, Gwangjae Yu, Young Jae Jang	Semiconductor FAB layout design analysis with 300-mm FAB data: "Is minimum distance-based layout design best for semiconductor FAB design?".	Comput. Ind. Eng.	2016	DBLP DOI BibTeX RDF
22	Amnon Yariv	Rethinking and redesigning the semiconductor laser/quantum noise controlled semiconductor lasers.	OFC	2016	DBLP BibTeX RDF
22	Olof Engström, Henryk M. Przewlocki, Ivona Z. Mitrovic, Stephen Hall	Internal photoemission technique for high-k oxide/semiconductor band offset determination: The influence of semiconductor bulk properties.	ESSDERC	2014	DBLP DOI BibTeX RDF
22	Kiyoshi Asakawa, Yoshimasa Sugimoto, Naoki Ikeda, Daiju Tsuya, Yasuo Koide, Yoshinori Watanabe, Nobuhiko Ozaki, Shunsuke Ohkouchi, Tsuyoshi Nomura, Daisuke Inoue, Takayuki Matsui, Atsushi Miura, Hisayoshi Fujikawa, Kazuo Sato	Nanophotonics Based on Semiconductor-Photonic Crystal/Quantum Dot and Metal-/Semiconductor-Plasmonics.	IEICE Trans. Electron.	2012	DBLP DOI BibTeX RDF
22	Richard Wood, Ian C. Bruce, Peter Mascher	Modeling of Spiking Analog Neural Circuits with Hebbian Learning, Using Amorphous Semiconductor Thin Film Transistors with Silicon Oxide Nitride Semiconductor Split Gates.	ICANN (1)	2012	DBLP DOI BibTeX RDF
22	Yoshihiro Irokawa	Hydrogen Sensors Using Nitride-Based Semiconductor Diodes: The Role of Metal/Semiconductor Interfaces.	Sensors	2011	DBLP DOI BibTeX RDF
22	Jonathan Yung-Cheng Chang, Fan-Tien Cheng, Tsung-Li Wang	Novel Semiconductor Business Model - Engineering Chain for the Semiconductor Industry.	ICRA	2007	DBLP DOI BibTeX RDF
22	Fu-Chien Chiu, Shun-An Lin, Joseph Ya-min Lee	Electrical properties of metal-HfO2-silicon system measured from metal-insulator-semiconductor capacitors and metal-insulator-semiconductor field-effect transistors using HfO2 gate dielectric.	Microelectron. Reliab.	2005	DBLP DOI BibTeX RDF
22	Juergen Potoradi, Ong Siong Boon, Scott J. Mason, John W. Fowler, Michele E. Pfund	Semiconductor manufacturing: using simulation-based scheduling to maximize demand fulfillment in a semiconductor assembly facility.	WSC	2002	DBLP DOI BibTeX RDF
22	Naoki Harada, Akira Watanabe, Yuji Awano, Kohki Hikosaka, Naoki Yokoyama	A multigigahertz Josephson-semiconductor interface circuit using 77-K differential monolithic HEMT amplifier and 4.2-K JJ high-voltage driver for superconductor-semiconductor electronic hybrid systems.	IEEE J. Solid State Circuits	2000	DBLP DOI BibTeX RDF
21	Joseph Nayfach-Battilana, Jose Renau	SOI, interconnect, package, and mainboard thermal characterization.	ISLPED	2009	DBLP DOI BibTeX RDF	SOI modeling, package modeling, thermal modeling, interconnect modeling
21	Huy Nguyen Anh Pham, Arthur M. D. Shr, Peter P. Chen, Alan Liu	Scheduling for Dedicated Machine Constraint Using Integer Programming.	ICTAI (1)	2008	DBLP DOI BibTeX RDF
21	Sung Ho Ha, Jong Sik Jin, Jeong Won Yang	Predictive Performance of Clustered Feature-Weighting Case-Based Reasoning.	ADMA	2008	DBLP DOI BibTeX RDF
21	Francine Bacchini, Gregory S. Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada	Megatrends and EDA 2017.	DAC	2007	DBLP BibTeX RDF
21		4G applications, architectures, design methodology and tools for MPSoC.	DATE	2006	DBLP DOI BibTeX RDF
21	Satoru Ito	Challenging device innovation.	ASP-DAC	2006	DBLP DOI BibTeX RDF
21	Mohamed Azimane	High-Quality Memory Test.	MTDT	2006	DBLP DOI BibTeX RDF
21	Xin Jiang	Efficient Spin Injection using Tunnel Injectors.	ICMENS	2005	DBLP DOI BibTeX RDF
21	Silvello Betti, E. Bravi, M. Giaconi	Comparison between Optical SCM Systems for Multimedia Applications.	EUROMICRO	1998	DBLP DOI BibTeX RDF
21	Kris Gaj, Eby G. Friedman, Marc J. Feldman	Timing of Multi-Gigahertz Rapid Single Flux Quantum Digital Circuits.	J. VLSI Signal Process.	1997	DBLP DOI BibTeX RDF
21	Erhard Rahm	Performance Evaluation of Extended Storage Architectures for Transaction Processing.	SIGMOD Conference	1992	DBLP DOI BibTeX RDF
18	Peter Gritzmann, Michael Ritter, Paul Zuber	Optimal wire ordering and spacing in low power semiconductor design.	Math. Program.	2010	DBLP DOI BibTeX RDF	Mathematics Subject Classification (2000) 90C27, 90C25, 90C90
18	Tae-Eog Lee	Semiconductor Manufacturing Automation.	Handbook of Automation	2009	DBLP DOI BibTeX RDF
18	Christian Sassenberg, Christian Weber 0003, Madjid Fathi, Ralf Montino	A Data Mining based Knowledge Management approach for the semiconductor industry.	EIT	2009	DBLP DOI BibTeX RDF
18	Hunszu Liu	Effects of Gender Difference on Emergency Operation Interface Design in Semiconductor Industry.	HCI (1)	2009	DBLP DOI BibTeX RDF	User interface design, human performance, gender differences, emergency management
18	Youngshin Han, Chilgee Lee, Jason J. Jung	Redundancy analysis simulation in semiconductor manufacturing for yield improvement.	SpringSim	2009	DBLP DOI BibTeX RDF	EDS, fail bit map, redundancy analysis simulation, correlation
18	Norma Alias, Roziha Darwis, Noriza Satam, Mohamed Othman	Parallelization of Temperature Distribution Simulations for Semiconductor and Polymer Composite Material on Distributed Memory Architecture.	PaCT	2009	DBLP DOI BibTeX RDF	Red-Black Gauss Seidel (RBGS), Parallel Performance evaluations, Parallel Virtual Machine (PVM)
18	Yu-Cheng Lin, Toly Chen, Kun-Tai Li	Evaluating and Enhancing the Long-Term Competitiveness of a Semiconductor Product.	IEA/AIE	2009	DBLP DOI BibTeX RDF
18	Jeff Welser	The semiconductor industry's nanoelectronics research initiative: motivation and challenges.	DAC	2009	DBLP DOI BibTeX RDF	logic transistors, research consortium, nanoelectronics
18	Fehmi Tanrisever, Erhan Kutanoglu	Forming and scheduling jobs with capacitated containers in semiconductor manufacturing: Single machine problem.	Ann. Oper. Res.	2008	DBLP DOI BibTeX RDF	Job formation, Multi-order jobs, Scheduling, Dynamic programming, Batching
18	William R. Mann	Wafer Test Methods to Improve Semiconductor Die Reliability.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
18	Michele E. Pfund, Hari Balasubramanian, John W. Fowler, Scott J. Mason, Oliver Rose	A multi-criteria approach for scheduling semiconductor wafer fabrication facilities.	J. Sched.	2008	DBLP DOI BibTeX RDF	Shifting bottleneck, Complex job shop, Multicriteria
18	Shi-Chung Chang, Shin-Shyu Su, Ke-Ju Chen	Priority mix planning for cycle time-differentiated semiconductor manufacturing services.	WSC	2008	DBLP DOI BibTeX RDF
18	Kilian Schmidt, Oliver Rose	Simulation analysis of semiconductor manufacturing with small lot size and batch tool replacements.	WSC	2008	DBLP DOI BibTeX RDF
18	Peter C. Bosch, Robert L. Wright	High speed semiconductor fab simulation for large, medium and small lot sizes.	WSC	2008	DBLP DOI BibTeX RDF
18	Jens Zimmermann, Scott J. Mason, John W. Fowler, Lars Mönch	Determining an appropriate number of FOUPs in semiconductor wafer fabrication facilities.	WSC	2008	DBLP DOI BibTeX RDF
18	Jan Lange, Kilian Schmidt, Roy Borner, Oliver Rose	Automated generation and parameterization of throughput models for semiconductor tools.	WSC	2008	DBLP DOI BibTeX RDF
18	Christoph Habla, Lars Mönch	Solving volume and capacity planning problems in semiconductor manufaturing: A computational study.	WSC	2008	DBLP DOI BibTeX RDF
18	June-Young Bang, Jae-Hun Kang, Bong-Kyun Kim, Yeong-Dae Kim	Multi-product lot merging/splitting algorithms for a semiconductor wafer fabrication.	WSC	2008	DBLP DOI BibTeX RDF
18	Dima Nazzal, Andrew L. Johnson, Héctor J. Carlo, Jesus A. Jimenez	An analytical model for conveyor based AMHS in semiconductor wafer fabs.	WSC	2008	DBLP DOI BibTeX RDF
18	Heiko Aydt, Stephen John Turner, Wentong Cai 0001, Malcolm Yoke Hean Low, Peter Lendermann, Boon-Ping Gan	Symbiotic Simulation Control in Semiconductor Manufacturing.	ICCS (3)	2008	DBLP DOI BibTeX RDF
18	Hans-Dieter Wacker, Josef Börcsök, Hartmut Hillmer	Redundant optical data transmission using semiconductor lasers.	AICCSA	2008	DBLP DOI BibTeX RDF
18	Ted Vucurevich	3-D semiconductor's: more from Moore.	DAC	2008	DBLP DOI BibTeX RDF	partitioning, analysis, testability, 3-D integration
18	Jairo Rafael Montoya-Torres	Internal transport in automated semiconductor manufacturing systems.	4OR	2007	DBLP DOI BibTeX RDF	MSC Classification 90C10, 90B06, 90B80, 90C59
18	Da-Yin Liao, MuDer Jeng, MengChu Zhou	Application of Petri Nets and Lagrangian Relaxation to Scheduling Automatic Material-Handling Vehicles in 300-mm Semiconductor Manufacturing.	IEEE Trans. Syst. Man Cybern. Part C	2007	DBLP DOI BibTeX RDF
18	Karthik Sourirajan, Reha Uzsoy	Hybrid decomposition heuristics for solving large-scale scheduling problems in semiconductor wafer fabrication.	J. Sched.	2007	DBLP DOI BibTeX RDF	Shifting bottleneck, Computational evaluation, Job shop scheduling, Maximum lateness
18	Peter J. Byrne	An analysis of semiconductor reticle management using discrete event simulation.	SCSC	2007	DBLP BibTeX RDF	photolithography, reticle management, decision support systems, discrete event simulation
18	Enrico Santi, Liqubf Lu, Zhiyang Chen, Jerry L. Hudgins, H. Alan Mantooth	Simulating power semiconductor devices using variable model levels.	SCSC	2007	DBLP BibTeX RDF	model levels, power semiconductors, power electronics
18	Enrico Santi, Jerry L. Hudgins, H. Alan Mantooth	Variable model levels for power semiconductor devices.	SCSC	2007	DBLP BibTeX RDF
18	Ray Simar	The Changing Impact of Semiconductor Technology on Processor Architecture.	HPCC	2007	DBLP DOI BibTeX RDF
18	Ralph Mueller, Christos Alexopoulos, Leon F. McGinnis	Automatic generation of simulation models for semiconductor manufacturing.	WSC	2007	DBLP DOI BibTeX RDF
18	Oliver Rose	Improved simple simulation models for semiconductor wafer factories.	WSC	2007	DBLP DOI BibTeX RDF
18	Mickaël Bureau, Stéphane Dauzère-Pérès, Claude Yugma, Leon Vermariën, Jean-Bernard Maria	Simulation results and formalism for global-local scheduling in semiconductor manufacturing facilities.	WSC	2007	DBLP DOI BibTeX RDF
18	Nurcin Koyuncu, Seungho Lee, Karthik Vasudevan, Young-Jun Son, Parag Sarfare	DDDAS-based multi-fidelity simulation for online preventive maintenance scheduling in semiconductor supply chain.	WSC	2007	DBLP DOI BibTeX RDF
18	Chao Qi, Appa Iyer Sivakumar, Stanley B. Gershwin	Simulation experimental investigation on job release control in semiconductor wafer fabrication.	WSC	2007	DBLP DOI BibTeX RDF
18	Takahisa Ohno, Takenori Yamamoto, Tatsunobu Kokubo, Akira Azami, Yuta Sakaguchi, Tsuyoshi Uda, Takahiro Yamasaki, Daisuke Fukata, Junichiro Koga	First-principles calculations of large-scale semiconductor systems on the earth simulator.	SC	2007	DBLP DOI BibTeX RDF
18	Scott B. Kuntze, Lacra Pavel, J. Stewart Aitchison	Novel gain control in a multichannel semiconductor optical amplifier with equivalent circuit using nonlinear state-space methods.	BROADNETS	2007	DBLP DOI BibTeX RDF
18	Munkang Choi, Linda S. Milor	Impact on circuit performance of deterministic within-die variation in nanoscale semiconductor manufacturing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
18	Mingang Cheng, Masao Sugi, Jun Ota 0001, Masashi Yamamoto, Hiroki Ito, Kazuyoshi Inoue	Online Rescheduling in Semiconductor Manufacturing.	IROS	2006	DBLP DOI BibTeX RDF
18	Dima Nazzal, Leon F. McGinnis	An analytical model of vehicle-based automated material handling systems in semiconductor fabs.	WSC	2006	DBLP DOI BibTeX RDF
18	Amit Kumar Gupta, Appa Iyer Sivakumar	Pareto control in multi-objective dynamic scheduling of a stepper machine in semiconductor wafer fabrication.	WSC	2006	DBLP DOI BibTeX RDF
18	Chih-Yuan Lu	Non-volatile Semiconductor Memory Technology in Nanotech Era.	MTDT	2006	DBLP DOI BibTeX RDF
18	Yeander Kuan, Yao-Wen Hsueh, Hsin-Chung Lien, Wen-Ping Chen	Integrating Computational Fluid Dynamics and Neural Networks to Predict Temperature Distribution of the Semiconductor Chip with Multi-heat Sources.	ISNN (2)	2006	DBLP DOI BibTeX RDF
18	Dongsik Park, Youngshin Han, Chilgee Lee	Optimization of a Simulation for 300mm FAB Semiconductor Manufacturing.	ICCSA (5)	2006	DBLP DOI BibTeX RDF
18	Toly Chen, Yu-Cheng Lin	A Hybrid and Intelligent System for Predicting Lot Output Time in a Semiconductor Fabrication Factory.	RSCTC	2006	DBLP DOI BibTeX RDF
18	Oliver Rose	Implementation of a Simulation-Based Optimizer for Semiconductor Wafer Factories.	ETFA	2006	DBLP DOI BibTeX RDF
18	Hiroshi Takemiya, Yoshio Tanaka, Satoshi Sekiguchi, Shuji Ogata, Rajiv K. Kalia, Aiichiro Nakano, Priya Vashishta	Grid applications - Sustainable adaptive grid supercomputing: multiscale simulation of semiconductor processing across the pacific.	SC	2006	DBLP DOI BibTeX RDF	grid remote procedure call, message passing interface, molecular dynamics, grid application, quantum mechanics, density functional theory, multiscale simulation
18	Kan-Lin Hsiung	Design of High-Speed Metal-Semiconductor-Metal Photodetectors: An Optimization-Based Approach.	DELTA	2006	DBLP DOI BibTeX RDF
18	Tathagato Rai Dastidar, Partha Ray	A New Device Level Digital Simulator for Simulation and Functional Verification of Large Semiconductor Memories.	VLSI Design	2006	DBLP DOI BibTeX RDF