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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6705 occurrences of 3042 keywords
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Results
Found 11076 publication records. Showing 11076 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 30 | Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |
CYCLONE: automated design and layout of RF LC-oscillators.  |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.  |
2002 |
DBLP DOI BibTeX RDF |
|
| 30 | Lih-Yang Wang, Yen-Tai Lai |
Graph-theory-based simplex algorithm for VLSI layout spacingproblems with multiple variable constraints. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2001 |
DBLP DOI BibTeX RDF |
|
| 30 | Andrew B. Kahng, Shailesh Vaya, Alexander Zelikovsky |
New graph bipartizations for double-exposure, bright field alternating phase-shift mask layout. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 30 | Alex Ramírez, Luiz André Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep Lluís Larriba-Pey, P. Geoffrey Lowney, Mateo Valero |
Code layout optimizations for transaction processing workloads. |
ISCA |
2001 |
DBLP DOI BibTeX RDF |
|
| 30 | Tomoyuki Uchida, Yuko Itokawa, Takayoshi Shoudai, Tetsuhiro Miyahara, Yasuaki Nakamura |
A New Framework for Discovering Knowledge from Two-Dimensional Structured Data Using Layout Formal Graph System. |
ALT |
2000 |
DBLP DOI BibTeX RDF |
|
| 30 | Youcef Bourai, C.-J. Richard Shi |
Symmetry Detection for Automatic Analog-Layout Recycling. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
|
| 30 | Akira Nagao, Isao Shirakawa, Takashi Kambe |
A layout approach to monolithic microwave IC. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
| 30 | Akira Nagao, Takashi Kambe, Isao Shirakawa |
A layout approach to monolithic microwave IC. |
ISPD |
1998 |
DBLP DOI BibTeX RDF |
|
| 30 | Fenghao Mu, Christer Svensson |
Efficient High-Speed CMOS Design by Layout Based Schematic Method. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 30 | Claudio Lourenço da Silva, Ana Cristina Bicharra Garcia |
SpADD: An Active Design Documentation Framework Extension Applied to Spatial Layout Design Problems. |
IBERAMIA |
1998 |
DBLP DOI BibTeX RDF |
|
| 30 | Glenn Franck, Monica Sardesai, Colin Ware |
Layout and structuring object oriented software in three dimensions. |
CASCON |
1995 |
DBLP BibTeX RDF |
|
| 30 | Vijaya Ramachandran |
On driving many long wires in a VLSI layout. |
J. ACM |
1986 |
DBLP DOI BibTeX RDF |
|
| 30 | Kaimin Zhang, Lu Wang 0002, Aimin Pan, Bin Benjamin Zhu |
Smart caching for web browsers. |
WWW |
2010 |
DBLP DOI BibTeX RDF |
caching, web, javascript, browser, css, cascade style sheet |
| 30 | Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi |
Creating an affordable 22nm node using design-lithography co-optimization. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
design technology co-optimization, templates, DFM, regular fabric |
| 30 | Tim Dwyer, Kim Marriott, Michael Wybrow |
Dunnart: A Constraint-Based Network Diagram Authoring Tool. |
GD |
2008 |
DBLP DOI BibTeX RDF |
|
| 30 | Hailong Yao, Subarna Sinha, Charles C. Chiang, Xianlong Hong, Yici Cai |
Efficient process-hotspot detection using range pattern matching. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
|
| 30 | Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu 0001, Alexander Zelikovsky |
Bright-Field AAPSM Conflict Detection and Correction. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 30 | H. Chang, Eugene Shragowitz, Jian Liu, Habib Youssef, Bing Lu, Suphachai Sutanthavibul |
Net criticality revisited: an effective method to improve timing in physical design. |
ISPD |
2002 |
DBLP DOI BibTeX RDF |
criticality metrics, net delay bound, routing, placement |
| 30 | Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé |
Static and Dynamic Locality Optimizations Using Integer Linear Programming. |
IEEE Trans. Parallel Distributed Syst. |
2001 |
DBLP DOI BibTeX RDF |
cache miss estimation, compiler optimizations, integer linear programming, Data reuse, cache locality, memory layouts |
| 30 | Andrew B. Kahng, Gabriel Robins, Anish Singh, Huijuan Wang, Alexander Zelikovsky |
Filling and slotting: analysis and algorithms. |
ISPD |
1998 |
DBLP DOI BibTeX RDF |
|
| 30 | Zinaida V. Apanovich, Alexander G. Marchuk |
Top-Down Approach to Technology Migration for Full-Custom Mask Layouts. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
Technology migration, decomposition, compaction, rerouting |
| 30 | Jon A. Solworth |
GENERIC: a silicon compiler support language. |
DAC |
1986 |
DBLP DOI BibTeX RDF |
|
| 30 | José Monteiro da Mata |
ALLENDE: a procedural language for the hierarchical specification of VLSI layouts. |
DAC |
1985 |
DBLP DOI BibTeX RDF |
|
| 29 | Vida Dujmovic, David R. Wood |
Upward Three-Dimensional Grid Drawings of Graphs. |
Order |
2006 |
DBLP DOI BibTeX RDF |
grid drawing, three dimensional graph drawing, upward drawing, track layout, upward track layout, upward queue layout, strong star colouring, harmonious colouring, graph drawing |
| 29 | Si-Qing Zheng, Joon Shik Lim, S. Sitharama Iyengar |
Routing using implicit connection graphs [VLSI design. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
implicit connection graphs, shortest path related problems, minimum spanning tree problem, sparse strong connection graph, large VLSI design applications, VLSI, graph theory, search problems, circuit layout CAD, VLSI layout, integrated circuit layout, obstacles, search behavior |
| 29 | Hannah Honghua Yang, D. F. Wong 0001 |
New algorithms for min-cut replication in partitioned circuits. |
ICCAD |
1995 |
DBLP DOI BibTeX RDF |
Hyper-MAMC, VLSI circuit partitioning, k-way partition, k-way partitioned digraph, min-cut replication, partitioned circuits, VLSI, optimal algorithm, circuit layout CAD, hypergraphs, VLSI layout, digraphs, circuit layout |
| 29 | Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani, Aman Sureka |
OPRON: a new approach to planar OTC routing. |
Great Lakes Symposium on VLSI |
1995 |
DBLP DOI BibTeX RDF |
OPRON, planar OTC routing, planar over-the-cell routing, VLSI, dynamic programming, network routing, circuit layout CAD, VLSI layout, integrated circuit layout, dynamic programming algorithm |
| 29 | J. T. Mowchenko, Y. Yang |
Optimizing wiring space in slicing floorplans. |
Great Lakes Symposium on VLSI |
1995 |
DBLP DOI BibTeX RDF |
wiring space optimisation, slicing floorplans, net density, sibling rectangles, circuit modules, routed layouts, VLSI, heuristic, network routing, circuit layout CAD, circuit optimisation, integrated circuit layout, branch and bound algorithm, wiring, IC layout |
| 29 | Rajat Kumar Pal, A. K. Datta, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal |
A general graph theoretic framework for multi-layer channel routing. |
VLSI Design |
1995 |
DBLP DOI BibTeX RDF |
graph theoretic framework, multilayer channel routing, track assignment, total wire length minimisation, two-layer VH routing model, three-layer HVH routing model, VLSI, graph theory, heuristics, network routing, circuit layout CAD, minimisation, VLSI layout, integrated circuit layout |
| 29 | Rajat Kumar Pal, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal |
Computing area and wire length efficient routes for channels. |
VLSI Design |
1995 |
DBLP DOI BibTeX RDF |
area efficient routes, wire length efficient routes, total wire length reduction, multilayer routing solutions, computational complexity, VLSI, NP-hard, polynomial time algorithms, network routing, circuit layout CAD, minimisation, VLSI layout, integrated circuit layout, channel routing |
| 29 | Evan Schrier, Mira Dontcheva, Charles E. Jacobs, Geraldine Wade, David Salesin |
Adaptive layout for dynamically aggregated documents. |
IUI |
2008 |
DBLP DOI BibTeX RDF |
grid-based layout, XML, constraints, PDF, CSS, XSL, adaptive layout |
| 29 | Martin L. Brady, Majid Sarrafzadeh |
Stretching a Knock-Knee Layout for Multilayer Wiring. |
IEEE Trans. Computers |
1990 |
DBLP DOI BibTeX RDF |
knock-knee layout stretching, multilayer wiring, knock-knee mode, 4/3 approximation algorithm, VLSI, VLSI, NP-complete, optimal algorithm, circuit layout CAD |
| 29 | Ghislaine Thuau, Gabriele Saucier |
Optimized Layout of MOS Cells. |
IEEE Trans. Computers |
1988 |
DBLP DOI BibTeX RDF |
optimised MOS cell layout, optimized topological arrangements, minimized Boolean function, well-structured network, transistor merging procedure, nonseries-parallel network, logic design, circuit layout CAD, minimisation of switching nets, logical optimization, field effect integrated circuits |
| 28 | Anirudh Devgan, Bulent Basaran, David Colleran, Mar Hershenson |
Accelerated design of analog, mixed-signal circuits in Titan. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
analog circuit layout, analog/digital, custom design, layout, physical design, analog circuits, mixed-signal circuits |
| 28 | Sherif Hammouda, Hazem Said, Mohamed Dessouky, Mohamed Tawfik, Quang Nguyen, Wael M. Badawy, Hazem M. Abbas, Hussein I. Shahein |
Chameleon ART: a non-optimization based analog design migration framework. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
analog reuse, design extraction, layout compaction, layout retargeting, circuit sizing |
| 28 | Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez |
A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Gallium Arsenide automated layout generation system, GaAs VLSI design, power supply and ground distribution model, full-custom cell layout style, full-custom layouts of very high speed circuits, cell library builder, random logic macrocell generator, iterative logic array generator |
| 28 | Gerard A. Allan, Anthony J. Walton |
Efficient critical area estimation for arbitrary defect shapes. |
DFT |
1997 |
DBLP DOI BibTeX RDF |
critical area estimation, arbitrary defect shapes, circular defects, elliptical defects, rod shaped defects, arbitrary shaped defects, Edinburgh Yield Estimator, Cadence layout editor, EYE-sampling tool, EYE, EYES, integrated circuit yield, IC layout |
| 28 | Debashish Niyogi, Sargur N. Srihari |
Knowledge-based derivation of document logical structure. |
ICDAR |
1995 |
DBLP DOI BibTeX RDF |
document logical structure, spatial domain knowledge, document logical structure derivation, rule-based control strategy, multi-level knowledge base, document layout rules, DeLoS, block classification, read-ordering operations, document image data, incremental inferences, knowledge based systems, knowledge-based, grouping, inferences, document image processing, inference mechanisms, document image, document layout, symbolic description |
| 28 | Nian-Feng Tzeng, Po-Jen Chuang |
A Pairwise Substitutional Fault Tolerance Technique for the Cube-Connected Cycles Architecture. |
IEEE Trans. Parallel Distributed Syst. |
1994 |
DBLP DOI BibTeX RDF |
cube-connected cycles architecture, CCC, fault-tolerant CCC structure, fault-tolerantstructure, fault tolerance, VLSI, fault tolerant computing, reconfiguration, multiprocessor interconnection networks, VLSI layout, reliability analysis, performance degradation, layout area |
| 27 | Zhenjiang Wang, Chenggang Wu 0002, Pen-Chung Yew |
On improving heap memory layout by dynamic pool allocation. |
CGO |
2010 |
DBLP DOI BibTeX RDF |
adaptive partial call chain, pool allocation, dynamic optimization, data layout |
| 27 | Yu Zheng 0001, Ming C. Lin, Dinesh Manocha |
Efficient simplex computation for fixture layout design. |
Symposium on Solid and Physical Modeling |
2010 |
DBLP DOI BibTeX RDF |
layout design, randomized algorithms, simplex, fixture |
| 27 | Hadi Panahi, Masoud Rabbani, Reza Tavakkoli-Moghaddam |
A Comparison of Three Meta-heuristics for a Closed-Loop Layout Problem with Unequal-Sized Facilities. |
New Challenges in Applied Intelligence Technologies |
2008 |
DBLP DOI BibTeX RDF |
Closed-loop layout problem, unequal-sized facilities, Genetic algorithm, Simulated annealing, Ant colony optimization |
| 27 | Holger Eichelberger |
Automatic layout of UML use case diagrams. |
SOFTVIS |
2008 |
DBLP DOI BibTeX RDF |
automatic layout algorithms, drawing rules, UML, model-driven development, use case diagrams |
| 27 | Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel |
A Case Study on Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis. |
J. Electron. Test. |
2007 |
DBLP DOI BibTeX RDF |
Automatic layout generation, Transient fault injection, Phase-locked loop |
| 27 | Yaniv Frishman, Ayellet Tal |
Multi-Level Graph Layout on the GPU. |
IEEE Trans. Vis. Comput. Graph. |
2007 |
DBLP DOI BibTeX RDF |
GPU, graph partitioning, Graph layout |
| 27 | Jean-Yves Ramel, S. Leriche, Marie-Luce Demonet, S. Busson |
User-driven page layout analysis of historical printed books. |
Int. J. Document Anal. Recognit. |
2007 |
DBLP DOI BibTeX RDF |
Page layout analysis, Analysis strategy, Zone classification, Digital libraries, Segmentation |
| 27 | Wei Lai, Xiaodi Huang, Quang Vinh Nguyen, Mao Lin Huang |
Applying Graph Layout Techniques to Web Information Visualization and Navigation. |
CGIV |
2007 |
DBLP DOI BibTeX RDF |
Graph layout techniques, Visual map, Web information, Navigation, Web browser, Web graph |
| 27 | Gen Hattori, Keiichiro Hoashi, Kazunori Matsumoto, Fumiaki Sugaya |
Robust web page segmentation for mobile terminal using content-distances and page layout information. |
WWW |
2007 |
DBLP DOI BibTeX RDF |
content-distance, web page layout, segmentation, mobile phone, web page |
| 27 | Berna Haktanirlar Ulutas, A. Attila Islier |
Parameter Setting for Clonal Selection Algorithm in Facility Layout Problems. |
ICCSA (1) |
2007 |
DBLP DOI BibTeX RDF |
Facility layout problem, artificial immune system, design of experiments, clonal selection algorithm, CRAFT |
| 27 | Di Wen 0001, Xiaoqing Ding |
Visual Similarity Based Document Layout Analysis. |
J. Comput. Sci. Technol. |
2006 |
DBLP DOI BibTeX RDF |
texture analysis, dynamic clustering, document layout analysis |
| 27 | Karl-Michael Schneider |
Information extraction from calls for papers with conditional random fields and layout features. |
Artif. Intell. Rev. |
2006 |
DBLP DOI BibTeX RDF |
Layout features, Information extraction, Conditional random fields |
| 27 | Oliver Pell |
Verification of FPGA Layout Generators in Higher-Order Logic. |
J. Autom. Reason. |
2006 |
DBLP DOI BibTeX RDF |
layout description, circuit verification, FPGA, theorem proving |
| 27 | Jürgen Wolff von Gudenberg, A. Niederle, Marc Ebner, Holger Eichelberger |
Evolutionary layout of UML class diagrams. |
SOFTVIS |
2006 |
DBLP DOI BibTeX RDF |
layout metrics, UML, evolutionary algorithms, graph drawing, UML class diagrams |
| 27 | Wai Leng Lee, Mark Green 0001 |
Automatic layout for 3D user interfaces construction. |
VRCIA |
2006 |
DBLP DOI BibTeX RDF |
layout technique, 3D user interface |
| 27 | Hiroshi Hosobe |
Solving linear and one-way constraints for web document layout. |
SAC |
2005 |
DBLP DOI BibTeX RDF |
cassowary, constraints, web browsers, simplex method, document layout |
| 27 | Dabo Sun, Kenny Wong |
On Evaluating the Layout of UML Class Diagrams for Program Comprehension. |
IWPC |
2005 |
DBLP DOI BibTeX RDF |
perceptual theory, UML modeling tools, aesthetics, graph layout, UML class diagrams |
| 27 | Wai Leng Lee, Mark Green 0001 |
A layout framework for 3D user interfaces. |
VRST |
2005 |
DBLP DOI BibTeX RDF |
layout techniques, 3D user interface |
| 27 | Chris Lattner, Vikram S. Adve |
Automatic pool allocation: improving performance by controlling data structure layout in the heap. |
PLDI |
2005 |
DBLP DOI BibTeX RDF |
pool allocation, cache, static analysis, data layout, recursive data structure |
| 27 | Seung Woo Son 0001, Guangyu Chen, Mahmut T. Kandemir |
Disk layout optimization for reducing energy consumption. |
ICS |
2005 |
DBLP DOI BibTeX RDF |
low power, optimizing compiler, disk layout |
| 27 | Jonathan M. Stott, Peter Rodgers 0001 |
Metro Map Layout Using Multicriteria Optimization. |
IV |
2004 |
DBLP DOI BibTeX RDF |
metro map layout problem, public transport schematics, graph drawing, multicriteria optimization |
| 27 | Yoonseo Choi, Taewhan Kim |
Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
page/burst modes, embedded system, memory layout, storage assignment |
| 27 | Herman Schmit, Vikas Chandra |
FPGA switch block layout and evaluation. |
FPGA |
2002 |
DBLP DOI BibTeX RDF |
VLSI layout, FPGA interconnect |
| 27 | Masanori Hashimoto, Masao Takahashi, Hidetoshi Onodera |
Crosstalk noise optimization by post-layout transistor sizing. |
ISPD |
2002 |
DBLP DOI BibTeX RDF |
capacitive coupling noise, post-layout optimization, gate sizing, transistor sizing, crosstalk noise |
| 27 | Supratik Chakraborty, Rajeev Murgai |
Layout-Driven Timing Optimization by Generalized De Morgan Transform. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
layout-driven optimization, in-place circuit optimization, DeMorgan transformation, deep sub-micron design, Timing optimization, timing closure |
| 27 | Junhyung Um, Taewhan Kim |
Layout-aware synthesis of arithmetic circuits. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
layout, high performance, carry-save-adder |
| 27 | Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka |
Hierarchical VLSI Fault Tracing by Successive Circuit Extraction from CAD Layout Data in the CAD-Linked EB Test System. |
J. Electron. Test. |
1997 |
DBLP DOI BibTeX RDF |
hierarchical fault tracing, electron beam testing, hierarchically structured CAD layout, successive circuit extraction |
| 27 | Min Xu, Fadi J. Kurdahi |
Layout-Driven RTL Binding Techniques for High-Level Synthesis. |
ISSS |
1996 |
DBLP DOI BibTeX RDF |
layout-driven register-transfer-level, binding techniques, chip level implementation, high level synthesis, high-level synthesis, design process |
| 27 | Shigetoshi Nakatake, Kunihiro Fujiyoshi, Hiroshi Murata, Yoji Kajitani |
Module placement on BSG-structure and IC layout applications. |
ICCAD |
1996 |
DBLP DOI BibTeX RDF |
rectilinear chip, L-shaped module, module placement, IC layout |
| 27 | Philippe Lefèvre, François Reynaud |
ODIL: an SGML description language of the layout structure of documents. |
ICDAR |
1995 |
DBLP DOI BibTeX RDF |
SGML description language, ODIL, coding format, document recognition prototype, Office Document Image description Language, logical structure recognition, RAINBOW transit DTD, layout structure, up-conversion, image segmentation, segmentation, OCR, document image processing, SGML, document recognition, ODL, page description languages |
| 27 | Lawrence O'Gorman |
The Document Spectrum for Page Layout Analysis. |
IEEE Trans. Pattern Anal. Mach. Intell. |
1993 |
DBLP DOI BibTeX RDF |
document spectrum, nearest-neighbor clustering, docstrum, structural page layout analysis, within-line spacings, between-line spacings, text spacings, image segmentation, document image processing, document image processing, skew, bottom-up method |
| 27 | Michael Formann, Frank Wagner 0001 |
The VLSI layout in various embedding models. |
WG |
1990 |
DBLP DOI BibTeX RDF |
embedding models, Manhattan model, knock-knee model, routing, VLSI, NP-completeness, layout |
| 27 | Sajal K. Das 0001, Narsingh Deo, Sushil K. Prasad |
Gate Matrix Layout Revisited: Algorithmic Performance and Probabilistic Analysis. |
FSTTCS |
1989 |
DBLP DOI BibTeX RDF |
gate matrix layout, Approximation algorithms, dynamic programming, probabilistic analysis, VLSI circuits |
| 27 | Stefano Ferilli, Teresa Maria Altomare Basile, Floriana Esposito |
A histogram-based technique for automatic threshold assessment in a run length smoothing-based algorithm. |
Document Analysis Systems |
2010 |
DBLP DOI BibTeX RDF |
segmentation, layout analysis |
| 27 | Stephen P. Kornachuk, Michael C. Smayling |
New strategies for gridded physical design for 32nm technologies and beyond. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
28nm, 32nm, 45nm, litho, rdr, placement, layout, physical design, manufacturability, lithography, standard cell, vlsi, drc, dfm |
| 27 | Nathan Hurst, Wilmot Li, Kim Marriott |
Review of automatic document formatting. |
ACM Symposium on Document Engineering |
2009 |
DBLP DOI BibTeX RDF |
optimization techniques, typography, adaptive layout |
| 27 | Myungsu Choi, Minsu Choi |
Scalability of Globally Asynchronous QCA (Quantum-Dot Cellular Automata) Adder Design. |
J. Electron. Test. |
2008 |
DBLP DOI BibTeX RDF |
QCA (quantum-dot cellular automata), Asynchronous architecture, Layout timing problem, Scalability, Robustness |
| 27 | Christof Lutteroth, Gerald Weber |
End-user GUI customization. |
CHINZ |
2008 |
DBLP DOI BibTeX RDF |
document orientation, layout manager, GUI, constraint programming, end-user development, WYSIWYG |
| 27 | Jiaqian Zheng, Junyu Niu |
Unified Mapping of Social Networks into 3D Space. |
IMSCCS |
2007 |
DBLP DOI BibTeX RDF |
visualization, user interface, social network, layout |
| 27 | Dirk Beyer 0001 |
Co-change visualization applied to PostgreSQL and ArgoUML: (MSR challenge report). |
MSR |
2006 |
DBLP DOI BibTeX RDF |
force-directed graph layout, software structure analysis, software visualization, software clustering |
| 27 | Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J. Richard Shi |
Template-driven parasitic-aware optimization of analog integrated circuit layouts. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
analog layout automation, optimization, sensitivity, parasitics |
| 27 | Oronzo Altamura, Floriana Esposito, Donato Malerba |
Transforming paper documents into XML format with WISDOM++. |
Int. J. Document Anal. Recognit. |
2001 |
DBLP DOI BibTeX RDF |
Induction of decision trees, Transformation into HTML/XML format, Document image analysis, Layout analysis |
| 27 | Qiao Li, Sung-Mo Kang |
Efficient algorithms for polygon to trapezoid decomposition and trapezoid corner stitching. |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP DOI BibTeX RDF |
edge pair, non-Manhattan layout extraction, polygon to trapezoid decomposition, scanline algorithm, scanline interval |
| 27 | Mikio Shinya, Marie-Claire Forgue |
Laying out objects with geometric and physical constraints. |
Vis. Comput. |
1995 |
DBLP DOI BibTeX RDF |
Object layout, Geometric and physical constraints, Collision detection |
| 26 | Sonja Maier, Mark Minas |
Interactive diagram layout. |
CHI Extended Abstracts |
2010 |
DBLP DOI BibTeX RDF |
visual languages, meta models, graph drawing |
| 26 | Hiroki Sunagawa, Haruhiko Terada, Akira Tsuchiya, Kazutoshi Kobayashi, Hidetoshi Onodera |
Erect of regularity-enhanced layout on printability and circuit performance of standard cells. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
|
| 26 | Helen Balinsky, Jonathan R. Howes, Anthony Wiley |
Aesthetically-driven layout engine. |
ACM Symposium on Document Engineering |
2009 |
DBLP DOI BibTeX RDF |
fixed content, high customization and personalization, non-flow documents, regularity, alignment |
| 26 | Rafael Castro-López, Oscar Guerra, Elisenda Roca, Francisco V. Fernández 0001 |
An Integrated Layout-Synthesis Approach for Analog ICs. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 26 | Chris Muelder, Kwan-Liu Ma |
Rapid Graph Layout Using Space Filling Curves. |
IEEE Trans. Vis. Comput. Graph. |
2008 |
DBLP DOI BibTeX RDF |
|
| 26 | Abdul Rahim Ahmad, Otman A. Basir, Khaled Hassanein, Shahid Azam |
An Intelligent Expert Systems' Approach to Layout Decision Analysis and Design under Uncertainty. |
Intelligent Decision Making: An AI-Based Approach |
2008 |
DBLP DOI BibTeX RDF |
|
| 26 | Adrian Kuhn, Peter Loretan, Oscar Nierstrasz |
Consistent Layout for Thematic Software Maps. |
WCRE |
2008 |
DBLP DOI BibTeX RDF |
|
| 26 | Faisal Shafait, Joost van Beusekom, Daniel Keysers, Thomas M. Breuel |
Background variability modeling for statistical layout analysis. |
ICPR |
2008 |
DBLP DOI BibTeX RDF |
|
| 26 | Hidehiko Okada, Taiki Miura |
Detection of Layout-Purpose TABLE Tags Based on Machine Learning. |
HCI (7) |
2007 |
DBLP DOI BibTeX RDF |
automated checking, tags, machine learning, Web accessibility, ID3
| 26 | Easwaran Raman, Robert Hundt, Sandya Mannarswamy |
Structure Layout Optimization for Multithreaded Programs. |
CGO |
2007 |
DBLP DOI BibTeX RDF |
|
| 26 | Ruhul A. Sarker, Tapabrata Ray, José Barahona da Fonseca |
An evolutionary algorithm for machine layout and job assignment problems. |
IEEE Congress on Evolutionary Computation |
2007 |
DBLP DOI BibTeX RDF |
|
| 26 | Xiaoping Tang, Xin Yuan, Michael S. Gray |
Practical method for obtaining a feasible integer solution in hierarchical layout optimization. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 26 | Jusub Kim, Joseph F. JáJá |
Component-based Data Layout for Efficient Slicing of Very Large Multidimensional Volumetric Data. |
SSDBM |
2007 |
DBLP DOI BibTeX RDF |
|
| 26 | Min-Chun Tsai, Daniel Zhang, Zongwu Tang |
Modeling Litho-Constrained Design Layout. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 26 | Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada |
Timing-driven cell layout de-compaction for yield optimization by critical area minimization. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 26 | Daniel Lewis, Steve Haroz, Kwan-Liu Ma |
Layout of Multiple Views for Volume Visualization: A User Study. |
ISVC (2) |
2006 |
DBLP DOI BibTeX RDF |
|
| 26 | Joost van Beusekom, Daniel Keysers, Faisal Shafait, Thomas M. Breuel |
Distance Measures for Layout-Based Document Image Retrieval. |
DIAL |
2006 |
DBLP DOI BibTeX RDF |
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