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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6758 occurrences of 2994 keywords
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Results
Found 12949 publication records. Showing 12949 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Shih-Hsiang Lo, Jiun-Hung Ding, Sheng-Je Hung, Jin-Wei Tang, Wei-Lun Tsai, Yeh-Ching Chung |
SEMU: A Framework of Simulation Environment for Wireless Sensor Networks with Co-simulation Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GPC ![In: Advances in Grid and Pervasive Computing, Second International Conference, GPC 2007, Paris, France, May 2-4, 2007, Proceedings, pp. 672-677, 2007, Springer, 978-3-540-72359-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
hardware and software co-simulation, Simulator, wireless sensor networks, dynamic binary translation |
16 | Pierre David, Vincent Idasiak, Frédéric Kratz |
A Sensor Placement Approach for the Monitoring of Indoor Scenes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroSSC ![In: Smart Sensing and Context, Second European Conference, EuroSSC 2007, Kendal, England, UK, October 23-25, 2007, Proceedings, pp. 110-125, 2007, Springer, 978-3-540-75695-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
genetic algorithm, Simulator, sensor network, sensor placement |
16 | David Svoboda, Marek Kasík, Martin Maska, Jan Hubený, Stanislav Stejskal, Michal Zimmermann |
On Simulating 3D Fluorescent Microscope Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAIP ![In: Computer Analysis of Images and Patterns, 12th International Conference, CAIP 2007, Vienna, Austria, August 27-29, 2007, Proceedings, pp. 309-316, 2007, Springer, 978-3-540-74271-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fluorescent optical microscope, simulator, convolution, synthetic image, procedural texture |
16 | Manish Vachharajani, Neil Vachharajani, David A. Penry, Jason A. Blome, Sharad Malik, David I. August |
The Liberty Simulation Environment: A deliberate approach to high-level system modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 24(3), pp. 211-249, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
simulator construction, component reuse, structural modeling, Liberty Simulation Environment (LSE) |
16 | Bako Rajaonah, Françoise Anceaux, Fabrice Vienne |
Trust and the use of adaptive cruise control: a study of a cut-in situation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Cogn. Technol. Work. ![In: Cogn. Technol. Work. 8(2), pp. 146-155, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Adaptive cruise control, Cut-in-situation, Trust, Questionnaire, Driving simulator |
16 | Qi Chen 0011, Daniel Jiang, Vikas Taliwal, Luca Delgrossi |
IEEE 802.11 based vehicular communication simulation design for NS-2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vehicular Ad Hoc Networks ![In: Proceedings of the Third International Workshop on Vehicular Ad Hoc Networks, VANET 2006, Los Angeles, CA, USA, September 29, 2007, pp. 50-56, 2006, ACM, 1-59593-540-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
simulator, IEEE 802.11, NS-2, vehicular communication |
16 | Franco Fummi, Giovanni Perbellini, Mirko Loghi, Massimo Poncino |
ISS-centric modular HW/SW co-simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 31-36, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
systemc, co-simulation, instruction set simulator |
16 | Martti Moisio, Alexandra Oborina |
Comparison of Effective SINR Mapping with Traditional AVI Approach for Modeling Packet Error Rate in Multi-state Channel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEW2AN ![In: Next Generation Teletraffic and Wired/Wireless Advanced Networking, 6th International Conference, NEW2AN 2006, St. Petersburg, Russia, May 29 - June 2, 2006, Proceedings, pp. 461-473, 2006, Springer, 3-540-34429-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
L2S interface, EESM, MIESM, AVI, OFDM, System simulator |
16 | Elena Alessandri, Alessandro Gasparetto, Rafael Valencia-García, Rodrigo Martínez-Béjar |
An application of artificial intelligence to medical robotics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 41(4), pp. 225-243, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
STRIPS, ontologies, artificial intelligence, neurosurgery, medical robotics, robotic simulator, planner |
16 | J. Eliot B. Moss, Trek S. Palmer, Timothy Richards, Edward K. Walters II, Charles C. Weems |
CISL: A Class-Based Machine Description Language for Co-Generation of Compilers and Simulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 33(2-3), pp. 231-246, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
simulator, compiler, Language design, instruction set architecture, machine description |
16 | Henning Schmidt, Stefan Hesse, Rolf Bernhardt, Jörg Krüger |
HapticWalker - a novel haptic foot device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Appl. Percept. ![In: ACM Trans. Appl. Percept. 2(2), pp. 166-180, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
gait rehabilitation, programmable footplates, walking simulator, robot, interpolation, haptic device, Locomotion interface |
16 | Justin Teller, Charles B. Silio Jr., Bruce L. Jacob |
Performance characteristics of MAUI: an intelligent memory system architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Memory System Performance ![In: Proceedings of the 2005 workshop on Memory System Performance, Chicago, Illinois, USA, June 12, 2005, pp. 44-53, 2005, ACM, 1-59593-147-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
MAUI memory architecture, SimpleScalar simulator, data-intensive calculations, intelligent memory, memory architecture, vector processing, SIMD processing |
16 | Mehrdad Reshadi, Prabhat Mishra 0001 |
Memory access optimizations in instruction-set simulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005, pp. 237-242, 2005, ACM, 1-59593-161-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
memory address-space mapping, instruction-set simulator |
16 | Ing-Marie Jonsson, Mary Zajicek, Helen Harris, Clifford Nass |
Thank you, I did not see that: in-car speech based information systems for older adults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI Extended Abstracts ![In: Extended Abstracts Proceedings of the 2005 Conference on Human Factors in Computing Systems, CHI 2005, Portland, Oregon, USA, April 2-7, 2005, pp. 1953-1956, 2005, ACM, 1-59593-002-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
in-car information system, safe driving, speech based systems, older adults, attitudes, driving simulator, driving performance |
16 | Julian Borrill, Jonathan Carter, Leonid Oliker, David Skinner, Rupak Biswas |
Integrated Performance Monitoring of a Cosmology Application on Leading HEC Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 34th International Conference on Parallel Processing (ICPP 2005), 14-17 June 2005, Oslo, Norway, pp. 119-128, 2005, IEEE Computer Society, 0-7695-2380-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Cosmic Microwave Background, MADCAP, Altix Columbia, Earth Simulator, X1 Phoenix, Power3 Seaborg, parallel performance characterization |
16 | Yang Yu, Yulu Yang |
Performance analysis of practical RDT interconnection networks with SINOMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 8th International Symposium on Parallel Architectures, Algorithms, and Networks, ISPAN 2005, December 7-9. 2005, Las Vegas, Nevada, USA, pp. 516-523, 2005, IEEE Computer Society, 0-7695-2509-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
RDT, RDT(2,2,1)/a, interconnection network simulator, average latency, average distance |
16 | David G. Cameron, A. Paul Millar, Caitriana Nicholson, Rubén Carvajal-Schiaffino, Kurt Stockinger, Floriano Zini |
Analysis of Scheduling and Replica Optimisation Strategies for Data Grids Using OptorSim. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Grid Comput. ![In: J. Grid Comput. 2(1), pp. 57-69, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
simulator, scheduling, optimisation, data grid, data replication |
16 | Ing-Marie Jonsson, Clifford Nass, Jack Endo, Ben Reaves, Helen Harris, Janice Le Ta, Nicholas Chan, Sean Knapp |
Don't blame me I am only the driver: impact of blame attribution on attitudes and attention to driving task. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI Extended Abstracts ![In: Extended abstracts of the 2004 Conference on Human Factors in Computing Systems, CHI 2004, Vienna, Austria, April 24 - 29, 2004, pp. 1219-1222, 2004, ACM, 1-58113-703-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
attitudinal change, blame attribution, trust and liking, driving simulator, driving performance |
16 | Yasser A. Sowb, Robert G. Loeb |
Cognitive Analysis of Intraoperative Critical Events: A Problem-Driven Approach to Aiding Clinicians' Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Cogn. Technol. Work. ![In: Cogn. Technol. Work. 4(2), pp. 107-119, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Critical incident techniques, Human error analysis, Human-machine interaction in the operating room, Observational and simulator-based studies, Decision support systems, Cognitive modelling |
16 | Thomas Müller, Hans-Gerhard Giesa |
Effects of Airborne Data Link Communication on Demands, Workload and Situation Awareness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Cogn. Technol. Work. ![In: Cogn. Technol. Work. 4(4), pp. 211-228, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Air-to-ground data link, Cognitive demands, Crew resource management, Multi-sector-planning, Communication, Situation awareness, Workload, Aviation, Flight simulator |
16 | Scott H. Clearwater, Stephen D. Kleban |
ASCI Queuing Systems: Overview and Comparisons. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
ASCI, simulator, predictability, fairness, queuing |
16 | Subodh Shah, Edwin Hernandez, Abdelsalam Helal |
CAD-HOC: A CAD-Like Tool for Generating Mobility Benchmarks in Ad-Hoc Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAINT ![In: 2002 Symposium on Applications and the Internet (SAINT 2002), 28 January - 1 February 2002, Nara City, Japan, Proceedings, pp. 270-280, 2002, IEEE Computer Society, 0-7695-1447-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Mobility scenario generator, mobility benchmarks, ns-simulator, Ad-hoc networks |
16 | G. D. Nagendra, V. G. Prem Kumar, B. S. Sheshadri Chakravarthy |
Simulation bridge: a framework for multi-processor simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 49-54, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
simulation framework, instruction set simulator, multiprocessor simulation |
16 | Jennifer Lai, Karen Cheng, Paul A. Green, Omer Tsimhoni |
On the road and on the Web?: comprehension of synthetic and human speech while driving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHI ![In: Proceedings of the CHI 2001 Conference on Human Factors in Computing Systems, Seattle, WA, USA, March 31 - April 5, 2001., pp. 206-212, 2001, ACM, 1-58113-327-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
speech synthesis, comprehension, driving simulator, text-to-speech, driving performance |
16 | Motoshi Saeki |
Behavioral specification of GOF design patterns with LOTOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSEC ![In: 7th Asia-Pacific Software Engineering Conference (APSEC 2000), 5-8 December 2000, Singapore, pp. 408-415, 2000, IEEE Computer Society, 0-7695-0915-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
gang-of-four design patterns, LOTOS simulator, composite and command patterns, formal specification, object-oriented programming, specification languages, object-oriented methods, software patterns, behavioral specification |
16 | Khaled Ben Lamine, Froduald Kabanza |
History checking of temporal fuzzy logic formulas for monitoring behavior-based mobile robots. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 12th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2000), 13-15 November 2000, Vancouver, BC, Canada, pp. 312-319, 2000, IEEE Computer Society, 0-7695-0909-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
temporal fuzzy logic, behavior-based mobile robots, robot control systems, real world robots, simulator, semantics, fuzzy logic, temporal logic, mobile robots, digital simulation, distributed control, failure detection, noise elimination |
16 | Abby A. Ilumoka |
Efficient prediction of interconnect crosstalk using neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 12th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2000), 13-15 November 2000, Vancouver, BC, Canada, pp. 122-125, 2000, IEEE Computer Society, 0-7695-0909-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
interconnect crosstalk prediction, deep submicron downscaling, wirecells, modular artificial neural networks, multiparadigm prototyping system, equicoupling contours, isocouples, transconductance amplifier, neural networks, delays, delay, finite element method, neural nets, crosstalk, experimental results, circuit CAD, finite element analysis, circuit simulation, circuit simulator, integrated circuit interconnections, wafer-scale integration, wafer scale integration |
16 | Hiroyasu Obata, Kenji Ishida, Junichi Funasaka, Kitsutaro Amano |
TCP Performance Analysis on Asymmetric Networks Composed of Satellite and Terrestrial Links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: Eighth Annual International Conference on Network Protocols, ICNP 2000, 14-17 November, 2000, Osaka, Japan, pp. 199-208, 2000, IEEE Computer Society, 0-7695-0921-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
satellite ground stations, TCP performance analysis, asymmetric networks, terrestrial links, asymmetric bandwidth, asymmetric delay, evaluation formula, VSAT, very small aperture terminal, asymmetric digital subscriber line, Internet, Internet, throughput, transport protocols, digital simulation, network simulator, ADSL, TCP Reno, satellite links, satellite links, downlink, uplink, slow start, cable modem |
16 | Xijiang Lin, Wu-Tung Cheng, Irith Pomeranz, Sudhakar M. Reddy |
SIFAR: Static Test Compaction for Synchronous Sequential Circuits Based on Single Fault Restoration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada, pp. 205-212, 2000, IEEE Computer Society, 0-7695-0613-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Test Segment, Parallel Pattern Simulator, Vector Restoration, Single Fault Restoration, Fault Coverage, Synchronous Sequential Circuits, Test Length, Static Test Compaction |
16 | Shugong Xu, Tarek N. Saadawi, Myung J. Lee |
Comparison of TCP Reno and Vegas in Wireless Mobile Ad Hoc Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: Proceedings 27th Conference on Local Computer Networks, Tampa, Florida, USA, 8-10 November, 2000, pp. 42-43, 2000, IEEE Computer Society, 0-7695-0912-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
NS2 network simulator, Lawrence Berkeley National Laboratory, MONARCH project, Carnegie Mellon, node movement, TCP connection, receiver nodes, sender nodes, good-put, maximum window size, performance evaluation, transport protocols, network topology, digital simulation, radio networks, performance study, network nodes, TCP Vegas, land mobile radio, TCP Reno, wireless mobile ad hoc networks |
16 | Mitsunori Yoneda, Fumihito Arai, Toshio Fukuda, Keisuke Miyata |
VR Operational Assistance System for Rough Terrain Crane. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VR ![In: Virtual Reality 2000 Conference, VR'00, New Brunswick, New Jersey, USA, March 18-22, 2000, Proceedings, pp. 289, 2000, IEEE Computer Society, 0-7695-0478-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Multi-modal Display, VR Crane Simulator, Man Machine Interface |
16 | Scott P. Oswald, Kannan Ramchandran, Thomas S. Huang |
Efficient Terrain Data Representation for 3D Rendering Using the Generalized BFOS Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (1) ![In: Proceedings 1997 International Conference on Image Processing, ICIP '97, Santa Barbara, California, USA, October 26-29, 1997, pp. 448-451, 1997, IEEE Computer Society, 0-8186-8183-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
efficient terrain data representation, 3D rendering, generalized BFOS algorithm, flight simulator video games, regular triangular grid, tree-pruning method, quantization trees, geographic information systems, GIS, computer graphics, regression, displays, binary tree, tree data structures, tessellation, military, multiple resolutions |
16 | Naim Ben-Hamida, Khaled Saab 0001, David Marche, Bozena Kaminska |
A perturbation based fault modeling and simulation for mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 182-187, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
analog circuit fault simulation, perturbation fault model, fault abstraction, structural fault modeling, perturbation estimation, fault observation, hierarchical analog fault simulator, complexity, test generation, CMOS, mixed-signal circuits, mixed analogue-digital integrated circuits, functional fault modeling, physical defects |
16 | Gerald Krell, Hamid R. Tizhoosh, Tilo Lilienblum, C. J. Moore, Bernd Michaelis |
Enhancement and associative restoration of electronic portal images in radiotherapy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CBMS ![In: 10th IEEE Symposium on Computer-Based Medical Systems (CBMS '97), 11-13 June 1997, Maribor, Slovenia, pp. 104-108, 1997, IEEE Computer Society, 0-8186-7928-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fuzzy image enhancement technique, associative restoration algorithm, Electronic Portal Imaging Device, high-energy treatment beam, patient body interior, image projection, fluorescent screen scanning, imaging physics, pre-treatment captured simulator image, image quality, camera, radiotherapy, radiation therapy |
16 | David M. Nicol, Michael M. Johnson, Ann S. Yoshimura, Michael E. Goldsby |
Performance Modeling of the IDES Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Parallel and Distributed Simulation ![In: Proceedings of the Eleventh Workshop on Parallel and Distributed Simulation, PADS '97, Lockenhaus, Austria, June 10-13, 1997, pp. 38-45, 1997, IEEE Computer Society, 0-8186-7965-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Breathing-Time-Buckets, IDES project, Sandia National Laboratories, architectural parameters, large scale portable parallel simulator, stockpile stewardship, window termination, work load, parallel algorithm, parallel programming, performance modeling, discrete event simulation, synchronization protocol |
16 | Sugath Warnakulasuriya, Timothy Mark Pinkston |
Characterization of Deadlocks in Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 80-86, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
deadlocks characterisation, true deadlock detection, bidirectionality, routing adaptivity, node degree, deadlock formation, routing flexibility blocked messages, resource dependencies, simulator, interconnection networks, multiprocessor interconnection networks, virtual channels, buffer size, design parameters, deadlock-free routing algorithms |
16 | W. Lynn Gallagher, Chuan-lin Wu |
Evaluation of a memory hierarchy for the MTS multithreaded processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 346-351, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
memory hierarchy evaluation, MTS multithreaded processor, hardware resource utilization, instruction throughput, multithreaded superscalar processor, multiple instruction streams, multiple functional unit architecture, parameter-driven simulator, SES/workbench, numerical benchmarks, memory system configurations, main memory latency, cache hit rates, realistic multilevel cache hierarchy, parallel processing, VLIW, superscalar processor, instruction cache |
16 | Rolf Drechsler, Martin Keim, Bernd Becker 0001 |
Fault Simulation in Sequential Multi-Valued Logic Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 27th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1997, Antigonish, Nova Scotia, Canada, May 28-30, 1997, Proceedings, pp. 145-152, 1997, IEEE Computer Society, 0-8186-7910-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
sequential multi-valued logic networks, multi-valued logic networks, logic testing, sequential circuits, fault models, fault simulator, random pattern testability |
16 | Frédéric Pétrot, Denis Hommais, Alain Greiner |
Cycle precise core based hardware/software system simulation with predictable event propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 182-187, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
hardware software system simulation, predictable event propagation, cycle precise core based system simulator, digital embedded systems, Mealy signals, combinational signals, MIPS R3000, microprocessor core, PI-Bus, Pentium 120, communication, graph, C, high level synthesis, memories, directed graph, FSM, topological sort, compile-time, communicating finite state machines |
16 | Yau-Hwang Kuo, Shiuh-Chu Lee |
Software Development Tool for Object-Oriented Fuzzy Knowledge Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 9th International Conference on Tools with Artificial Intelligence, ICTAI '97, Newport Beach, CA, USA, November 3-8, 1997, pp. 454-461, 1997, IEEE Computer Society, 0-8186-8203-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
object oriented fuzzy knowledge systems, fuzzy reasoning concept, reasoning power, novel fuzzy linguistic object model, three layered structure, knowledge acquisition layer, object design layer, program design layer, fuzzy knowledge systems, object simulator, knowledge representation, software tools, expert system, rapid prototyping, inheritances, approximate reasoning, rule base, object oriented paradigm, software development tool, design information, problem solving process |
16 | Peter J. Stuckey, Vincent W. L. Tam |
Extending EGENET with Lazy Constraint Consistency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 9th International Conference on Tools with Artificial Intelligence, ICTAI '97, Newport Beach, CA, USA, November 3-8, 1997, pp. 248-, 1997, IEEE Computer Society, 0-8186-8203-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
extended EGENET, lazy constraint consistency, neural network simulator, min-conflict heuristic, hard graph-colouring problems, complete search methods, stochastic search methods, convergence behaviour, scheduling, planning (artificial intelligence), planning, constraint satisfaction problems, bin-packing, arc consistency, search behaviour |
16 | Andy Negoi, Alain Guyot, Jacques Zimmermann |
A dedicated circuit for charged particles simulation using the Monte Carlo method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1997 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '97), 14-16 July 1997, Zurich, Switzerland, pp. 422-431, 1997, IEEE Computer Society, 0-8186-7958-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
dedicated circuit, charged particles simulation, dedicated integrated circuit, integro-differential Boltzmann equation, direct statistical computation, simulated particles distribution function, semiconductor device hardware simulator, microdynamical transport, Boltzmann equation, binary format, drift velocity, static uniform electric field, hot carrier effects, computational complexity, Monte Carlo method |
16 | David Pautler, Steven Woods, Alex Quilici |
Exploiting Domain-Specific Knowledge to Refine Simulation Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASE ![In: 1997 International Conference on Automated Software Engineering, ASE 1997, Lake Tahoe, CA, USA, November 2-5, 1997, pp. 117-, 1997, IEEE Computer Society, 0-8186-7961-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
high-level simulation specification refinement, simulated combat training, tank platoon members, network-based combat simulator, nonlinear planning, branching factor, constraint satisfaction, digital simulation, executable specification, domain-specific knowledge |
16 | Masaru Takesue |
A tampering protocol for reducing the coherence transactions in regular computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1997 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '97), 18-20 December 1997, Taipei, Taiwan, pp. 465-471, 1997, IEEE Computer Society, 0-8186-8259-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
tampering protocol, coherence transactions, regular computation, latency of communication, protocols, multiprocessor, cache-coherence protocol, RTL simulator |
16 | M. E. Waite, T. J. Reynolds, F. Z. Ieromnimon |
Parallel Graph Reduction with the PACE Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), January 24-26, 1996, Portugal, pp. 448-454, 1996, IEEE Computer Society, 0-8186-7376-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel graph reduction, PACE architecture, graph reduction model, basic replicable node, prototype version, Verilog description, C simulator, parallel programming, graph theory, parallel architectures, virtual machines, distributed memory systems, parallel execution, distributed memory multiprocessor |
16 | Loïc Prylli, Bernard Tourancheau |
Distributed simulation of parallel computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 29st Annual Simulation Symposium (SS '96), April 8-11, 1996, New Orleans, LA, USA, pp. 25-, 1996, IEEE Computer Society, 0-8186-7432-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
MIMD computer, code recompilation, trace file, simulation hosts, application granularity, performance evaluation, parallel computers, virtual machines, local area networks, program compilers, distributed memory systems, distributed simulation, distributed simulator, workstation cluster, distributed memory parallel computers, network latency, virtual timings |
16 | Steven D. Corey, Andrew T. Yang |
Automatic netlist extraction for measurement-based characterization of off-chip interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 24-29, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
MCM substrate-level interconnect circuitry, SPICE netlist, automatic netlist extraction, linear circuits, measured time domain refectometry data, measurement-based characterization, microstrip circuits, multiport system, off-chip interconnect, reflection transmission, time-domain scattering parameters, user-specified cutoff frequency, delay, crosstalk, circuit simulator, multichip modules, nonlinear circuits |
16 | Namyun Kim, Minsoo Ryu, Seongsoo Hong, Manas Saksena, Chong-Ho Choi, Heonshik Shin |
Visual assessment of a real-time system design: a case study on a CNC controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 17th IEEE Real-Time Systems Symposium (RTSS '96), December 4-6, 1996, Washington, DC, USA, pp. 300-310, 1996, IEEE Computer Society, 0-8186-7689-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
visual assessment, sensor-to-output latency, intertask communication schemes, period calibration method, computerized numerical control, plant simulator, control quality, loop processing periods, scheduling, performance, real-time systems, case study, jitter, CNC, system utilization, real-time system design |
16 | Gerald G. Pechanek, M. Stojancic, Stamatis Vassiliadis, C. John Glossner |
MFAST: a single chip highly parallel image processing architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings 1995 International Conference on Image Processing, Washington, DC, USA, October 23-26, 1995, pp. 69-72, 1995, IEEE Computer Society, 0-8186-7310-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
MFAST, single chip highly parallel image processing architecture, IBM Mwave, graphics processing, scalable array of processing elements, folded array, transpose operations, Mwave Folded Array Signal Transform processor, scalable DSP, algorithm execution, 2D DCT program, functional simulator models, 16 bit/s, 50 MHz, real-time systems, parallel architectures, VHDL, discrete cosine transforms, discrete cosine transform, hardware description languages, video signal processing, digital signal processing chips, matrix operations, real-time video processing |
16 | L. Bisone, A. Scianna |
A CAD multiprocessor system for advanced real-time process applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), January 25-27, 1995, San Remo, Italy, pp. 494-501, 1995, IEEE Computer Society, 0-8186-7031-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CAD multiprocessor system, advanced real-time process applications, control diagrams, synoptic pages, control station, symbol editors, parallel VME bus, Field Instrumentation Protocol, real control loops, parallel simulator signals, complex parallel real time architecture, real-time systems, networking, protocols, parallel system, client-server systems, distributed control, trends, automation system, power generation, control system CAD |
16 | Sophie Chabridon, Erol Gelenbe |
Dependable parallel computing with agents based on a task graph model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), January 25-27, 1995, San Remo, Italy, pp. 350-357, 1995, IEEE Computer Society, 0-8186-7031-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
dependable parallel computing, task graph model, MIMD shared memory architecture, performance evaluation, parallel processing, parallel programming, parallel programs, agents, discrete event simulation, discrete-event simulator, fast Fourier transform, software performance evaluation, failure detection, application program |
16 | Udo Mahlstedt, Jürgen Alt, Ingo Hollenbeck |
Deterministic test generation for non-classical faults on the gate level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 244-251, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
deterministic test pattern generator, gate level fault models, function conversions, nonclassical faults, fault list generator, library-based fault modeling strategy, ISCAS benchmark circuits, scan-based circuits, CMOS cell library, algorithm, fault diagnosis, logic testing, design for testability, ATPG, combinational circuits, combinational circuits, fault simulator, logic CAD, stuck-at faults, CMOS logic circuits, bridging faults, deterministic algorithms, logic simulation, transition faults, automatic test software, test efficiency, CONTEST |
16 | Martin Adelantado, Frédéric Boniol, D. Pinault |
A simulation environment for designing distributed reactive/deliberative time-constrained applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 28st Annual Simulation Symposium (SS '95), April 25-28, 1995, Santa Barbara, California, USA, pp. 186-195, 1995, IEEE Computer Society, 0-8186-7091-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
distributed reactive/deliberative time-constrained applications design, deliberative systems, terminal state, logical time notion, man-machine interface handlers, time critical applications, Sun4 IPX workstation, X-Window graphical interface, French Ministry of Defense, simulator, real-time systems, graphical user interfaces, distributed processing, requirements, programming, programming environments, timing, computer games, program compilers, digital simulation, reactive systems, timing constraints, distributed real-time systems, simulation environment, application generators, reactive programming, Unix operating system, initial state |
16 | K. H. (Kane) Kim, Luiz F. Bacellar, Yuseok Kim, Chittur Subbaraman, Hankil Yoon, Jung-Guk Kim, Kee-Wook Rim |
A timeliness-guaranteed kernel model-DREAM kernel-and implementation techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 2nd International Workshop on Real-Time Computing Systems and Applications, October 25 - 27, 1995, Tokyo, Japan, pp. 80-87, 1995, IEEE Computer Society, 0-8186-7106-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
timeliness-guaranteed kernel model, DREAM kernel, timeliness-guaranteed operating system, new-style real-time objects, hardware utilization, v.D2, real-time systems, modularity, digital simulation, real-time simulator, operating system kernels, operating system kernel, expandability, real-time processes, prototype implementation, real-time computer systems, implementation techniques, application environment |
16 | Rolf Drechsler, Rolf Krieger, Bernd Becker 0001 |
Random Pattern Fault Simulation in Multi-Valued Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 98-103, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
random pattern fault simulation, multi-valued circuits, multi-valued logic networks, fault diagnosis, logic testing, integrated circuit testing, fault simulator, circuit analysis computing, multivalued logic circuits, random pattern testability |
16 | Manish Pandey, Alok Jain, Randal E. Bryant, Derek L. Beatty, Gary York, Samir Jain |
Extraction of finite state machines from transistor netlists by symbolic simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 596-601, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
finite state machine extraction, transistor netlists, clock level finite state machines, gate level representation, circuit clocking, output timing, simulation patterns, next state, output function, equivalent FSM, static storage structures, time multiplexed inputs, time multiplexed outputs, finite state machines, logic design, logic CAD, circuit analysis computing, FSMs, symbolic simulation, symbolic simulator, Ordered Binary Decision Diagrams |
16 | Farnaz Mounes-Toussi, David J. Lilja |
Write buffer design for cache-coherent shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 506-511, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
write-buffer configurations, one word per buffer entry, one block per buffer entry, write-through, write-back, competitive-performance, shared-memory multiprocessors, shared memory systems, cache-coherent, memory architecture, buffer storage, cache storage, execution-driven simulator, write policies |
16 | Hans Hansson, Harold W. Lawson, Mikael Strömberg, Sven Larsson |
BASEMENT: a distributed real-time architecture for vehicle applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: 1st IEEE Real-Time Technology and Applications Symposium, Chicago, Illinois, USA, May 15-17, 1995, pp. 220-229, 1995, IEEE Computer Society, 0-8186-6980-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
BASEMENT, distributed real-time architecture, vehicle applications, distributed real time architecture, vehicle internal use, guaranteed real time service, distributed devices, program development methodology, application oriented development, offline scheduler, intelligent cruise control application, real-time systems, distributed processing, resource sharing, multiplexing, operating system kernels, system simulator, safety critical applications, communication support, communication infrastructure, automobiles, computerised control, automotive industry, driver information systems, automotive electronics, real time kernel |
16 | Kelvin K. Yue, David J. Lilja |
Parameter estimation for a generalized parallel loop scheduling algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (2) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 187-191, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
generalized parallel loop scheduling algorithm, strategy evolution, CS-2, FS-alt, chunk scheduling, genetic algorithms, genetic algorithm, scheduling, parallel algorithms, virtual machines, parameter estimation, parameter estimation, shared-memory multiprocessor, shared memory systems, factoring, program control structures, multiprocessor simulator |
16 | Wesley K. Kaplow, William Maniatty, Boleslaw K. Szymanski |
Impact of memory hierarchy on program partitioning and scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (2) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 93-102, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
parallel program scheduling, nonlinear cache-miss rates, loop nest execution simulation, architecturally parameterized cache simulator, loop range, cache-miss ratio, loop interchange, iteration-space blocking, program runtime estimation, IBM 9076 SP1, SuperSPARC, scheduling, parallel programming, optimisation, memory hierarchy, processor scheduling, software performance evaluation, memory architecture, cache storage, program optimization, cache performance, program control structures, program partitioning, Intel i860 |
16 | Varna Puvvada, S. Potla, S. Tamizh Selvam, P. R. Suresh |
A simulation study on the effectiveness of n-guardring/p-guardring on latchup in 0.8 μm CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 192-, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
integrated circuit technology, n-guardring, p-guardring, latchup prevention, remote transient, I/O buffer n-channel transistor, 2D device simulator, TMA-MEDICI, substrate resistance, 0.8 micron, VLSI, circuit analysis computing, CMOS integrated circuits, CMOS technology, transients, steady state simulation |
16 | Nagaraj Subramanyam, K. G. Praveen, Ramesh Ramani, D. Suryanarayana |
CODAC-a characterization system for digital and analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 193-, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
CODAC, characterization system, electrical simulator, procedural interface, customized analysis functions, parallel processing, circuit analysis computing, Monte Carlo methods, circuit CAD, SPICE, SPICE, analog circuits, digital circuits, CAD tool, digital integrated circuits, analogue integrated circuits, circuit analysis, Monte Carlo analysis |
16 | G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee |
Analysis of temperature dependence of Si-Ge HBT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 268-271, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
semiconductor materials, heterojunction bipolar transistors, Ge-Si alloys, heterojunction bipolar transistors, Ge mole-fraction, two dimensional device simulator, BISOF, current gain, graded HBT, 200 to 300 K, simulation, finite element method, finite element analysis, FEM, temperature dependence, SiGe, thermal analysis, semiconductor device models |
16 | P. Blysa |
SDT a tool for complex real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), November 6-10, 1995, Fort Lauderdale, Florida, USA, pp. 21-, 1995, IEEE Computer Society, 0-8186-7123-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
SDT, complex real-time systems tool, object-oriented design tool, object-oriented formal specification technique SDL, C++ environments, simulator, real-time systems, real-time system, formal specification, object-oriented programming, validator, C, programming environments, editor |
16 | Yabo Wang, David Lorge Parnas |
Simulating the Behavior of Software Modules by Trace Rewriting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 20(10), pp. 750-759, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
software module behavior simulation, trace rewriting, trace assertion method, module interface specification method, specification simulation tool, trace simulator, trace specifications, trace rewriting systems, trace simulation, simulation, formal specification, finite state machines, digital simulation, term rewriting, rewriting systems, finite state machine model |
16 | Venkatesh Akella, Ganesh Gopalakrishnan |
Specification and Validation of Control-Intensive IC's in hopCP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 20(6), pp. 405-423, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
control-intensive integrated circuits, hopCP, asynchronous operations, multiple concurrent threads, Intel 8251, Universal Synchronous/Asynchronous Receiver/Transmitter, USART, synchronous message passing, distributed shared variables, asynchronous ports, compiled-code concurrent functional simulator, CFSIM, formal specification, formal methods, formal verification, specification, validation, message passing, specification languages, interrupt, digital simulation, hardware description language, microprocessor chips, hardware design, polling, computational requirements, synchronous operations |
16 | Devendra Kumar, Saad Harous |
A Study of Achievable Speedup in Distributed Simulation via NULL Messages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(3), pp. 347-354, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
achievable speedup, NULL messages, open queuing networks, performance, concurrency control, computer networks, queueing theory, digital simulation, distributed simulation, distributed simulator, overhead |
16 | Chi Y. Lin, Reuven R. Levary |
Computer-Aided Software Development Process Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 15(9), pp. 1025-1037, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
computer-aided software development process design, intelligent tool, schedule planning, interacting developmental phases, software life-cycle simulator, SLICS, hybrid expert simulation system, software engineering, software tools, management, control, maintenance, dynamic models, system dynamics, budget, personnel, time-varying, software development projects |
16 | Arturo I. Concepcion, Bernard P. Zeigler |
DEVS Formalism: A Framework for Hierarchical Model Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 14(2), pp. 228-241, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
hierarchical model development, distributed simulator architectures, Discrete Event System Specification, hierarchical model specification, top-down model development, software engineering, distributed processing, programming theory, DEVS, model representation, discrete event models |
16 | Claude Jard, Jean-François Monin, Roland Groz |
Development of Véda, a Prototyping Tool for Distributed Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 14(3), pp. 339-352, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
Veda, International Organisation for Standardization, simulator, protocols, distributed algorithms, distributed processing, software tool, software tools, Prolog, ISO, Estelle, prototyping tool |
12 | Dino Schweitzer, Jeff Boleng |
A simple machine simulator for teaching stack frames. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCSE ![In: Proceedings of the 41st ACM technical symposium on Computer science education, SIGCSE 2010, Milwaukee, Wisconsin, USA, March 10-13, 2010, pp. 361-365, 2010, ACM, 978-1-4503-0006-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
stack frames, visualization, active learning, buffer overflow |
12 | Yongjin Li, Yicheng Jin, Yong Yin, Helong Shen |
Real-time Simulation of Large Area Nearshore Wave for Marine Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGIV ![In: Sixth International Conference on Computer Graphics, Imaging and Visualization: New Advances and Trends, CGIV 2009, 11-14 August 2009, Tianjin, China, pp. 101-105, 2009, IEEE Computer Society, 978-0-7695-3789-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Iwan Kartiko, Manolya Kavakli, Ken Cheng |
The Impacts of Animated-Virtual Actors' Visual Complexity and Simulator Sickness in Virtual Reality Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGIV ![In: Sixth International Conference on Computer Graphics, Imaging and Visualization: New Advances and Trends, CGIV 2009, 11-14 August 2009, Tianjin, China, pp. 147-152, 2009, IEEE Computer Society, 978-0-7695-3789-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Kevin Schmidt, Joe Cerney, Ryan Becker, Patrick Duffy, Ana Elisa P. Goulart, Joseph Morgan |
The Design of a Low-Cost Wide Area Network Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMN ![In: Future Multimedia Networking, Second International Workshop, FMN 2009, Coimbra, Portugal, June 22-23, 2009. Proceedings, pp. 200-205, 2009, Springer, 978-3-642-02471-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
token bucket filter, Ethernet, wide area network, network emulator |
12 | Yukiyo Kuriyagawa, Mieko Ohsuga, Ichiro Kageyama |
HR Changes in Driving Scenes with Danger and Difficulties Using Driving Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HCI (17) ![In: Engineering Psychology and Cognitive Ergonomics, 8th International Conference, EPCE 2009, Held as Part of HCI International 2009, San Diego, CA, USA, July 19-24, 2009. Proceedings, pp. 396-403, 2009, Springer, 978-3-642-02727-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Kenta Saito, Yuki Makita, Vu Quang, Hitoshi Sasaki |
Development of a Simulator of Abacus: Ancient Analog Calculator on a Mobile Phone as a Teaching Material. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HCI (4) ![In: Human-Computer Interaction. Interacting in Various Application Domains, 13th International Conference, HCI International 2009, San Diego, CA, USA, July 19-24, 2009, Proceedings, Part IV, pp. 204-208, 2009, Springer, 978-3-642-02582-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
abacus, education, mobile phone, android, teaching material |
12 | Oles Hodych, Kostiantyn Hushchyn, Yuri Shcherbyna, Iouri Nikolski, Volodymyr Pasichnyk |
SOM-Based Dynamic Image Segmentation for Sign Language Training Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UNISCON ![In: Information Systems: Modeling, Development, and Integration, Third International United Information Systems Conference, UNISCON 2009, Sydney, Australia, April 21-24, 2009. Proceedings, pp. 29-40, 2009, Springer, 978-3-642-01111-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
image segmentation, self-organising maps |
12 | Takuya Ogure, Yoshihiro Nakabo, Seonghee Jeong, Yoji Yamada |
Risk management simulator for low-powered human-collaborative industrial robots. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 11-15, 2009, St. Louis, MO, USA, pp. 49-54, 2009, IEEE, 978-1-4244-3803-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Ladjel Bellatreche, Kamel Boukhalfa, Zaia Alimazighi |
SimulPh.D.: A Physical Design Simulator Tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA ![In: Database and Expert Systems Applications, 20th International Conference, DEXA 2009, Linz, Austria, August 31 - September 4, 2009. Proceedings, pp. 263-270, 2009, Springer, 978-3-642-03572-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Joakim Byg, Kenneth Yrke Jørgensen, Jirí Srba |
TAPAAL: Editor, Simulator and Verifier of Timed-Arc Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis, 7th International Symposium, ATVA 2009, Macao, China, October 14-16, 2009. Proceedings, pp. 84-89, 2009, Springer, 978-3-642-04760-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Gabriel H. Loh, Samantika Subramaniam, Yuejian Xie |
Zesto: A cycle-level simulator for highly detailed microarchitecture exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2009, April 26-28, 2009, Boston, Massachusetts, USA, Proceedings, pp. 53-64, 2009, IEEE Computer Society, 978-1-4244-4184-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Garrett Weinberg, Bret Harsham |
Developing a low-cost driving simulator for the evaluation of in-vehicle technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AutomotiveUI ![In: Proceedings of 1st International Conference on Automotive User Interfaces and Interactive Vehicular Applications, AutomotiveUI 2009, in-cooperation with ACM SIGCHI, Essen, Germany, 21-22 September 2009, pp. 51-54, 2009, ACM, 978-1-60558-571-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
automotive user interfaces, human-machine interfaces, driving simulation |
12 | Mustafa M. Tikir, Michael Laurenzano, Laura Carrington, Allan Snavely |
PSINS: An Open Source Event Tracer and Execution Simulator for MPI Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009. Proceedings, pp. 135-148, 2009, Springer, 978-3-642-03868-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Message Passing Applications, High Performance Computing, Performance Prediction, Supercomputers, Trace-Driven Simulation |
12 | Joakim Eriksson, Fredrik Österlind, Thiemo Voigt, Niclas Finne, Shahid Raza, Nicolas Tsiftes, Adam Dunkels |
Accurate Power Profiling of Sensornets with the COOJA/MSPSim Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASS ![In: IEEE 6th International Conference on Mobile Adhoc and Sensor Systems, MASS 2009, 12-15 October 2009, Macau (S.A.R.), China, pp. 1060-1061, 2009, IEEE Computer Society, 978-1-4244-5113-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Wilfried Jouve, Julien Bruneau 0001, Charles Consel |
DiaSim: A Parameterized Simulator for Pervasive Computing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PerCom ![In: Seventh Annual IEEE International Conference on Pervasive Computing and Communications, PerCom 2009, 9-13 March 2009, Galveston, TX, USA, pp. 1-3, 2009, IEEE Computer Society, 978-1-4244-3304-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Han Wan, Xiaopeng Gao, Xiang Long, Zhiqiang Wang |
GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 8th International Symposium, APPT 2009, Rapperswil, Switzerland, August 24-25, 2009, Proceedings, pp. 177-190, 2009, Springer, 978-3-642-03643-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel algorithms, caches, GPGPU, CUDA, trace-driven simulation |
12 | Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri |
Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings, pp. 368-373, 2009, Springer, 978-3-642-00640-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Shafagh Jafer, Gabriel A. Wainer |
Flattened Conservative Parallel Simulator for DEVS and CELL-DEVS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE (1) ![In: Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, CSE 2009, Vancouver, BC, Canada, August 29-31, 2009, pp. 443-448, 2009, IEEE Computer Society, 978-1-4244-5334-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Céline Thuillet, Philippe Andouard, Olivier Ly |
A Smart Card Power Analysis Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE (2) ![In: Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, CSE 2009, Vancouver, BC, Canada, August 29-31, 2009, pp. 847-852, 2009, IEEE Computer Society, 978-1-4244-5334-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Antonia Gallardo, Luis Díaz de Cerio, Roc Messeguer, Andreu Pere Isern-Deyà, Kana Sanjeevan |
GRID Resource Searching on the GridSim Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (1) ![In: Computational Science - ICCS 2009, 9th International Conference, Baton Rouge, LA, USA, May 25-27, 2009, Proceedings, Part I, pp. 357-366, 2009, Springer, 978-3-642-01969-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
GridSim, Hypercube, Search Algorithms, Self-Configuring |
12 | Sourendra Nath Sinha, Zenon Chaczko, Ryszard Klempous |
SNIPER: A Wireless Sensor Network Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2009, 12th International Conference, Las Palmas de Gran Canaria, Spain, February 15-20, 2009, Revised Selected Papers, pp. 913-920, 2009, Springer, 978-3-642-04771-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Jahanzeb Farooq, Thierry Turletti |
An IEEE 802.16 WiMAX module for the NS-3 simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SimuTools ![In: Proceedings of the 2nd International Conference on Simulation Tools and Techniques for Communications, Networks and Systems, SimuTools 2009, Rome, Italy, March 2-6, 2009, pp. 8, 2009, ICST/ACM, 978-963-9799-45-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
ns-3, WiMAX, network simulation, IEEE 802.16 |
12 | Diogo Ferreira, Luísa Lima, João Barros |
NECO: NEtwork COding simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SimuTools ![In: Proceedings of the 2nd International Conference on Simulation Tools and Techniques for Communications, Networks and Systems, SimuTools 2009, Rome, Italy, March 2-6, 2009, pp. 52, 2009, ICST/ACM, 978-963-9799-45-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
simulation, networks, topology, network coding, random graph |
12 | Juliano V. Quaglio, Tetsu Gunji, Celso Massaki Hirata |
Extending NCTUns simulator to support mobile networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SimuTools ![In: Proceedings of the 2nd International Conference on Simulation Tools and Techniques for Communications, Networks and Systems, SimuTools 2009, Rome, Italy, March 2-6, 2009, pp. 2, 2009, ICST/ACM, 978-963-9799-45-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
C4I2SR, NCTUns, mobile networks, emulation |
12 | Karim Al-Yafi, Habin Lee, S. Afshin Mansouri |
MTAP-MaSim: A Multi-agent Simulator for the Mobile Task Allocation Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WETICE ![In: 18th IEEE International Workshops on Enabling Technologies: Infrastructures for Collaborative Enterprises, WETICE 2009, Groningen, The Netherlands, 29 June - 1 July 2009, Proceedings, pp. 25-27, 2009, IEEE Computer Society, 978-0-7695-3683-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Wegdan Abdelsalam, Siu-Cheung Chau, David Chiu 0003, Maher Ahmed, Yasser Ebrahim |
ROOTS, The ROving Objects Trip Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SSTD ![In: Advances in Spatial and Temporal Databases, 11th International Symposium, SSTD 2009, Aalborg, Denmark, July 8-10, 2009, Proceedings, pp. 445-449, 2009, Springer, 978-3-642-02981-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Mohamed Hamada 0001 |
Pushdown Automata Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Edutainment ![In: Learning by Playing. Game-based Education System Design and Development, 4th International Conference on E-Learning and Games, Edutainment 2009, Banff, Canada, August 9-11, 2009. Proceedings, pp. 328-338, 2009, Springer, 978-3-642-03363-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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12 | Chengxiang Wang 0001, Dongfeng Yuan, Hsiao-Hwa Chen, Wen Xu |
An Improved Deterministic SoS Channel Simulator for Multiple Uncorrelated Rayleigh Fading Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 7(9), pp. 3307-3311, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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12 | Hyun Soo Woo, Woo Seok Kim, Woojin Ahn, Doo Yong Lee, Sun Young Yi |
Haptic Interface of the KAIST-Ewha Colonoscopy Simulator II. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Technol. Biomed. ![In: IEEE Trans. Inf. Technol. Biomed. 12(6), pp. 746-753, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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12 | Kun Wang, Yu Zhang, Huayong Wang, Xiaowei Shen |
Parallelization of IBM mambo system simulator in functional modes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGOPS Oper. Syst. Rev. ![In: ACM SIGOPS Oper. Syst. Rev. 42(1), pp. 71-76, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
parallel simulation, dynamic binary translation, architectural simulation |
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