Search results for "simulator"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
16	Shih-Hsiang Lo, Jiun-Hung Ding, Sheng-Je Hung, Jin-Wei Tang, Wei-Lun Tsai, Yeh-Ching Chung	SEMU: A Framework of Simulation Environment for Wireless Sensor Networks with Co-simulation Model.	GPC	2007	DBLP DOI BibTeX RDF	hardware and software co-simulation, Simulator, wireless sensor networks, dynamic binary translation
16	Pierre David, Vincent Idasiak, Frédéric Kratz	A Sensor Placement Approach for the Monitoring of Indoor Scenes.	EuroSSC	2007	DBLP DOI BibTeX RDF	genetic algorithm, Simulator, sensor network, sensor placement
16	David Svoboda, Marek Kasík, Martin Maska, Jan Hubený, Stanislav Stejskal, Michal Zimmermann	On Simulating 3D Fluorescent Microscope Images.	CAIP	2007	DBLP DOI BibTeX RDF	fluorescent optical microscope, simulator, convolution, synthetic image, procedural texture
16	Manish Vachharajani, Neil Vachharajani, David A. Penry, Jason A. Blome, Sharad Malik, David I. August	The Liberty Simulation Environment: A deliberate approach to high-level system modeling.	ACM Trans. Comput. Syst.	2006	DBLP DOI BibTeX RDF	simulator construction, component reuse, structural modeling, Liberty Simulation Environment (LSE)
16	Bako Rajaonah, Françoise Anceaux, Fabrice Vienne	Trust and the use of adaptive cruise control: a study of a cut-in situation.	Cogn. Technol. Work.	2006	DBLP DOI BibTeX RDF	Adaptive cruise control, Cut-in-situation, Trust, Questionnaire, Driving simulator
16	Qi Chen 0011, Daniel Jiang, Vikas Taliwal, Luca Delgrossi	IEEE 802.11 based vehicular communication simulation design for NS-2.	Vehicular Ad Hoc Networks	2006	DBLP DOI BibTeX RDF	simulator, IEEE 802.11, NS-2, vehicular communication
16	Franco Fummi, Giovanni Perbellini, Mirko Loghi, Massimo Poncino	ISS-centric modular HW/SW co-simulation.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	systemc, co-simulation, instruction set simulator
16	Martti Moisio, Alexandra Oborina	Comparison of Effective SINR Mapping with Traditional AVI Approach for Modeling Packet Error Rate in Multi-state Channel.	NEW2AN	2006	DBLP DOI BibTeX RDF	L2S interface, EESM, MIESM, AVI, OFDM, System simulator
16	Elena Alessandri, Alessandro Gasparetto, Rafael Valencia-García, Rodrigo Martínez-Béjar	An application of artificial intelligence to medical robotics.	J. Intell. Robotic Syst.	2005	DBLP DOI BibTeX RDF	STRIPS, ontologies, artificial intelligence, neurosurgery, medical robotics, robotic simulator, planner
16	J. Eliot B. Moss, Trek S. Palmer, Timothy Richards, Edward K. Walters II, Charles C. Weems	CISL: A Class-Based Machine Description Language for Co-Generation of Compilers and Simulators.	Int. J. Parallel Program.	2005	DBLP DOI BibTeX RDF	simulator, compiler, Language design, instruction set architecture, machine description
16	Henning Schmidt, Stefan Hesse, Rolf Bernhardt, Jörg Krüger	HapticWalker - a novel haptic foot device.	ACM Trans. Appl. Percept.	2005	DBLP DOI BibTeX RDF	gait rehabilitation, programmable footplates, walking simulator, robot, interpolation, haptic device, Locomotion interface
16	Justin Teller, Charles B. Silio Jr., Bruce L. Jacob	Performance characteristics of MAUI: an intelligent memory system architecture.	Memory System Performance	2005	DBLP DOI BibTeX RDF	MAUI memory architecture, SimpleScalar simulator, data-intensive calculations, intelligent memory, memory architecture, vector processing, SIMD processing
16	Mehrdad Reshadi, Prabhat Mishra 0001	Memory access optimizations in instruction-set simulators.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	memory address-space mapping, instruction-set simulator
16	Ing-Marie Jonsson, Mary Zajicek, Helen Harris, Clifford Nass	Thank you, I did not see that: in-car speech based information systems for older adults.	CHI Extended Abstracts	2005	DBLP DOI BibTeX RDF	in-car information system, safe driving, speech based systems, older adults, attitudes, driving simulator, driving performance
16	Julian Borrill, Jonathan Carter, Leonid Oliker, David Skinner, Rupak Biswas	Integrated Performance Monitoring of a Cosmology Application on Leading HEC Platforms.	ICPP	2005	DBLP DOI BibTeX RDF	Cosmic Microwave Background, MADCAP, Altix Columbia, Earth Simulator, X1 Phoenix, Power3 Seaborg, parallel performance characterization
16	Yang Yu, Yulu Yang	Performance analysis of practical RDT interconnection networks with SINOMP.	ISPAN	2005	DBLP DOI BibTeX RDF	RDT, RDT(2,2,1)/a, interconnection network simulator, average latency, average distance
16	David G. Cameron, A. Paul Millar, Caitriana Nicholson, Rubén Carvajal-Schiaffino, Kurt Stockinger, Floriano Zini	Analysis of Scheduling and Replica Optimisation Strategies for Data Grids Using OptorSim.	J. Grid Comput.	2004	DBLP DOI BibTeX RDF	simulator, scheduling, optimisation, data grid, data replication
16	Ing-Marie Jonsson, Clifford Nass, Jack Endo, Ben Reaves, Helen Harris, Janice Le Ta, Nicholas Chan, Sean Knapp	Don't blame me I am only the driver: impact of blame attribution on attitudes and attention to driving task.	CHI Extended Abstracts	2004	DBLP DOI BibTeX RDF	attitudinal change, blame attribution, trust and liking, driving simulator, driving performance
16	Yasser A. Sowb, Robert G. Loeb	Cognitive Analysis of Intraoperative Critical Events: A Problem-Driven Approach to Aiding Clinicians' Performance.	Cogn. Technol. Work.	2002	DBLP DOI BibTeX RDF	Critical incident techniques, Human error analysis, Human-machine interaction in the operating room, Observational and simulator-based studies, Decision support systems, Cognitive modelling
16	Thomas Müller, Hans-Gerhard Giesa	Effects of Airborne Data Link Communication on Demands, Workload and Situation Awareness.	Cogn. Technol. Work.	2002	DBLP DOI BibTeX RDF	Air-to-ground data link, Cognitive demands, Crew resource management, Multi-sector-planning, Communication, Situation awareness, Workload, Aviation, Flight simulator
16	Scott H. Clearwater, Stephen D. Kleban	ASCI Queuing Systems: Overview and Comparisons.	IPDPS	2002	DBLP DOI BibTeX RDF	ASCI, simulator, predictability, fairness, queuing
16	Subodh Shah, Edwin Hernandez, Abdelsalam Helal	CAD-HOC: A CAD-Like Tool for Generating Mobility Benchmarks in Ad-Hoc Networks.	SAINT	2002	DBLP DOI BibTeX RDF	Mobility scenario generator, mobility benchmarks, ns-simulator, Ad-hoc networks
16	G. D. Nagendra, V. G. Prem Kumar, B. S. Sheshadri Chakravarthy	Simulation bridge: a framework for multi-processor simulation.	CODES	2002	DBLP DOI BibTeX RDF	simulation framework, instruction set simulator, multiprocessor simulation
16	Jennifer Lai, Karen Cheng, Paul A. Green, Omer Tsimhoni	On the road and on the Web?: comprehension of synthetic and human speech while driving.	CHI	2001	DBLP DOI BibTeX RDF	speech synthesis, comprehension, driving simulator, text-to-speech, driving performance
16	Motoshi Saeki	Behavioral specification of GOF design patterns with LOTOS.	APSEC	2000	DBLP DOI BibTeX RDF	gang-of-four design patterns, LOTOS simulator, composite and command patterns, formal specification, object-oriented programming, specification languages, object-oriented methods, software patterns, behavioral specification
16	Khaled Ben Lamine, Froduald Kabanza	History checking of temporal fuzzy logic formulas for monitoring behavior-based mobile robots.	ICTAI	2000	DBLP DOI BibTeX RDF	temporal fuzzy logic, behavior-based mobile robots, robot control systems, real world robots, simulator, semantics, fuzzy logic, temporal logic, mobile robots, digital simulation, distributed control, failure detection, noise elimination
16	Abby A. Ilumoka	Efficient prediction of interconnect crosstalk using neural networks.	ICTAI	2000	DBLP DOI BibTeX RDF	interconnect crosstalk prediction, deep submicron downscaling, wirecells, modular artificial neural networks, multiparadigm prototyping system, equicoupling contours, isocouples, transconductance amplifier, neural networks, delays, delay, finite element method, neural nets, crosstalk, experimental results, circuit CAD, finite element analysis, circuit simulation, circuit simulator, integrated circuit interconnections, wafer-scale integration, wafer scale integration
16	Hiroyasu Obata, Kenji Ishida, Junichi Funasaka, Kitsutaro Amano	TCP Performance Analysis on Asymmetric Networks Composed of Satellite and Terrestrial Links.	ICNP	2000	DBLP DOI BibTeX RDF	satellite ground stations, TCP performance analysis, asymmetric networks, terrestrial links, asymmetric bandwidth, asymmetric delay, evaluation formula, VSAT, very small aperture terminal, asymmetric digital subscriber line, Internet, Internet, throughput, transport protocols, digital simulation, network simulator, ADSL, TCP Reno, satellite links, satellite links, downlink, uplink, slow start, cable modem
16	Xijiang Lin, Wu-Tung Cheng, Irith Pomeranz, Sudhakar M. Reddy	SIFAR: Static Test Compaction for Synchronous Sequential Circuits Based on Single Fault Restoration.	VTS	2000	DBLP DOI BibTeX RDF	Test Segment, Parallel Pattern Simulator, Vector Restoration, Single Fault Restoration, Fault Coverage, Synchronous Sequential Circuits, Test Length, Static Test Compaction
16	Shugong Xu, Tarek N. Saadawi, Myung J. Lee	Comparison of TCP Reno and Vegas in Wireless Mobile Ad Hoc Networks.	LCN	2000	DBLP DOI BibTeX RDF	NS2 network simulator, Lawrence Berkeley National Laboratory, MONARCH project, Carnegie Mellon, node movement, TCP connection, receiver nodes, sender nodes, good-put, maximum window size, performance evaluation, transport protocols, network topology, digital simulation, radio networks, performance study, network nodes, TCP Vegas, land mobile radio, TCP Reno, wireless mobile ad hoc networks
16	Mitsunori Yoneda, Fumihito Arai, Toshio Fukuda, Keisuke Miyata	VR Operational Assistance System for Rough Terrain Crane.	VR	2000	DBLP DOI BibTeX RDF	Multi-modal Display, VR Crane Simulator, Man Machine Interface
16	Scott P. Oswald, Kannan Ramchandran, Thomas S. Huang	Efficient Terrain Data Representation for 3D Rendering Using the Generalized BFOS Algorithm.	ICIP (1)	1997	DBLP DOI BibTeX RDF	efficient terrain data representation, 3D rendering, generalized BFOS algorithm, flight simulator video games, regular triangular grid, tree-pruning method, quantization trees, geographic information systems, GIS, computer graphics, regression, displays, binary tree, tree data structures, tessellation, military, multiple resolutions
16	Naim Ben-Hamida, Khaled Saab 0001, David Marche, Bozena Kaminska	A perturbation based fault modeling and simulation for mixed-signal circuits.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	analog circuit fault simulation, perturbation fault model, fault abstraction, structural fault modeling, perturbation estimation, fault observation, hierarchical analog fault simulator, complexity, test generation, CMOS, mixed-signal circuits, mixed analogue-digital integrated circuits, functional fault modeling, physical defects
16	Gerald Krell, Hamid R. Tizhoosh, Tilo Lilienblum, C. J. Moore, Bernd Michaelis	Enhancement and associative restoration of electronic portal images in radiotherapy.	CBMS	1997	DBLP DOI BibTeX RDF	fuzzy image enhancement technique, associative restoration algorithm, Electronic Portal Imaging Device, high-energy treatment beam, patient body interior, image projection, fluorescent screen scanning, imaging physics, pre-treatment captured simulator image, image quality, camera, radiotherapy, radiation therapy
16	David M. Nicol, Michael M. Johnson, Ann S. Yoshimura, Michael E. Goldsby	Performance Modeling of the IDES Framework.	Workshop on Parallel and Distributed Simulation	1997	DBLP DOI BibTeX RDF	Breathing-Time-Buckets, IDES project, Sandia National Laboratories, architectural parameters, large scale portable parallel simulator, stockpile stewardship, window termination, work load, parallel algorithm, parallel programming, performance modeling, discrete event simulation, synchronization protocol
16	Sugath Warnakulasuriya, Timothy Mark Pinkston	Characterization of Deadlocks in Interconnection Networks.	IPPS	1997	DBLP DOI BibTeX RDF	deadlocks characterisation, true deadlock detection, bidirectionality, routing adaptivity, node degree, deadlock formation, routing flexibility blocked messages, resource dependencies, simulator, interconnection networks, multiprocessor interconnection networks, virtual channels, buffer size, design parameters, deadlock-free routing algorithms
16	W. Lynn Gallagher, Chuan-lin Wu	Evaluation of a memory hierarchy for the MTS multithreaded processor.	ICPADS	1997	DBLP DOI BibTeX RDF	memory hierarchy evaluation, MTS multithreaded processor, hardware resource utilization, instruction throughput, multithreaded superscalar processor, multiple instruction streams, multiple functional unit architecture, parameter-driven simulator, SES/workbench, numerical benchmarks, memory system configurations, main memory latency, cache hit rates, realistic multilevel cache hierarchy, parallel processing, VLIW, superscalar processor, instruction cache
16	Rolf Drechsler, Martin Keim, Bernd Becker 0001	Fault Simulation in Sequential Multi-Valued Logic Networks.	ISMVL	1997	DBLP DOI BibTeX RDF	sequential multi-valued logic networks, multi-valued logic networks, logic testing, sequential circuits, fault models, fault simulator, random pattern testability
16	Frédéric Pétrot, Denis Hommais, Alain Greiner	Cycle precise core based hardware/software system simulation with predictable event propagation.	EUROMICRO	1997	DBLP DOI BibTeX RDF	hardware software system simulation, predictable event propagation, cycle precise core based system simulator, digital embedded systems, Mealy signals, combinational signals, MIPS R3000, microprocessor core, PI-Bus, Pentium 120, communication, graph, C, high level synthesis, memories, directed graph, FSM, topological sort, compile-time, communicating finite state machines
16	Yau-Hwang Kuo, Shiuh-Chu Lee	Software Development Tool for Object-Oriented Fuzzy Knowledge Systems.	ICTAI	1997	DBLP DOI BibTeX RDF	object oriented fuzzy knowledge systems, fuzzy reasoning concept, reasoning power, novel fuzzy linguistic object model, three layered structure, knowledge acquisition layer, object design layer, program design layer, fuzzy knowledge systems, object simulator, knowledge representation, software tools, expert system, rapid prototyping, inheritances, approximate reasoning, rule base, object oriented paradigm, software development tool, design information, problem solving process
16	Peter J. Stuckey, Vincent W. L. Tam	Extending EGENET with Lazy Constraint Consistency.	ICTAI	1997	DBLP DOI BibTeX RDF	extended EGENET, lazy constraint consistency, neural network simulator, min-conflict heuristic, hard graph-colouring problems, complete search methods, stochastic search methods, convergence behaviour, scheduling, planning (artificial intelligence), planning, constraint satisfaction problems, bin-packing, arc consistency, search behaviour
16	Andy Negoi, Alain Guyot, Jacques Zimmermann	A dedicated circuit for charged particles simulation using the Monte Carlo method.	ASAP	1997	DBLP DOI BibTeX RDF	dedicated circuit, charged particles simulation, dedicated integrated circuit, integro-differential Boltzmann equation, direct statistical computation, simulated particles distribution function, semiconductor device hardware simulator, microdynamical transport, Boltzmann equation, binary format, drift velocity, static uniform electric field, hot carrier effects, computational complexity, Monte Carlo method
16	David Pautler, Steven Woods, Alex Quilici	Exploiting Domain-Specific Knowledge to Refine Simulation Specifications.	ASE	1997	DBLP DOI BibTeX RDF	high-level simulation specification refinement, simulated combat training, tank platoon members, network-based combat simulator, nonlinear planning, branching factor, constraint satisfaction, digital simulation, executable specification, domain-specific knowledge
16	Masaru Takesue	A tampering protocol for reducing the coherence transactions in regular computation.	ISPAN	1997	DBLP DOI BibTeX RDF	tampering protocol, coherence transactions, regular computation, latency of communication, protocols, multiprocessor, cache-coherence protocol, RTL simulator
16	M. E. Waite, T. J. Reynolds, F. Z. Ieromnimon	Parallel Graph Reduction with the PACE Architecture.	PDP	1996	DBLP DOI BibTeX RDF	parallel graph reduction, PACE architecture, graph reduction model, basic replicable node, prototype version, Verilog description, C simulator, parallel programming, graph theory, parallel architectures, virtual machines, distributed memory systems, parallel execution, distributed memory multiprocessor
16	Loïc Prylli, Bernard Tourancheau	Distributed simulation of parallel computers.	Annual Simulation Symposium	1996	DBLP DOI BibTeX RDF	MIMD computer, code recompilation, trace file, simulation hosts, application granularity, performance evaluation, parallel computers, virtual machines, local area networks, program compilers, distributed memory systems, distributed simulation, distributed simulator, workstation cluster, distributed memory parallel computers, network latency, virtual timings
16	Steven D. Corey, Andrew T. Yang	Automatic netlist extraction for measurement-based characterization of off-chip interconnect.	ICCAD	1996	DBLP DOI BibTeX RDF	MCM substrate-level interconnect circuitry, SPICE netlist, automatic netlist extraction, linear circuits, measured time domain refectometry data, measurement-based characterization, microstrip circuits, multiport system, off-chip interconnect, reflection transmission, time-domain scattering parameters, user-specified cutoff frequency, delay, crosstalk, circuit simulator, multichip modules, nonlinear circuits
16	Namyun Kim, Minsoo Ryu, Seongsoo Hong, Manas Saksena, Chong-Ho Choi, Heonshik Shin	Visual assessment of a real-time system design: a case study on a CNC controller.	RTSS	1996	DBLP DOI BibTeX RDF	visual assessment, sensor-to-output latency, intertask communication schemes, period calibration method, computerized numerical control, plant simulator, control quality, loop processing periods, scheduling, performance, real-time systems, case study, jitter, CNC, system utilization, real-time system design
16	Gerald G. Pechanek, M. Stojancic, Stamatis Vassiliadis, C. John Glossner	MFAST: a single chip highly parallel image processing architecture.	ICIP	1995	DBLP DOI BibTeX RDF	MFAST, single chip highly parallel image processing architecture, IBM Mwave, graphics processing, scalable array of processing elements, folded array, transpose operations, Mwave Folded Array Signal Transform processor, scalable DSP, algorithm execution, 2D DCT program, functional simulator models, 16 bit/s, 50 MHz, real-time systems, parallel architectures, VHDL, discrete cosine transforms, discrete cosine transform, hardware description languages, video signal processing, digital signal processing chips, matrix operations, real-time video processing
16	L. Bisone, A. Scianna	A CAD multiprocessor system for advanced real-time process applications.	PDP	1995	DBLP DOI BibTeX RDF	CAD multiprocessor system, advanced real-time process applications, control diagrams, synoptic pages, control station, symbol editors, parallel VME bus, Field Instrumentation Protocol, real control loops, parallel simulator signals, complex parallel real time architecture, real-time systems, networking, protocols, parallel system, client-server systems, distributed control, trends, automation system, power generation, control system CAD
16	Sophie Chabridon, Erol Gelenbe	Dependable parallel computing with agents based on a task graph model.	PDP	1995	DBLP DOI BibTeX RDF	dependable parallel computing, task graph model, MIMD shared memory architecture, performance evaluation, parallel processing, parallel programming, parallel programs, agents, discrete event simulation, discrete-event simulator, fast Fourier transform, software performance evaluation, failure detection, application program
16	Udo Mahlstedt, Jürgen Alt, Ingo Hollenbeck	Deterministic test generation for non-classical faults on the gate level.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	deterministic test pattern generator, gate level fault models, function conversions, nonclassical faults, fault list generator, library-based fault modeling strategy, ISCAS benchmark circuits, scan-based circuits, CMOS cell library, algorithm, fault diagnosis, logic testing, design for testability, ATPG, combinational circuits, combinational circuits, fault simulator, logic CAD, stuck-at faults, CMOS logic circuits, bridging faults, deterministic algorithms, logic simulation, transition faults, automatic test software, test efficiency, CONTEST
16	Martin Adelantado, Frédéric Boniol, D. Pinault	A simulation environment for designing distributed reactive/deliberative time-constrained applications.	Annual Simulation Symposium	1995	DBLP DOI BibTeX RDF	distributed reactive/deliberative time-constrained applications design, deliberative systems, terminal state, logical time notion, man-machine interface handlers, time critical applications, Sun4 IPX workstation, X-Window graphical interface, French Ministry of Defense, simulator, real-time systems, graphical user interfaces, distributed processing, requirements, programming, programming environments, timing, computer games, program compilers, digital simulation, reactive systems, timing constraints, distributed real-time systems, simulation environment, application generators, reactive programming, Unix operating system, initial state
16	K. H. (Kane) Kim, Luiz F. Bacellar, Yuseok Kim, Chittur Subbaraman, Hankil Yoon, Jung-Guk Kim, Kee-Wook Rim	A timeliness-guaranteed kernel model-DREAM kernel-and implementation techniques.	RTCSA	1995	DBLP DOI BibTeX RDF	timeliness-guaranteed kernel model, DREAM kernel, timeliness-guaranteed operating system, new-style real-time objects, hardware utilization, v.D2, real-time systems, modularity, digital simulation, real-time simulator, operating system kernels, operating system kernel, expandability, real-time processes, prototype implementation, real-time computer systems, implementation techniques, application environment
16	Rolf Drechsler, Rolf Krieger, Bernd Becker 0001	Random Pattern Fault Simulation in Multi-Valued Circuits.	ISMVL	1995	DBLP DOI BibTeX RDF	random pattern fault simulation, multi-valued circuits, multi-valued logic networks, fault diagnosis, logic testing, integrated circuit testing, fault simulator, circuit analysis computing, multivalued logic circuits, random pattern testability
16	Manish Pandey, Alok Jain, Randal E. Bryant, Derek L. Beatty, Gary York, Samir Jain	Extraction of finite state machines from transistor netlists by symbolic simulation.	ICCD	1995	DBLP DOI BibTeX RDF	finite state machine extraction, transistor netlists, clock level finite state machines, gate level representation, circuit clocking, output timing, simulation patterns, next state, output function, equivalent FSM, static storage structures, time multiplexed inputs, time multiplexed outputs, finite state machines, logic design, logic CAD, circuit analysis computing, FSMs, symbolic simulation, symbolic simulator, Ordered Binary Decision Diagrams
16	Farnaz Mounes-Toussi, David J. Lilja	Write buffer design for cache-coherent shared-memory multiprocessors.	ICCD	1995	DBLP DOI BibTeX RDF	write-buffer configurations, one word per buffer entry, one block per buffer entry, write-through, write-back, competitive-performance, shared-memory multiprocessors, shared memory systems, cache-coherent, memory architecture, buffer storage, cache storage, execution-driven simulator, write policies
16	Hans Hansson, Harold W. Lawson, Mikael Strömberg, Sven Larsson	BASEMENT: a distributed real-time architecture for vehicle applications.	IEEE Real Time Technology and Applications Symposium	1995	DBLP DOI BibTeX RDF	BASEMENT, distributed real-time architecture, vehicle applications, distributed real time architecture, vehicle internal use, guaranteed real time service, distributed devices, program development methodology, application oriented development, offline scheduler, intelligent cruise control application, real-time systems, distributed processing, resource sharing, multiplexing, operating system kernels, system simulator, safety critical applications, communication support, communication infrastructure, automobiles, computerised control, automotive industry, driver information systems, automotive electronics, real time kernel
16	Kelvin K. Yue, David J. Lilja	Parameter estimation for a generalized parallel loop scheduling algorithm.	HICSS (2)	1995	DBLP DOI BibTeX RDF	generalized parallel loop scheduling algorithm, strategy evolution, CS-2, FS-alt, chunk scheduling, genetic algorithms, genetic algorithm, scheduling, parallel algorithms, virtual machines, parameter estimation, parameter estimation, shared-memory multiprocessor, shared memory systems, factoring, program control structures, multiprocessor simulator
16	Wesley K. Kaplow, William Maniatty, Boleslaw K. Szymanski	Impact of memory hierarchy on program partitioning and scheduling.	HICSS (2)	1995	DBLP DOI BibTeX RDF	parallel program scheduling, nonlinear cache-miss rates, loop nest execution simulation, architecturally parameterized cache simulator, loop range, cache-miss ratio, loop interchange, iteration-space blocking, program runtime estimation, IBM 9076 SP1, SuperSPARC, scheduling, parallel programming, optimisation, memory hierarchy, processor scheduling, software performance evaluation, memory architecture, cache storage, program optimization, cache performance, program control structures, program partitioning, Intel i860
16	Varna Puvvada, S. Potla, S. Tamizh Selvam, P. R. Suresh	A simulation study on the effectiveness of n-guardring/p-guardring on latchup in 0.8 μm CMOS technology.	VLSI Design	1995	DBLP DOI BibTeX RDF	integrated circuit technology, n-guardring, p-guardring, latchup prevention, remote transient, I/O buffer n-channel transistor, 2D device simulator, TMA-MEDICI, substrate resistance, 0.8 micron, VLSI, circuit analysis computing, CMOS integrated circuits, CMOS technology, transients, steady state simulation
16	Nagaraj Subramanyam, K. G. Praveen, Ramesh Ramani, D. Suryanarayana	CODAC-a characterization system for digital and analog circuits.	VLSI Design	1995	DBLP DOI BibTeX RDF	CODAC, characterization system, electrical simulator, procedural interface, customized analysis functions, parallel processing, circuit analysis computing, Monte Carlo methods, circuit CAD, SPICE, SPICE, analog circuits, digital circuits, CAD tool, digital integrated circuits, analogue integrated circuits, circuit analysis, Monte Carlo analysis
16	G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee	Analysis of temperature dependence of Si-Ge HBT.	VLSI Design	1995	DBLP DOI BibTeX RDF	semiconductor materials, heterojunction bipolar transistors, Ge-Si alloys, heterojunction bipolar transistors, Ge mole-fraction, two dimensional device simulator, BISOF, current gain, graded HBT, 200 to 300 K, simulation, finite element method, finite element analysis, FEM, temperature dependence, SiGe, thermal analysis, semiconductor device models
16	P. Blysa	SDT a tool for complex real-time systems.	ICECCS	1995	DBLP DOI BibTeX RDF	SDT, complex real-time systems tool, object-oriented design tool, object-oriented formal specification technique SDL, C++ environments, simulator, real-time systems, real-time system, formal specification, object-oriented programming, validator, C, programming environments, editor
16	Yabo Wang, David Lorge Parnas	Simulating the Behavior of Software Modules by Trace Rewriting.	IEEE Trans. Software Eng.	1994	DBLP DOI BibTeX RDF	software module behavior simulation, trace rewriting, trace assertion method, module interface specification method, specification simulation tool, trace simulator, trace specifications, trace rewriting systems, trace simulation, simulation, formal specification, finite state machines, digital simulation, term rewriting, rewriting systems, finite state machine model
16	Venkatesh Akella, Ganesh Gopalakrishnan	Specification and Validation of Control-Intensive IC's in hopCP.	IEEE Trans. Software Eng.	1994	DBLP DOI BibTeX RDF	control-intensive integrated circuits, hopCP, asynchronous operations, multiple concurrent threads, Intel 8251, Universal Synchronous/Asynchronous Receiver/Transmitter, USART, synchronous message passing, distributed shared variables, asynchronous ports, compiled-code concurrent functional simulator, CFSIM, formal specification, formal methods, formal verification, specification, validation, message passing, specification languages, interrupt, digital simulation, hardware description language, microprocessor chips, hardware design, polling, computational requirements, synchronous operations
16	Devendra Kumar, Saad Harous	A Study of Achievable Speedup in Distributed Simulation via NULL Messages.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	achievable speedup, NULL messages, open queuing networks, performance, concurrency control, computer networks, queueing theory, digital simulation, distributed simulation, distributed simulator, overhead
16	Chi Y. Lin, Reuven R. Levary	Computer-Aided Software Development Process Design.	IEEE Trans. Software Eng.	1989	DBLP DOI BibTeX RDF	computer-aided software development process design, intelligent tool, schedule planning, interacting developmental phases, software life-cycle simulator, SLICS, hybrid expert simulation system, software engineering, software tools, management, control, maintenance, dynamic models, system dynamics, budget, personnel, time-varying, software development projects
16	Arturo I. Concepcion, Bernard P. Zeigler	DEVS Formalism: A Framework for Hierarchical Model Development.	IEEE Trans. Software Eng.	1988	DBLP DOI BibTeX RDF	hierarchical model development, distributed simulator architectures, Discrete Event System Specification, hierarchical model specification, top-down model development, software engineering, distributed processing, programming theory, DEVS, model representation, discrete event models
16	Claude Jard, Jean-François Monin, Roland Groz	Development of Véda, a Prototyping Tool for Distributed Algorithms.	IEEE Trans. Software Eng.	1988	DBLP DOI BibTeX RDF	Veda, International Organisation for Standardization, simulator, protocols, distributed algorithms, distributed processing, software tool, software tools, Prolog, ISO, Estelle, prototyping tool
12	Dino Schweitzer, Jeff Boleng	A simple machine simulator for teaching stack frames.	SIGCSE	2010	DBLP DOI BibTeX RDF	stack frames, visualization, active learning, buffer overflow
12	Yongjin Li, Yicheng Jin, Yong Yin, Helong Shen	Real-time Simulation of Large Area Nearshore Wave for Marine Simulator.	CGIV	2009	DBLP DOI BibTeX RDF
12	Iwan Kartiko, Manolya Kavakli, Ken Cheng	The Impacts of Animated-Virtual Actors' Visual Complexity and Simulator Sickness in Virtual Reality Applications.	CGIV	2009	DBLP DOI BibTeX RDF
12	Kevin Schmidt, Joe Cerney, Ryan Becker, Patrick Duffy, Ana Elisa P. Goulart, Joseph Morgan	The Design of a Low-Cost Wide Area Network Simulator.	FMN	2009	DBLP DOI BibTeX RDF	token bucket filter, Ethernet, wide area network, network emulator
12	Yukiyo Kuriyagawa, Mieko Ohsuga, Ichiro Kageyama	HR Changes in Driving Scenes with Danger and Difficulties Using Driving Simulator.	HCI (17)	2009	DBLP DOI BibTeX RDF
12	Kenta Saito, Yuki Makita, Vu Quang, Hitoshi Sasaki	Development of a Simulator of Abacus: Ancient Analog Calculator on a Mobile Phone as a Teaching Material.	HCI (4)	2009	DBLP DOI BibTeX RDF	abacus, education, mobile phone, android, teaching material
12	Oles Hodych, Kostiantyn Hushchyn, Yuri Shcherbyna, Iouri Nikolski, Volodymyr Pasichnyk	SOM-Based Dynamic Image Segmentation for Sign Language Training Simulator.	UNISCON	2009	DBLP DOI BibTeX RDF	image segmentation, self-organising maps
12	Takuya Ogure, Yoshihiro Nakabo, Seonghee Jeong, Yoji Yamada	Risk management simulator for low-powered human-collaborative industrial robots.	IROS	2009	DBLP DOI BibTeX RDF
12	Ladjel Bellatreche, Kamel Boukhalfa, Zaia Alimazighi	SimulPh.D.: A Physical Design Simulator Tool.	DEXA	2009	DBLP DOI BibTeX RDF
12	Joakim Byg, Kenneth Yrke Jørgensen, Jirí Srba	TAPAAL: Editor, Simulator and Verifier of Timed-Arc Petri Nets.	ATVA	2009	DBLP DOI BibTeX RDF
12	Gabriel H. Loh, Samantika Subramaniam, Yuejian Xie	Zesto: A cycle-level simulator for highly detailed microarchitecture exploration.	ISPASS	2009	DBLP DOI BibTeX RDF
12	Garrett Weinberg, Bret Harsham	Developing a low-cost driving simulator for the evaluation of in-vehicle technologies.	AutomotiveUI	2009	DBLP DOI BibTeX RDF	automotive user interfaces, human-machine interfaces, driving simulation
12	Mustafa M. Tikir, Michael Laurenzano, Laura Carrington, Allan Snavely	PSINS: An Open Source Event Tracer and Execution Simulator for MPI Applications.	Euro-Par	2009	DBLP DOI BibTeX RDF	Message Passing Applications, High Performance Computing, Performance Prediction, Supercomputers, Trace-Driven Simulation
12	Joakim Eriksson, Fredrik Österlind, Thiemo Voigt, Niclas Finne, Shahid Raza, Nicolas Tsiftes, Adam Dunkels	Accurate Power Profiling of Sensornets with the COOJA/MSPSim Simulator.	MASS	2009	DBLP DOI BibTeX RDF
12	Wilfried Jouve, Julien Bruneau 0001, Charles Consel	DiaSim: A Parameterized Simulator for Pervasive Computing Applications.	PerCom	2009	DBLP DOI BibTeX RDF
12	Han Wan, Xiaopeng Gao, Xiang Long, Zhiqiang Wang	GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache.	APPT	2009	DBLP DOI BibTeX RDF	parallel algorithms, caches, GPGPU, CUDA, trace-driven simulation
12	Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri	Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator.	ARC	2009	DBLP DOI BibTeX RDF
12	Shafagh Jafer, Gabriel A. Wainer	Flattened Conservative Parallel Simulator for DEVS and CELL-DEVS.	CSE (1)	2009	DBLP DOI BibTeX RDF
12	Céline Thuillet, Philippe Andouard, Olivier Ly	A Smart Card Power Analysis Simulator.	CSE (2)	2009	DBLP DOI BibTeX RDF
12	Antonia Gallardo, Luis Díaz de Cerio, Roc Messeguer, Andreu Pere Isern-Deyà, Kana Sanjeevan	GRID Resource Searching on the GridSim Simulator.	ICCS (1)	2009	DBLP DOI BibTeX RDF	GridSim, Hypercube, Search Algorithms, Self-Configuring
12	Sourendra Nath Sinha, Zenon Chaczko, Ryszard Klempous	SNIPER: A Wireless Sensor Network Simulator.	EUROCAST	2009	DBLP DOI BibTeX RDF
12	Jahanzeb Farooq, Thierry Turletti	An IEEE 802.16 WiMAX module for the NS-3 simulator.	SimuTools	2009	DBLP DOI BibTeX RDF	ns-3, WiMAX, network simulation, IEEE 802.16
12	Diogo Ferreira, Luísa Lima, João Barros	NECO: NEtwork COding simulator.	SimuTools	2009	DBLP DOI BibTeX RDF	simulation, networks, topology, network coding, random graph
12	Juliano V. Quaglio, Tetsu Gunji, Celso Massaki Hirata	Extending NCTUns simulator to support mobile networks.	SimuTools	2009	DBLP DOI BibTeX RDF	C4I2SR, NCTUns, mobile networks, emulation
12	Karim Al-Yafi, Habin Lee, S. Afshin Mansouri	MTAP-MaSim: A Multi-agent Simulator for the Mobile Task Allocation Problem.	WETICE	2009	DBLP DOI BibTeX RDF
12	Wegdan Abdelsalam, Siu-Cheung Chau, David Chiu 0003, Maher Ahmed, Yasser Ebrahim	ROOTS, The ROving Objects Trip Simulator.	SSTD	2009	DBLP DOI BibTeX RDF
12	Mohamed Hamada 0001	Pushdown Automata Simulator.	Edutainment	2009	DBLP DOI BibTeX RDF
12	Chengxiang Wang 0001, Dongfeng Yuan, Hsiao-Hwa Chen, Wen Xu	An Improved Deterministic SoS Channel Simulator for Multiple Uncorrelated Rayleigh Fading Channels.	IEEE Trans. Wirel. Commun.	2008	DBLP DOI BibTeX RDF
12	Hyun Soo Woo, Woo Seok Kim, Woojin Ahn, Doo Yong Lee, Sun Young Yi	Haptic Interface of the KAIST-Ewha Colonoscopy Simulator II.	IEEE Trans. Inf. Technol. Biomed.	2008	DBLP DOI BibTeX RDF
12	Kun Wang, Yu Zhang, Huayong Wang, Xiaowei Shen	Parallelization of IBM mambo system simulator in functional modes.	ACM SIGOPS Oper. Syst. Rev.	2008	DBLP DOI BibTeX RDF	parallel simulation, dynamic binary translation, architectural simulation