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Found 19048 publication records. Showing 19048 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
78Gholamreza B. Khosrovshahi, Behruz Tayfeh-Rezaie Some Indecomposable t-Designs. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF indecomposable designs, large sets of t-designs, disjoint designs, t-designs
64Jaswinder Pal Singh, Anshul Kumar, Shashi Kumar A multiplier generator for Xilinx FPGAs. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF multiplier generator, Xilinx FPGAs, LUT based FPGA, sequential designs, combinational designs, pipelined designs, IDEAS synthesis system, XC3000 family, XC4000 family, dedicated carry logic, XACT tool, XBLOX tool, field programmable gate arrays, high level synthesis, sequential circuits, combinational circuits, digital arithmetic, logic CAD, pipeline processing, integrated circuit design, circuit CAD, table lookup, multiplying circuits, module generator, carry logic, multiplier designs
60Eric S. Lee, Thomas Whalen Synthetic designs: a new form of true experimental design for use in information systems development. Search on Bibsonomy SIGMETRICS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF synthetic experimental designs, experimental designs
60Michael Braun, Adalbert Kerber, Reinhard Laue Systematic Construction of q-Analogs of t-(v, k, lambda)-Designs. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF designs over finite fields, Kramer-Mesner method, group actions, q-analogs, t-designs
52Dean S. Hoskins, Charles J. Colbourn, Douglas C. Montgomery Software performance testing using covering arrays: efficient screening designs with categorical factors. Search on Bibsonomy WOSP The full citation details ... 2005 DBLP  DOI  BibTeX  RDF D-optimal designs, performance testing, covering arrays
50Jianzhong Shi, Akash Randhar, Dinesh Bhatia Macro Block Based FPGA Floorplanning. Search on Bibsonomy VLSI Design The full citation details ... 1997 DBLP  DOI  BibTeX  RDF macro block based FPGA floorplanning, FPGA based designs, very large designs, performance driven designs, constraint-based FPGA floorplanning, flexible macro blocks, fixed macro blocks, input constraint set, topological placement, FPGA architectural constraints, large benchmark examples, VLSI floorplanning, heuristic algorithm, integrated circuit layout, ASIC design
48Ziba Eslami, Gholamreza B. Khosrovshahi, Morteza Mohammad Noori Enumeration of t-Designs Through Intersection Matrices. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF derived designs, intersection matrices, t-designs
45Ronald H. Hardin, Neil J. A. Sloane McLaren's Improved Snub Cube and Other New Spherical Designs in Three Dimensions. Search on Bibsonomy Discret. Comput. Geom. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
41Behruz Tayfeh-Rezaie On the Existence of Large Sets of t-designs of Prime Sizes. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF large sets of t-designs, (N, t)-partitionable sets, recursive constructions, t-designs
41Usman Khalid, Jahanzeb Anwer, Nor Hisham Hamid, Vijanth S. Asirvadam The Impact of Sensitive Inputs on the Reliability of Nanoscale Circuits. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Yann Kieffer, Lilia Zaourar Applying Operations Research to Design for Test Insertion Problems. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Quentin Angermann, Aymeric Histace, Olivier Romain, Xavier Dray, Andréa Pinna 0001, Bertrand Granado Smart Videocapsule for Early Diagnosis of Colorectal Cancer: Toward Embedded Image Analysis. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, Debashis De Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Oana Stan, Renaud Sirdey Introduction to Optimization Under Uncertainty Techniques for High-Performance Multicore Embedded Systems Compilation. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Jai Narayan Tripathi, Jayanta Mukherjee 0002 Decoupling Network Optimization by Swarm Intelligence. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Houman Zarrabi, A. J. Al-Khalili, Yvon Savaria Design Intelligence for Interconnection Realization in Power-Managed SoCs. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Mohamed Ibrahim, Cherif R. Salama, M. Watheq El-Kharashi, Ayman Wahba Pin-Count and Wire Length Optimization for Electrowetting-on-Dielectric Chips: A Metaheuristics-Based Routing Algorithm. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Sayed Taha Muhammad, Rabab Ezz-Eldin, Magdy A. El-Moursy, Amr M. Refaat Low-Power NoC Using Optimum Adaptation. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Ayan Palchaudhuri, Rajat Subhra Chakraborty A Fabric Component Based Approach to the Architecture and Design Automation of High-Performance Integer Arithmetic Circuits on FPGA. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Yu Wang 0021, Weishan Dong, Junchi Yan, Li Li 0022, Chunhua Tian, Chao Zhang 0010, Zhihu Wang, Chunyang Ma Digital IIR Filter Design with Fix-Point Representation Using Effective Evolutionary Local Search Enhanced Differential Evolution. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
41Logan Rakai, Amin Farshidi Sizing Digital Circuits Using Convex Optimization Techniques. Search on Bibsonomy Computational Intelligence in Digital and Network Designs and Applications The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
38Eric Merchant Exponentially Many Hadamard Designs. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Hadamard designs, symmetric designs, BIBD
38Mahsa Vahidi, Alex Orailoglu Testability metrics for synthesis of self-testable designs and effective test plans. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF testability metrics, self-testable designs, effective test plans, unified metrics, synthesis phases, VLSI, VLSI, built-in self test, high level synthesis, high level synthesis, design for testability, BIST, DFT, logic CAD, integrated circuit design, benchmark designs
37Michael Zapf, Ute Lindheimer, Armin Heinzl The myth of accelerating business processes through parallel job designs. Search on Bibsonomy Inf. Syst. E Bus. Manag. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Job parallelization, Order processing, Process simulation, Coordination theory, Business process design, Parallel designs
37Stelios Georgiou, Christos Koukouvinos Self-Orthogonal and Self-Dual Codes Constructed via Combinatorial Designs and Diophantine Equations. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF generalized orthogonal designs, construction, self-dual codes, Diophantine equations
35Jun-Wu Dong, Dingyi Pei, Xueli Wang A Key Predistribution Scheme Based on 3-Designs. Search on Bibsonomy Inscrypt The full citation details ... 2007 DBLP  DOI  BibTeX  RDF key predistribution schemes, 3-designs, Möbius planes, sensor networks, combinatorial designs
35Gennian Ge, Alan C. H. Ling Group Divisible Designs with Block Size Four and Group Type gum1 with Minimum m. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF group divisible designs, double group divisible designs
35Kowen Lai, Christos A. Papachristou, Mikhail Baklashov BIST testability enhancement using high level test synthesis for behavioral and structural designs. Search on Bibsonomy Asian Test Symposium The full citation details ... 1997 DBLP  DOI  BibTeX  RDF BIST testability, behavioral designs, industrial benchmark, controllability, built-in self test, observability, DFT, transparency, fidelity, structural designs, high level test synthesis
34Jun Hu, Xiaofeng Yu, Yan Zhang 0007, Tian Zhang 0001, Xuandong Li, Guoliang Zheng Checking Component-Based Embedded Software Designs for Scenario-Based Timing Specifications. Search on Bibsonomy EUC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF embedded software designs, real-time systems, model checking, UML sequence diagrams, interface automata
34Sherif M. Yacoub, Hany H. Ammar, Tom Robinson Dynamic Metrics for Object Oriented Designs. Search on Bibsonomy IEEE METRICS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Object-Oriented Designs and Real-Time OO Modeling, Dynamic Metrics, Design Quality
33Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, TingTing Hwang A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
31Keith M. Martin On the Applicability of Combinatorial Designs to Key Predistribution for Wireless Sensor Networks. Search on Bibsonomy IWCC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF sensor networks, Key predistribution, combinatorial designs
31Bernhard Peischl, Naveed Riaz, Franz Wotawa Advances in Automated Source-Level Debugging of Verilog Designs. Search on Bibsonomy New Challenges in Applied Intelligence Technologies The full citation details ... 2008 DBLP  DOI  BibTeX  RDF debugging of hardware designs, multiple testcases, model-based diagnosis, software debugging
31Haibin Kan, Hong Shen 0001 The maximal rates of more general complex orthogonal designs. Search on Bibsonomy PDCAT The full citation details ... 2005 DBLP  DOI  BibTeX  RDF complex orthogonal designs, maximal rates, delays, space-time block codes
31Franz Wotawa Debugging VHDL Designs: Introducing Multiple Models and First Empirical Results. Search on Bibsonomy Appl. Intell. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF debugging hardware designs, modeling for diagnosis, model-based diagnosis
31Kwang-Ting Cheng Partial scan designs without using a separate scan clock. Search on Bibsonomy VTS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF flip-flop selection method, flip-flop test generation method, scan registers ordering, scan-shifting concept, test vector compaction, delay fault detection, cycle breaking, logic testing, delays, timing, design for testability, logic design, automatic testing, DFT, fault coverage, flip-flops, circuit optimisation, boundary scan testing, scan chain, combinatorial optimization problem, test generation algorithm, partial scan designs, system clock
30David M. Cohen, Siddhartha R. Dalal, Michael L. Fredman, Gardner C. Patton The AETG System: An Approach to Testing Based on Combinatiorial Design. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF Testing, experimental designs, combinatorial designs, orthogonal arrays
30Jacob Savir Generator choices for delay test. Search on Bibsonomy Asian Test Symposium The full citation details ... 1995 DBLP  DOI  BibTeX  RDF BIST based delay test, generator choices, delay test vector generator, nonscan designs, transition test, skewed-load delay test, shift dependency, digital logic circuits, performance, VLSI, fault diagnosis, logic testing, delays, built-in self test, integrated circuit testing, ATPG, automatic testing, flexibility, linear feedback shift register, cost, shift registers, scan designs, boundary scan testing, test vectors, timing requirement, pseudo-random test
30Ling Zhuo, Viktor K. Prasanna High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
30Jacob E. Boon Generating exact D-optimal designs for polynomial models. Search on Bibsonomy SpringSim (3) The full citation details ... 2007 DBLP  BibTeX  RDF general linear regression, optimal experimental design, mathematical optimization
30Zhijiang Chang, Georgi Gaydadjiev, Stamatis Vassiliadis Infrastructure for Cross-Layer Designs Interaction. Search on Bibsonomy ICCCN The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
30Love Singhal, Elaheh Bozorgzadeh Multi-layer Floorplanning on a Sequence of Reconfigurable Designs. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
30Jingzhao Ou, Viktor K. Prasanna PyGen: A MATLAB/Simulink Based Tool for Synthesizing Parameterized and Energy Efficient Designs Using FPGAs. Search on Bibsonomy FCCM The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
30Dean S. Hoskins, Renée Turban, Charles J. Colbourn Experimental designs in software engineering: d-optimal designs and covering arrays. Search on Bibsonomy WISER The full citation details ... 2004 DBLP  DOI  BibTeX  RDF d-optimal designs, factorial experiments, covering arrays
28Thomas W. Williams Testing in Nanometer Technologies. Search on Bibsonomy DATE The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
28Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai DFM/DFY practices during physical designs for timing, signal integrity, and power. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF 0.13 micron, DFY, dynamic IR drop, process variation, physical designs, DFM, design for manufacturability, signal integrity, timing integrity, yield analysis, design for yield
28Sushmita Ruj, Bimal K. Roy Key Predistribution Using Partially Balanced Designs in Wireless Sensor Networks. Search on Bibsonomy ISPA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF PBIBD designs, Resiliency, Combinatorial Design
28Ilias S. Kotsireas, Christos Koukouvinos Inequivalent Hadamard matrices from orthogonal designs. Search on Bibsonomy PASCO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF orthogonal designs, systems of polynomial equations, Hadamard matrices
28Elli Georgiadou, Eleni Berki, Maria del Brezo Cordero, Margaret Ross 0001, Geoff Staples Towards Formalised Guidelines for Migrating Structured Designs to UML: A Case Study. Search on Bibsonomy Softw. Qual. J. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF isomorphic models, UML, testing, reuse, re-engineering, structured designs, OO
28Dong-Joon Shin, P. Vijay Kumar, Tor Helleseth An Assmus-Mattson-Type Approach for Identifying 3-Designs from Linear Codes over Z4. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Z 4 codes, Assmus-Mattson, complete weight enumerator, t-designs
28David Masson Designs and Representation of the Symmetric Group. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF association scheme, Specht module, Hahn polynomials, Designs, tableaux, self-dual codes, symmetric group
28Daniel Köb, Bernhard Peischl, Franz Wotawa Debugging VHDL Designs Using Temporal Process Instances. Search on Bibsonomy IEA/AIE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF debugging of hardware designs, model-based diagnosis, software debugging
28John R. Samson Jr., Wilfrido Alejandro Moreno, Fernando J. Falquez Validating fault tolerant designs using laser fault injection (LFI). Search on Bibsonomy DFT The full citation details ... 1997 DBLP  DOI  BibTeX  RDF fault tolerant designs validation, laser fault injection, VHSIC technology, in situ testing, transient error conditions, VLSI, faults, automated testing, transient, VLSI technology
28William W. Agresti, William M. Evanco Projecting Software Defects From Analyzing Ada Designs. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1992 DBLP  DOI  BibTeX  RDF software defects projection, context coupling, Ada designs, process characteristics, import-export of declarations, reuse level, regression analyses, Ada, static analysis, software quality, software quality, software metrics, software reliability, statistical analysis, visibility, defect density
27Norifumi Kamiya, Marc P. C. Fossorier Quasi-Cyclic Codes from a Finite Affine Plane. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF affine planes, incidence matrices, oval designs, combinatorial designs, quasi-cyclic codes
27Artan Dimnaku, Rex K. Kincaid, Michael W. Trosset Approximate Solutions of Continuous Dispersion Problems. Search on Bibsonomy Ann. Oper. Res. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF maximin distance designs, space-filling designs, nonlinear programming, location theory, computer experiments
27Vamsi Krishna, N. Ranganathan A Methodology for High Level Power Estimation and Exploration. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Low Power Designs, Power Estimation, Switching Activity, High Level Designs
27David B. Skillicorn A New Class of Fault-Tolerant Static Interconnection Networks. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1988 DBLP  DOI  BibTeX  RDF balanced incomplete block designs, performance-cost tradeoffs, fault-tolerant static interconnection networks, combinatorial block designs, fault-tolerant properties, performance evaluation, fault tolerant computing, multiprocessor interconnection networks, graceful degradation
26Ling Zhuo, Viktor K. Prasanna Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
26John Arhin On the structure of 1-designs with at most two block intersection numbers. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF 05B25, AMS Classifications 05B05
26Yinghui Li, Hlaing Minn, Naofal Al-Dhahir, A. Robert Calderbank Pilot Designs for Consistent Frequency-Offset Estimation in OFDM Systems. Search on Bibsonomy IEEE Trans. Commun. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Ling Zhuo, Viktor K. Prasanna Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. Search on Bibsonomy ICPADS (1) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
26Masahiro Fujita, Shunsuke Sasaki, Ken Matsui Object-oriented analysis and design of hardware/software co-designs with dependence analysis for design reuse. Search on Bibsonomy IRI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Byungjeong Lee, Chisu Wu An Automatic Restructuring Approach Preserving the Behavior of Object-Oriented Designs. Search on Bibsonomy APSEC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
26Masayoshi Yoshimura Implementation of Multiobjective Optimization Procedures at the Product Design Planning Stage. Search on Bibsonomy System Modelling and Optimization The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Product design planning stage, Pareto optimum solutions, Comparison of alternative designs, Hierarchical optimization problem, Rapid evaluation, Deeper insight into design solutions, Multiobjective optimization
26Reinhard Rauscher A Design Assistant for Scheduling of Design Decisions. Search on Bibsonomy EUROMICRO The full citation details ... 1996 DBLP  DOI  BibTeX  RDF scheduling, scheduling, VLSI designs, design decisions, design assistant
26Douglas E. Harms, Bruce W. Weide Copying and Swapping: Influences on the Design of Reusable Software Components. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF data movement primitive, generic reusable software components, generic module designs, swapping style, data structures, software reusability
25Min-Lun Chuang, Chun-Yao Wang Synthesis of reversible sequential elements. Search on Bibsonomy ACM J. Emerg. Technol. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF sequential elements, sequential circuits, Reversible logic
25Ju-wook Jang, Seonil B. Choi, Viktor K. Prasanna Energy- and time-efficient matrix multiplication on FPGAs. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
25Yingmin Li, Mark Hempstead, Patrick Mauro, David M. Brooks, Zhigang Hu, Kevin Skadron Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF architecture, power, temperature, clock gating
25Seonil Choi, Viktor K. Prasanna Time and Energy Efficient Matrix Factorization Using FPGAs. Search on Bibsonomy FPL The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
25John W. Byers, Michael Mitzenmacher, Georgios Zervas Adaptive weighing designs for keyword value computation. Search on Bibsonomy WSDM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF weighing designs, regression, least squares, design of experiments
25Xinlu Zhang, Jun Guo 0004, Suogang Gao Two new error-correcting pooling designs from d -bounded distance-regular graphs. Search on Bibsonomy J. Comb. Optim. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF s e -disjunct matrix, Distance-regular graph, Strongly closed subgraphs, Pooling designs
25Christos Koukouvinos, Dimitris E. Simos Self-dual Codes over Small Prime Fields from Combinatorial Designs. Search on Bibsonomy CAI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF construction, combinatorial designs, Self-dual codes
25Sudhir Vinjamuri, Viktor K. Prasanna Hierarchical Dependency Graphs: Abstraction and Methodology for Mapping Systolic Array Designs to Multicore Processors. Search on Bibsonomy PaCT The full citation details ... 2009 DBLP  DOI  BibTeX  RDF systolic array designs, parallel programming, high performance computing, multicore, dependency graphs
25Hong-Bin Chen, Hung-Lin Fu, Frank K. Hwang An upper bound of the number of tests in pooling designs for the error-tolerant complex model. Search on Bibsonomy Optim. Lett. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Nonadaptive algorithms, Disjunct matrices, Pooling designs
25Mohammad Tehranipoor, Kenneth M. Butler Guest Editors' Introduction: IR Drop in Very Deep-Submicron Designs. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF PSN, IR drop, power supply noise, deep-submicron designs
25Rosa Gil 0001, César A. Collazos 0001 Integrating Emotions and Knowledge in Aesthetics Designs Using Cultural Profiles. Search on Bibsonomy HCI (11) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF aesthetics designs, cultural relations, interfaces, emotions
25Mohamed H. Zaki, Ghiath Al Sammane, Sofiène Tahar Formal Verification of Analog and Mixed Signal Designs in Mathematica. Search on Bibsonomy International Conference on Computational Science (2) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF AMS Designs, Formal Verification, Mathematica
25Ulrich Dempwolff Affine Rank 3 Groups on Symmetric Designs. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF rank 3 groups, symmetric designs
25Dong-Joon Shin, P. Vijay Kumar, Tor Helleseth 3-Designs from the Z4-Goethals Codes via a New Kloosterman Sum Identity. Search on Bibsonomy Des. Codes Cryptogr. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF Z 4-Goethals codes, Kloosterman sums, t-designs
25Frank K. Hwang, Yu-Chi Liu Random Pooling Designs Under Various Structures. Search on Bibsonomy J. Comb. Optim. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF random pooling designs, clone library screening, k-clique
25Víctor A. Braberman, Fabio Pieniazek Duration Properties over Real Time System Designs. Search on Bibsonomy IWSSD The full citation details ... 2000 DBLP  BibTeX  RDF Duration Properties, Model-Checking, Timed Automata, Real-Time System Designs
25Hans T. Heineken, Wojciech Maly Interconnect yield model for manufacturability prediction in synthesis of standard cell based designs. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Standard Cell Designs, Synthesis, Interconnects, Manufacturability, Yield
25Ching-Long Su, Alvin M. Despain Cache designs for energy efficiency. Search on Bibsonomy HICSS (1) The full citation details ... 1995 DBLP  DOI  BibTeX  RDF cache design techniques, superpipelined processors, cache energy consumption estimation, block buffering, cache sub-banking, Gray code addressing, instruction cache designs, consecutive accessing, energy efficiency, microprocessors, power consumption, energy conservation, data caches, cache storage, superscalar processors, Gray codes, energy reduction, CMOS memory circuits
25Frank Poirot, Gerard Tarroux, Ramine Roane Optimization using implicit techniques for industrial designs. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF implicit techniques, Boolean functions, Boolean functions, logic synthesis, logic CAD, binary decision diagrams, hardware description languages, hardware description languages, industrial designs, circuit optimisation, optimization techniques, design complexity
25William L. Bradley, Ranga Vemuri Transformations for functional verification of synthesized designs. Search on Bibsonomy VLSI Design The full citation details ... 1995 DBLP  DOI  BibTeX  RDF low-level functional verification, synthesized designs, clocking mechanisms, provably equivalent model, hierarchical network of modules, reduced state set, de-phase transform, align transform, algorithm, formal verification, transforms, transforms, logic CAD, clocks, hierarchical system, reachable states
25Sergio Cárdenas-García, Marvin V. Zelkowitz A Management Tool For Evaluation of Software Designs. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF economic decision theory, prototyping investigative system, equilibrium probabilities, software tools, decision support system, decision support systems, program verification, program verification, software designs, software prototyping, risk analysis, functional model, evaluation strategy, Selector, management tool
24Emre Kolotoglu, Emine Sule Yazici On Minimal Defining Sets of Full Designs and Self-Complementary Designs, and a New Algorithm for Finding Defining Sets of t-Designs. Search on Bibsonomy Graphs Comb. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
23David Ahlström, Andy Cockburn, Carl Gutwin, Pourang Irani Why it's quick to be square: modelling new and existing hierarchical menu designs. Search on Bibsonomy CHI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF performance models, menus, hierarchical menus
23Vummintala Shashidhar, B. Sundar Rajan, P. Vijay Kumar Asymptotic-Information-Lossless Designs and the Diversity-Multiplexing Tradeoff. Search on Bibsonomy IEEE Trans. Inf. Theory The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
23Jennifer Seberry, Kenneth Finlayson, Sarah Spence Adams, Tadeusz A. Wysocki, Tianbing Xia, Beata J. Wysocki The Theory of Quaternion Orthogonal Designs. Search on Bibsonomy IEEE Trans. Signal Process. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
23Christopher G. Jennings, Arthur E. Kirkpatrick Design as traversal and consequences: an exploration tool for experimental designs. Search on Bibsonomy Graphics Interface The full citation details ... 2007 DBLP  DOI  BibTeX  RDF history capture, design space exploration, experimental design, design rationale, design spaces, creativity support
23Mustafa Gök, Çaglar Yilmaz Efficient Cell Designs for Systolic Smith-Waterman Implementations. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
23Mustafa Gök, Çaglar Yilmaz Hardware Designs for Local Alignment of Protein Sequences. Search on Bibsonomy ISCIS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
23Kyung-Yong Jung Automatic Classification for Grouping Designs in Fashion Design Recommendation Agent System. Search on Bibsonomy KES (1) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
23Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
23Genyuan Wang, Xiang-Gen Xia 0001 On optimal multilayer cyclotomic space-time code designs. Search on Bibsonomy IEEE Trans. Inf. Theory The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
23Haibin Kan, Hong Shen 0001 A counterexample for the open problem on the minimal delays of orthogonal designs with maximal rates. Search on Bibsonomy IEEE Trans. Inf. Theory The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
23Manan Syal, Michael S. Hsiao, Suriyaprakash Natarajan, Sreejit Chakravarty Untestable Multi-Cycle Path Delay Faults in Industrial Designs. Search on Bibsonomy Asian Test Symposium The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
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