Search results for "Single-Event-Upsets"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
71	Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante	Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	fault injection, single event upsets, dependability evaluation
71	E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001, Narayanan Vijaykrishnan	Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs.	IPDPS	2005	DBLP DOI BibTeX RDF
62	Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001	Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates.	SBCCI	2006	DBLP DOI BibTeX RDF	fault-tolerant microprocessor, soft errors, single event upsets, single event transients
59	Harry Hollander, Bradley S. Carlson, Toby D. Bennett	Synthesis of SEU-tolerant ASICs using concurrent error correction.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	radiation hardening (electronics), SEU-tolerant ASIC synthesis, single error correction/double error detection Hamming code, delay overhead, memory element set partitioning, error correction codes, sequential circuits, sequential circuit, application specific integrated circuits, logic CAD, circuit layout CAD, single event upsets, logic partitioning, Hamming codes, fault tolerant design, area overhead, memory elements, design experiments, concurrent error correction
58	Marco Lanuzza, Paolo Zicari, Fabio Frustaci, Stefania Perri, Pasquale Corsonello	An Efficient and Low-Cost Design Methodology to Improve SRAM-Based FPGA Robustness in Space and Avionics Applications.	ARC	2009	DBLP DOI BibTeX RDF	FPGA, Space, Reconfigurable System, Single Event Upsets, Avionics
58	Ying Huang, Chunyuan Zhang, Dong Liu 0022, Yi Li, Sheng-xin Weng	The Design on SEU-Tolerant Information Processing System of the On-Board-Computer.	APPT	2007	DBLP DOI BibTeX RDF	Dual Fault-Tolerant, Triple Module Redundancy, Cost-Off-The-Shelf, Field Programmable Gate Array, Single-Event-Upsets
58	Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff	Soft Delay Error Effects in CMOS Combinational Circuits.	VTS	2004	DBLP DOI BibTeX RDF	Soft delay, single event upsets (SEUs), soft error rate (SER), soft errors
58	Michael Nicolaidis	Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies.	VTS	1999	DBLP DOI BibTeX RDF	Very deep submicron, soft-errors, single event upsets, fault tolerant design
52	Aibin Yan, Jun Zhou 0016, Yuanjie Hu, Jie Cui 0004, Zhengfeng Huang, Patrick Girard 0001, Xiaoqing Wen	Novel Quadruple Cross-Coupled Memory Cell Designs With Protection Against Single Event Upsets and Double-Node Upsets.	IEEE Access	2019	DBLP DOI BibTeX RDF
49	Quming Zhou, Mihir R. Choudhury, Kartik Mohanram	Design Optimization for Robustness to Single Event Upsets.	VTS	2006	DBLP DOI BibTeX RDF
49	Luca Sterpone, Massimo Violante	A design flow for protecting FPGA-based systems against single event upsets.	DFT	2005	DBLP DOI BibTeX RDF
49	Tanay Karnik, Peter Hazucha, Jagdish Patel	Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes.	IEEE Trans. Dependable Secur. Comput.	2004	DBLP DOI BibTeX RDF	reliability, High performance, soft error, error tolerance, single event upset
40	Pilar Reyes, Pedro Reviriego, Juan Antonio Maestro, Oscar Ruano	Fault Tolerance Analysis of Communication System Interleavers: the 802.11a Case Study.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	single event upsets (SEUs), multiple bit upsets (MBUs), fault tolerance, redundancy, soft errors, interleaving
40	Han Liang, Piyush Mishra, Kaijie Wu 0001	Error Correction On-Demand: A Low Power Register Transfer Level Concurrent Error Correction Technique.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Concurrent error detection, register-transfer level, single-event upsets, hardware redundancy
40	Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante	A New Approach to Software-Implemented Fault Tolerance.	J. Electron. Test.	2004	DBLP DOI BibTeX RDF	fault injection, single event upsets, software-implemented fault tolerance
40	Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis	Simulating Single Event Transients in VDSM ICs for Ground Level Radiation.	J. Electron. Test.	2004	DBLP DOI BibTeX RDF	single fault propagation, fault simulation, soft-errors, single event upsets
35	Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker 0001	On Reducing Circuit Malfunctions Caused by Soft Errors.	DFT	2008	DBLP DOI BibTeX RDF
35	Bernhard Fechner	Analysis of checksum-based execution schemes for pipelined processors.	IPDPS	2006	DBLP DOI BibTeX RDF
35	Bin Zhang 0011, Wei-Shen Wang, Michael Orshansky	FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs.	ISQED	2006	DBLP DOI BibTeX RDF
35	William Heidergott	SEU tolerant device, circuit and processor design.	DAC	2005	DBLP DOI BibTeX RDF	error detection and correction coding, radiation effects, soft error rate, fault tolerant systems, single event upset, fault masking, temporal redundancy, modular redundancy, fault avoidance
31	Zhen Gao 0005, Yinghao Cheng, Qiang Liu 0011, Anees Ullah, Pedro Reviriego	Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories.	IEEE Trans. Circuits Syst. I Regul. Pap.	2023	DBLP DOI BibTeX RDF
31	Archit Gupta, Chong Yock Eng, Deon Lim Meng Wee, Rashna Analia Ahmed, See Min Sim	A Machine Learning Approach to Predicting Single Event Upsets.	CoRR	2023	DBLP DOI BibTeX RDF
31	Golnaz Korkian, Daniel León, Francisco J. Franco, Juan Carlos Fabero, Manon Letiche, Yolanda Morilla, Pedro Martín-Holgado, Helmut Puchner, Hortensia Mecha, Juan Antonio Clemente	Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories.	IEEE Access	2022	DBLP DOI BibTeX RDF
31	Luchang Ding, Chang Cai, Gengsheng Chen, Zehao Wu, Jing Zhang, Chang Wu, Jun Yu 0010	Characterization of Single Event Upsets of Nanoscale FDSOI Circuits Based on the Simulation and Irradiation Results.	ISCAS	2022	DBLP DOI BibTeX RDF
31	Lukas Miedema, Benjamin Rouxel, Clemens Grelck	Task-level Redundancy vs Instruction-level Redundancy against Single Event Upsets in Real-time DAG scheduling.	MCSoC	2021	DBLP DOI BibTeX RDF
31	Jiyuan Bai, Xiang Wang, Zikang Zhang, Chang Cai, Gengsheng Chen	A Hierarchical Fault Injection System for RISC-V Processors Targeting Single Event Upsets in Flip-Flops.	ASICON	2021	DBLP DOI BibTeX RDF
31	Zhen Gao 0005, Ruize Wang, Haoyu Du, Pedro Reviriego	Analysis and Evaluation of the Effects of Single Event Upsets (SEU s) on Memories in Polar Decoders.	DFT	2021	DBLP DOI BibTeX RDF
31	Farouk Smith, Joshua Omolo	Experimental verification of the effectiveness of a new circuit to mitigate single event upsets in a Xilinx Artix-7 field programmable gate array.	Microprocess. Microsystems	2020	DBLP DOI BibTeX RDF
31	Maha Shatta, Ihab Adly, Hassanein H. Amer, Gehad I. Alkady, Ramez M. Daoud, Sahar Hamed, Shahenda Hatem	FPGA-based Architectures to Recover from Hardware Trojan Horses, Single Event Upsets and Hard Failures.	ICM	2020	DBLP DOI BibTeX RDF
31	Shin-ichiro Abe, Tatsuhiko Sato, Junya Kuroda, Seiya Manabe, Yukinobu Watanabe, Wang Liao, Kojiro Ito, Masanori Hashimoto, Masahide Harada, Kenichi Oikawa, Yasuhiro Miyake	Impact of Hydrided and Non-Hydrided Materials Near Transistors on Neutron-Induced Single Event Upsets.	IRPS	2020	DBLP DOI BibTeX RDF
31	Eugenio Baviera, Giovanni M. Schettino, Emanuele Tuniz, Francesca Vatta	Software Implementation of Error Detection and Correction Against Single-Event Upsets.	SoftCOM	2020	DBLP DOI BibTeX RDF
31	Zeynab Mohseni, Pedro Reviriego	Reliability characterization and activity analysis of lowRISC internal modules against single event upsets using fault injection and RTL simulation.	Microprocess. Microsystems	2019	DBLP DOI BibTeX RDF
31	Kentaro Kojima, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi	An Accurate Device-Level Simulation Method to Estimate Cross Sections of Single Event Upsets by Silicon Thickness in Raised Layer.	IRPS	2019	DBLP DOI BibTeX RDF
31	Xuebing Cao, Liyi Xiao, Linzhe Li, Jie Li 0030, Tianqi Wang	Simulation of Proton Induced Single Event Upsets in Bulk Nano-CMOS SRAMs.	ICICDT	2019	DBLP DOI BibTeX RDF
31	Robert G. Pettit IV, Aedan D. Pettit	Detecting Single Event Upsets in Embedded Software.	ISORC	2018	DBLP DOI BibTeX RDF
31	Glenn H. Chapman, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Israel Koren, Zahava Koren	Analysis of Single Event Upsets Based on Digital Cameras with Very Small Pixels.	DFT	2018	DBLP DOI BibTeX RDF
31	Zhen Gao 0001, Lina Yan, Jinhua Zhu, Ruishi Han, Pedro Reviriego	Analysis of the Effects of Single Event Upsets (SEUs) on User Memory in FPGA Implemented Viterbi Decoders.	DFT	2018	DBLP DOI BibTeX RDF
31	Alexis Ramos, Juan Antonio Maestro, Pedro Reviriego	Characterizing a RISC-V SRAM-based FPGA implementation against Single Event Upsets using fault injection.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
31	Eleftherios Kyriakakis, Kalle Ngo, Johnny Öberg	Mitigating single-event upsets in COTS SDRAM using an EDAC SDRAM controller.	NORCAS	2017	DBLP DOI BibTeX RDF
31	Paulo Ricardo Cechelero Villa, Roger C. Goerl, Fabian Vargas 0001, Leticia B. Poehls, Nilberto H. Medina, Nemitala Added, Vitor A. P. de Aguiar, Eduardo L. A. Macchione, Fernando Aguirre, Marcilei Aparecida Guazzelli da Silveira, Eduardo Augusto Bezerra	Analysis of single-event upsets in a Microsemi ProAsic3E FPGA.	LATS	2017	DBLP DOI BibTeX RDF
31	Yuanqing Li, Haibin Wang, Lixiang Li 0001, Li Chen 0001, Rui Liu 0011, Mo Chen	A Built-in Single Event Upsets Detector for Sequential Cells.	J. Electron. Test.	2016	DBLP DOI BibTeX RDF
31	Yuanqing Li, Lixiang Li 0001, Yuan Ma, Li Chen 0001, Rui Liu 0011, Haibin Wang, Qiong Wu, Michael Newton, Mo Chen	A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets.	J. Electron. Test.	2016	DBLP DOI BibTeX RDF
31	Werner Nedel, Fernanda Lima Kastensmidt, José Rodrigo Azambuja	Evaluating the effects of single event upsets in soft-core GPGPUs.	LATS	2016	DBLP DOI BibTeX RDF
31	Norbert Seifert, Shah M. Jahinuzzaman, Jyothi Velamala, Nikunj Patel	Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets.	IRPS	2015	DBLP DOI BibTeX RDF
31	Jiannan Zhai, Yangyang He, Fred S. Switzer, Jason O. Hallstrom	A Software Approach to Protecting Embedded System Memory from Single Event Upsets.	EWSN	2015	DBLP DOI BibTeX RDF
31	Patrick Nsengiyumva, Qiaoyan Yu	Investigation of single-event upsets in dynamic logic based flip-flops.	ISCAS	2015	DBLP DOI BibTeX RDF
31	René Rydhof Hansen, Kim Guldstrand Larsen, Mads Chr. Olesen, Erik Ramsgaard Wognsen	Formal Methods for Modelling and Analysis of Single-Event Upsets.	IRI	2015	DBLP DOI BibTeX RDF
31	Glenn H. Chapman, Rahul Thomas, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Tommy Q. Yang, Israel Koren, Zahava Koren	Single Event Upsets and Hot Pixels in digital imagers.	DFTS	2015	DBLP DOI BibTeX RDF
31	Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta	A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs.	DFT	2014	DBLP DOI BibTeX RDF
31	Cristian Constantinescu, Srini Krishnamoorthy, Tuyen Nguyen	Estimating the effect of single-event upsets on microprocessors.	DFT	2014	DBLP DOI BibTeX RDF
31	Luca Cassano	Analysis and test of the effects of single event upsets affecting the configuration memory of SRAM-based FPGAs.	ITC	2014	DBLP DOI BibTeX RDF
31	Federico Baronti, Cinzia Bernardeschi, Luca Cassano, Andrea Domenici, Roberto Roncella, Roberto Saletti	Mitigation of Single Event Upsets in the control logic of a charge equalizer for Li-ion batteries.	IECON	2013	DBLP DOI BibTeX RDF
31	Luca Cassano	Analysis and Test of the Effects of Single Event Upsets Affecting the Configuration Memory of SRAM-based FPGAs.		2013	RDF
31	Jakob Lechner, Martin Lampacher	Protecting pipelined asynchronous communication channels against single event upsets.	ICCD	2012	DBLP DOI BibTeX RDF
31		Scheme to minimise short effects of single-event upsets in triple-modular redundancy.	IET Comput. Digit. Tech.	2010	DBLP DOI BibTeX RDF
31	S. Sharanyan, Arvind Kumar	An Optimized Checkpointing Based Learning Algorithm for Single Event Upsets.	COMPSAC	2010	DBLP DOI BibTeX RDF
31	Brian H. Pratt, Michael J. Wirthlin, Michael P. Caffrey, Paul S. Graham, Keith Morgan	Noise impact of single-event upsets on an FPGA-based digital filter.	FPL	2009	DBLP DOI BibTeX RDF
31	Rajesh Garg, Peng Li 0001, Sunil P. Khatri	Modeling dynamic stability of SRAMS in the presence of single event upsets (SEUs).	ISCAS	2008	DBLP DOI BibTeX RDF
31	Hossein Asadi 0001, Vilas Sridharan, Mehdi Baradaran Tahoori, David R. Kaeli	Vulnerability analysis of L2 cache elements to single event upsets.	DATE	2006	DBLP DOI BibTeX RDF
31	S. Torrellas, Bogdan Nicolescu, Raul Velazco, Mario García-Valderas, Yvon Savaria	Validation by Fault Injection of a Software Error Detection Technique Dealing with Critical Single Event Upsets.	LATW	2006	DBLP BibTeX RDF
31	Massimiliano Schillaci, Matteo Sonza Reorda, Massimo Violante	A New Approach to Cope with Single Event Upsets in Processor-based Systems.	LATW	2006	DBLP BibTeX RDF
31	Anton Bougaev, Brian Mariner, Joshua Walter	Estimation of Architectural Vulnerability Factors for Discrimination of Single Event Upsets in Cache Memory.	CDES	2005	DBLP BibTeX RDF
31	Kartik Mohanram	Simulation of transients caused by single-event upsets in combinational logic.	ITC	2005	DBLP DOI BibTeX RDF
31	Pablo A. Ferreyra, Carlos A. Marqués, Javier P. Gaspar, Ricardo T. Ferreyra	A Software Tool for Simulating Single Event Upsets in a Digital Signal Processor.	LATW	2001	DBLP BibTeX RDF
31	Ammar Assoum	Etude de la tolérance aux aléas logiques des réseaux de neurones artificiels. (Tolerance of artificial neural networks against single event upsets).		1997	RDF
31	Johan Karlsson, Ulf Gunneflo, Jan Torin	The Effects of Heavy-Ion Induced Single Event Upsets in the MC6809E Microprocessor.	Fehlertolerierende Rechensysteme	1989	DBLP DOI BibTeX RDF
31	Juan Antonio Maestro, Pedro Reviriego	Study of the effects of MBUs on the reliability of a 150 nm SRAM device.	DAC	2008	DBLP DOI BibTeX RDF	multiple bit upsets (MBUs), reliability, memory, radiation
31	Navid Azizi, Farid N. Najm	A family of cells to reduce the soft-error-rate in ternary-CAM.	DAC	2006	DBLP DOI BibTeX RDF	soft-error rate, content-addressable memory
31	Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins, Michael P. Caffrey, Paul S. Graham	The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets.	FCCM	2003	DBLP DOI BibTeX RDF
27	Sajid Baloch, Tughrul Arslan, Adrian Stoica	Radiation Hardened Coarse-Grain Reconfigurable Architecture for Space Applications.	IPDPS	2007	DBLP DOI BibTeX RDF
27	Ari Virtanen	Radiation Effects Facility RADEF.	IOLTW	2002	DBLP DOI BibTeX RDF
23	Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda	Safety Evaluation of NanoFabrics.	DFT	2007	DBLP DOI BibTeX RDF
22	Yantu Mo, Suge Yue	An Efficient Design of Single Event Transients Tolerance for Logic Circuits.	DELTA	2008	DBLP DOI BibTeX RDF	integrated circuit, Single Event Upset, Single Event Transients
22	Luca Sterpone, Massimo Violante	Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs.	ETS	2007	DBLP DOI BibTeX RDF
22	Liang Wang 0024, Suge Yue, Yuanfu Zhao, Long Fan	An SEU-Tolerant Programmable Frequency Divider.	ISQED	2007	DBLP DOI BibTeX RDF
22	Sajid Baloch, Tughrul Arslan, Adrian Stoica	An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures.	FPL	2006	DBLP DOI BibTeX RDF
22	Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001	Design of a Robust 8-Bit Microprocessor to Soft Errors.	IOLTS	2006	DBLP DOI BibTeX RDF
22	Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil	Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits.	VLSI Design	2006	DBLP DOI BibTeX RDF
22	Nicolas Renaud	How to Cope with SEU/SET at Chip Level? The Example of a Microprocessor Family.	IOLTS	2005	DBLP DOI BibTeX RDF
22	Lorena Anghel, Régis Leveugle, Pierre Vanhauwaert	Evaluation of SET and SEU Effects at Multiple Abstraction Levels.	IOLTS	2005	DBLP DOI BibTeX RDF
22	Michael Nicolaidis, Yervant Zorian	Scaling Deeper to Submicron: On-Line Testing to the Rescue.	DATE	1999	DBLP DOI BibTeX RDF
21	Rajesh Garg, Charu Nagpal, Sunil P. Khatri	A fast, analytical estimator for the SEU-induced pulse width in combinational designs.	DAC	2008	DBLP DOI BibTeX RDF	single event upset (SEU), model, analysis
21	Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante	Early Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs.	VLSI Design	2001	DBLP DOI BibTeX RDF
19	Vilas Sridharan, Hossein Asadi 0001, Mehdi Baradaran Tahoori, David R. Kaeli	Reducing Data Cache Susceptibility to Soft Errors.	IEEE Trans. Dependable Secur. Comput.	2006	DBLP DOI BibTeX RDF	refresh, refetch, Fault tolerance, reliability, cache memories, soft errors, error modeling
19	T. S. Ganesh, Viswanathan Subramanian, Arun K. Somani	SEU Mitigation Techniques for Microprocessor Control Logic.	EDCC	2006	DBLP DOI BibTeX RDF
19	Vladimir Stojanovic, R. Iris Bahar, Jennifer Dworak, Richard Weiss 0001	A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors.	DAC	2006	DBLP DOI BibTeX RDF	instruction queue, reliability, error correcting codes
19	Jonny Vinter, Olof Hannius, Torbjörn Norlander, Peter Folkesson, Johan Karlsson	Experimental Dependability Evaluation of a Fail-Bounded Jet Engine Control System for Unmanned Aerial Vehicles.	DSN	2005	DBLP DOI BibTeX RDF
19	Nicholas J. Wang, Justin Quek, Todd M. Rafacz, Sanjay J. Patel	Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline.	DSN	2004	DBLP DOI BibTeX RDF
19	Daniel Mossé, Rami G. Melhem, Sunondo Ghosh	A Nonpreemptive Real-Time Scheduler with Recovery from Transient Faults and Its Implementation.	IEEE Trans. Software Eng.	2003	DBLP DOI BibTeX RDF	scheduling, Fault tolerance, real-time, operating system, transient faults
19	Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin	A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor.	MICRO	2003	DBLP DOI BibTeX RDF
18	Jonathan M. Johnson, Michael J. Wirthlin	Voter insertion algorithms for FPGA designs using triple modular redundancy.	FPGA	2010	DBLP DOI BibTeX RDF	scc, tmr, voter insertion, fpga, algorithm, reliability, synchronization
18	Xin He, Afshin Abdollahi	Cost aware fault tolerant logic synthesis in presence of soft errors.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	soft error rate, reliability, linear programming
18	Rajesh Garg, Sunil P. Khatri	Efficient analytical determination of the SEU-induced pulse shape.	ASP-DAC	2009	DBLP DOI BibTeX RDF
18	Yoshihiro Ichinomiya, Shiro Tanoue, Tomoyuki Ishida, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi	Memory Sharing Approach for TMR Softcore Processor.	ARC	2009	DBLP DOI BibTeX RDF
18	Luca Sterpone	Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs.	ARC	2009	DBLP DOI BibTeX RDF	fault tolerance, FPGA, Single Event Upset, Triple Modular Redundancy, Timing-driven Placement
18	Rajballav Dash, Rajesh Garg, Sunil P. Khatri, Gwan S. Choi	SEU hardened clock regeneration circuits.	ISQED	2009	DBLP DOI BibTeX RDF
18	Saihua Lin, Huazhong Yang, Rong Luo	A New Family of Sequential Elements With Built-in Soft Error Tolerance for Dual-VDD Systems.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
18	Chong Zhao, Yi Zhao, Sujit Dey	Intelligent Robustness Insertion for Optimal Transient Error Tolerance Improvement in VLSI Circuits.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
18	Foad Dabiri, Ani Nahapetian, Tammara Massey, Miodrag Potkonjak, Majid Sarrafzadeh	General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
18	Drew C. Ness, David J. Lilja	Statistically translating low-level error probabilities to increase the accuracy and efficiency of reliability simulations in hardware description languages.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	fault distribution, reliability analysis, SEU, SER