Search results for "shift-registers"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
74	Chik How Tan, Xun Yi, Chee Kheong Siew	A CCA2 Secure Key Encapsulation Scheme Based on 3rd Order Shift Registers.	ACISP	2003	DBLP DOI BibTeX RDF	adaptive chosen-ciphertext attack, Public key cryptosystem, shift registers
74	Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamoto, Tomoo Inoue, Hideo Fujiwara	Testing for the programming circuit of LUT-based FPGAs.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	programming circuit, control circuit, configuration memory cell array, FPGA, fault model, SRAM, shift registers, shift registers, look-up table
69	Jovan Dj. Golic, Renato Menicocci	Edit Distance Correlation Attack on the Alternating Step Generator.	CRYPTO	1997	DBLP DOI BibTeX RDF	clock-controlled shift registers, alternating step generator, cryptanalysis, Stream ciphers, edit distance, correlation attacks
67	Frederic J. Mowle	An Algorithm for Generating Stable Feedback Shift Registers of Order n.	J. ACM	1967	DBLP DOI BibTeX RDF
65	Van-Ly Le, Werner Schindler	How to Embed Short Cycles into Large Nonlinear Feedback-Shift Registers.	SCN	2004	DBLP DOI BibTeX RDF	short cycles, systems of algebraic equations, low-cost group identification, Nonlinear feedback shift register, invariant theory
64	Andrew Klapper, Mark Goresky	Large Periods Nearly de Bruijn FCSR Sequences.	EUROCRYPT	1995	DBLP DOI BibTeX RDF	deBruijn property, Binary sequences, feedback with carry shift registers, 2-adic numbers
63	Wei-Lun Wang, Kuen-Jong Lee	Accelerated test pattern generators for mixed-mode BIST environments.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	accelerated test pattern generators, mixed-mode BIST, pseudorandom patterns, deterministic patterns, scan-based built-in self-test, multiple sub-chains, multiple sequence generator, fault diagnosis, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, fault coverage, linear feedback shift registers, cost, test pattern generator, shift registers, test application time, scan chain, mixed analogue-digital integrated circuits, clock cycle, integrated circuit economics
62	Andrew Klapper, Jinzhong Xu	Register Synthesis for Algebraic Feedback Shift Registers Based on Non-Primes.	Des. Codes Cryptogr.	2004	DBLP DOI BibTeX RDF	register synthesis, N-adic numbers, stream cipher, pseudorandom generator, feedback shift register
58	S. Anand, Gurumurthi V. Ramanan	Periodicity, complementarity and complexity of 2-adic FCSR combiner generators.	AsiaCCS	2006	DBLP DOI BibTeX RDF	?-sequences, 2-adic complexity, stream ciphers, combiners, linear complexity, pseudorandom number generators, feedback shift registers, FCSR
58	Jovan Dj. Golic, Renato Menicocci	Edit Probability Correlation Attacks on Stop/ Go Clocked Keystream Generators.	J. Cryptol.	2003	DBLP DOI BibTeX RDF	Stop/go clocked shift registers, Edit probability, Stream ciphers, Correlation attack
58	François Arnault, Thierry P. Berger, Abdelkader Necer	A New Class of Stream Ciphers Combining LFSR and FCSR Architectures.	INDOCRYPT	2002	DBLP DOI BibTeX RDF	2-adic expansion, Self-synchronizing stream ciphers, Pseudorandom generators, Feedback shift registers
52	Laung-Terng Wang, Edward J. McCluskey	Linear Feedback Shift Register Design Using Cyclic Codes.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	feedback, codes, linear-feedback shift registers, shift registers, design technique, test patterns, cyclic codes, pseudoexhaustive testing
52	P. Golan, Ondrej Novák, Jan Hlavicka	Pseudoexhaustive Test Pattern Generator with Enhanced Fault Coverage.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	pseudoexhaustive test pattern generation, random access scan, scan addresses, logic testing, integrated circuit testing, feedback, linear feedback shift registers, shift registers
51	Andrew Klapper	Algebraic Feedback Shift Registers Based on Function Fields.	SETA	2004	DBLP DOI BibTeX RDF
50	C. L. Chen	Linear Dependencies in Linear Feedback Shift Registers.	IEEE Trans. Computers	1986	DBLP DOI BibTeX RDF	Linear feedback shift registers, test pattern generation, self-test
48	Sultan Al-Hinai, Lynn Margaret Batten, Bernard D. Colbert	Mutually Clock-Controlled Feedback Shift Registers Provide Resistance to Algebraic Attacks.	Inscrypt	2007	DBLP DOI BibTeX RDF	stream cipher, algebraic attacks, clock-control
48	Rainer Göttfert	Sequences of Period 2N-2.	SETA	2006	DBLP DOI BibTeX RDF	Periodic sequences, nonlinear feedback shift registers, minimal polynomial
48	Janusz Rajski, Jerzy Tyszer	Primitive Polynomials Over GF(2) of Degree up to 660 with Uniformly Distributed Coefficients.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	ring generators, linear feedback shift registers, primitive polynomials
48	Jovan Dj. Golic, Renato Menicocci	Correlation Attacks on Up/Down Cascades.	ACISP	1998	DBLP DOI BibTeX RDF	clock-controlled shift registers, up/down and stop/go cascades, cryptanalysis, Stream ciphers, correlation attacks
45	Elena Dubrova, Maxim Teslenko, Hannu Tenhunen	On Analysis and Synthesis of (n, k)-Non-Linear Feedback Shift Registers.	DATE	2008	DBLP DOI BibTeX RDF
45	Andrew Klapper	A Survey of Feedback with Carry Shift Registers.	SETA	2004	DBLP DOI BibTeX RDF
45	Bernhard Smeets	A Note On Sequences Generated by Clock Controlled Shift Registers.	EUROCRYPT	1985	DBLP DOI BibTeX RDF
45	Dieter Gollmann	Pseudo Random Properties of Cascade Connections of Clock Controlled Shift Registers.	EUROCRYPT	1984	DBLP DOI BibTeX RDF
43	Alexander Kholosha	Clock-Controlled Shift Registers and Generalized Geffe Key-Stream Generator.	INDOCRYPT	2001	DBLP DOI BibTeX RDF	key-stream generator, clock-controlled shift register, Geffe generator, cryptography
41	Konstantinos Limniotis, Nicholas Kolokotronis, Nicholas Kalouptsidis	Nonlinear Complexity of Binary Sequences and Connections with Lempel-Ziv Compression.	SETA	2006	DBLP DOI BibTeX RDF	Lempel-Ziv compression, nonlinear complexity, Cryptography, sequences, nonlinear feedback shift registers
41	Philippe Chose, Antoine Joux, Michel Mitton	Fast Correlation Attacks: An Algorithmic Point of View.	EUROCRYPT	2002	DBLP DOI BibTeX RDF	match-and-sort, algorithmics, cryptanalysis, Stream ciphers, linear feedback shift registers, fast correlation attacks, parity-checks
41	Palash Sarkar 0001, Subhamoy Maitra	Efficient Implementation of "Large" Stream Cipher Systems.	CHES	2001	DBLP DOI BibTeX RDF	Boolean functions, Stream Ciphers, Cellular Automata, Linear Feedback Shift Registers, Reconfigurable Hardware, Pipelined Architecture
41	Ondrej Novák	Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata.	EDCC	1999	DBLP DOI BibTeX RDF	linear cyclic codes, hardware test pattern generators, weighted random testing, Cellular automata, BIST, linear feedback shift registers, pseudoexhaustive testing
41	Andrew Klapper, Mark Goresky	Cryptanalysis Based on 2-Adic Rational Approximation.	CRYPTO	1995	DBLP DOI BibTeX RDF	cryptanalysis, Binary sequences, rational approximation, feedback with carry shift registers, 2-adic numbers
41	Miodrag J. Mihaljevic, Jovan Dj. Golic	Convergence of a Bayesian Iterative Error-Correction Procedure on a Noisy Shift register Sequence.	EUROCRYPT	1992	DBLP DOI BibTeX RDF	Algorithms, Cryptanalysis, Convergence, Decoding, Shift registers, Fast correlation attack
41	Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò	Aliasing in signature analysis testing with multiple input shift registers.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
41	Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke	Bounds and analysis of aliasing errors in linear feedback shift registers.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
40	Agnes Hui Chan, Mark Goresky, Andrew Klapper	On the Linear Complexity of Feedback Registers (Extended Abstract).	EUROCRYPT	1989	DBLP DOI BibTeX RDF
39	Mark Goresky, Andrew Klapper	Pseudonoise sequences based on algebraic feedback shift registers.	IEEE Trans. Inf. Theory	2006	DBLP DOI BibTeX RDF
39	Jovan Dj. Golic, Luke O'Connor	Embedding and Probabilistic Correlation Attacks on Clock-Controlled Shift Registers.	EUROCRYPT	1994	DBLP DOI BibTeX RDF
39	Yves Roggeman	Varying Feedback Shift Registers.	EUROCRYPT	1989	DBLP DOI BibTeX RDF
37	Andrew Klapper	The Asymptotic Behavior of pi-Adic Complexity with pi2 = - 2.	SSC	2007	DBLP DOI BibTeX RDF	N-adic complexity, Stream ciphers, Sequences, shift registers
37	Anthony A. Philippakis, Aaron M. Qureshi, Michael F. Berger, Martha L. Bulyk	Design of Compact, Universal DNA Microarrays for Protein Binding Microarray Experiments.	RECOMB	2007	DBLP DOI BibTeX RDF	de Bruijn sequences, protein binding microarrays, linear feedback shift registers, motif, transcription factor
37	Sanjay Burman, Debdeep Mukhopadhyay, Kamakoti Veezhinathan	LFSR Based Stream Ciphers Are Vulnerable to Power Attacks.	INDOCRYPT	2007	DBLP DOI BibTeX RDF	Linear Feed Back Shift Registers, Dynamic Power Dissipation, Side Channel Attacks, Power Analysis, Hamming Distance
37	Hong Xu 0008, Wen-Feng Qi 0001	On the Distinctness of Decimations of Generalized l-Sequences.	SETA	2006	DBLP DOI BibTeX RDF	Feedback-with-carry shift registers (FCSRs), l-sequences, generalized l-sequences, integer residue ring, primitive sequences, 2-adic numbers
37	Nicholas Kolokotronis, Konstantinos Limniotis, Nicholas Kalouptsidis	Lower Bounds on Sequence Complexity Via Generalised Vandermonde Determinants.	SETA	2006	DBLP DOI BibTeX RDF	filter functions, linear feedbak shift registers, Vandermonde determinants, linear complexity, Binary sequences, symmetric functions
37	Dimitri Kagaris	Phase Shifter Merging.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	Built-in Self-Test (BIST), cellular automata, linear feedback shift registers, Test Pattern Generation (TPG), phase shifters
37	Maneli Noorkami, Faramarz Fekri	A Fast Correlation Attack via Unequal Error Correcting LDPC Codes.	CT-RSA	2004	DBLP DOI BibTeX RDF	cryptanalysis, Stream ciphers, linear feedback shift registers, fast correlation attacks, LDPC codes
37	Håvard Molland, Tor Helleseth	An Improved Correlation Attack Against Irregular Clocked and Filtered Keystream Generators.	CRYPTO	2004	DBLP DOI BibTeX RDF	Irregular clocked shift registers, Boolean functions, Stream cipher, Correlation attack
37	Dimitri Kagaris	Multiple-Seed TPG Structures.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Built-In Self-Test (BIST), Linear Feedback Shift Registers (LFSRs), Test Pattern Generation (TPG)
37	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	test-per-clock schemes, accumulator-based test pattern generators, built-in self-test, linear feedback shift registers, reseeding
37	Paul Camion, Miodrag J. Mihaljevic, Hideki Imai	Two Alerts for Design of Certain Stream Ciphers: Trapped LFSR and Weak Resilient Function over GF(q).	Selected Areas in Cryptography	2002	DBLP DOI BibTeX RDF	linear feedback shift registers over GF(), nonlinear combination generator, cryptanalysis, resilient functions, keystream generators
37	Palash Sarkar 0001	The Filter-Combiner Model for Memoryless Synchronous Stream Ciphers.	CRYPTO	2002	DBLP DOI BibTeX RDF	synchronous stream ciphers, nonlinear filter model, nonlinear combiner model, filter-combiner model, cellular automata, linear feedback shift registers
37	Miodrag J. Mihaljevic, Marc P. C. Fossorier, Hideki Imai	Fast Correlation Attack Algorithm with List Decoding and an Application.	FSE	2001	DBLP DOI BibTeX RDF	nonlinear combiner, cryptanalysis, Stream ciphers, linear feedback shift registers, nonlinear filter, keystream generators
37	Miodrag J. Mihaljevic, Marc P. C. Fossorier, Hideki Imai	A Low-Complexity and High-Performance Algorithm for the Fast Correlation Attack.	FSE	2000	DBLP DOI BibTeX RDF	stream ciphers, decoding, linear feedback shift registers, fast correlation attack, keystream generators
37	Chunming Qiao, Rami G. Melhem	Reconfiguration with Time Division Multiplexed MIN's for Multiprocessor.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	MIN's, multiprocessor communications, TDM-MIN's, N time slots, n-dimensional hypercubes, Markov analysis, partition of connection requests, partitioning, mappings, reconfiguration, multiprocessor interconnection networks, embedding, meshes, NP-hard, multistage interconnection networks, optical interconnects, rings, binary trees, shift registers, time division multiplexing, time division multiplexed, round-robin, cube-connected-cycles
37	Hussein M. Alnuweiri, Viktor K. Prasanna	Fast Image Labeling Using Local Operators on Mesh-Connected Computers.	IEEE Trans. Pattern Anal. Mach. Intell.	1991	DBLP DOI BibTeX RDF	bit-serial processors, local operators, asymptotic time complexity, very fast shift registers, parallel algorithm, parallel algorithms, computational complexity, computational complexity, parallel architectures, parallel architectures, computerised picture processing, computerised picture processing, stacks, communication links, mesh-connected computers, image labeling
34	François Arnault, Thierry P. Berger	Correction to "Feedback With Carry Shift Registers Synthesis With the Euclidean Algorithm" [May 04 910-917].	IEEE Trans. Inf. Theory	2008	DBLP DOI BibTeX RDF
34	Cédric Lauradoux	From Hardware to Software Synthesis of Linear Feedback Shift Registers.	IPDPS	2007	DBLP DOI BibTeX RDF
34	Ali Kanso	Clock-Controlled Shrinking Generator of Feedback Shift Registers.	ACISP	2003	DBLP DOI BibTeX RDF
34	Sandeepan Chowdhury, Subhamoy Maitra	Efficient Software Implementation of Linear Feedback Shift Registers.	INDOCRYPT	2001	DBLP DOI BibTeX RDF	Block Oriented LFSR, Connection Polynomials, Stream Cipher
34	Jovan Dj. Golic	Towards Fast Correlation Attacks on Irregularly Clocked Shift Registers.	EUROCRYPT	1995	DBLP DOI BibTeX RDF
34	Thyagaraju R. Damarla, Avinash Sathaye	Applications of one-dimensional cellular automata and linear feedback shift registers for pseudo-exhaustive testing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
32	Dirk Stegemann	Extended BDD-Based Cryptanalysis of Keystream Generators.	Selected Areas in Cryptography	2007	DBLP DOI BibTeX RDF	F-FCSR, cryptanalysis, Stream cipher, BDD, Trivium, Grain
32	Per Larsson-Edefors	A Miniature Serial-Data SIMD Architecture.	EUROMICRO	1998	DBLP DOI BibTeX RDF
30	Solomon W. Golomb	Shift Register Sequences - A Retrospective Account.	SETA	2006	DBLP DOI BibTeX RDF
30	Carl Davis, Svetlana P. Kartashev, Steven I. Kartashev	Reconfigurable multicomputer networks for very fast real-time applications.	AFIPS National Computer Conference	1982	DBLP DOI BibTeX RDF
29	Ali Kanso	More Generalized Clock-Controlled Alternating Step Generator.	ACNS	2004	DBLP DOI BibTeX RDF	Clock-Controlled Registers, Alternating Step Generator and Clock-Controlled Alernating Step Generator, Stream Ciphers
29	Wonjong Kim, Seungchul Kim, Hanjin Cho, Kwang-youb Lee	A fast-serial finite field multiplier without increasing the number of registers.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
29	Solomon W. Golomb, Pey-Feng Lee	Which Irreducible Polynomials Divide Trinomials over GF(2)?	SETA	2004	DBLP DOI BibTeX RDF
26	Nicholas Kolokotronis, Konstantinos Limniotis, Nicholas Kalouptsidis	Improved Bounds on the Linear Complexity of Keystreams Obtained by Filter Generators.	Inscrypt	2007	DBLP DOI BibTeX RDF	filter functions, linearized polynomials, stream ciphers, linear feedback shift registers, linear complexity, Binary sequences
26	Grzegorz Mrugalski, Nilanjan Mukherjee 0001, Janusz Rajski, Jerzy Tyszer	High Performance Dense Ring Generators.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	ring generators, Built-in self-test, design for testability, linear feedback shift registers, phase shifters
26	Jovan Dj. Golic	New Methods for Digital Generation and Postprocessing of Random Data.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	sequential circuits, linear feedback shift registers, integrated circuits, Random number generation, ring oscillators, special-purpose hardware, chaotic systems
26	Bin Zhang 0003, Dengguo Feng	Security analysis of a new stream cipher.	Sci. China Ser. F Inf. Sci.	2006	DBLP DOI BibTeX RDF	divide-and-conquer attack, non-linear feedback shift registers (NLFSR), stream cipher, chaotic sequence
26	Rafal Bialota, Grzegorz Kawa	Modified Alternating vec{k}-generators.	Des. Codes Cryptogr.	2005	DBLP DOI BibTeX RDF	stream ciphers, shift-registers, keystream generators
26	Dimitrios Kagaris	A unified method for phase shifter computation.	ACM Trans. Design Autom. Electr. Syst.	2005	DBLP DOI BibTeX RDF	built-in self-test (BIST), cellular automata, linear feedback shift registers, Test pattern generation (TPG), linear finite state machines, phase shifters
26	Mitrajit Chatterjee, Dhiraj K. Pradhan	A BIST Pattern Generator Design for Near-Perfect Fault Coverage.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	core logic, built-in self-test, synthesis, fault coverage, Linear feedback shift registers, test pattern generation, scan, SOC
26	Dimitri Kagaris, Spyros Tragoudas	LFSR Characteristic Polynomials for Pseudo-Exhaustive TPG with Low Number of Seeds.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	built-in self-test (BIST), Linear Feedback Shift Registers (LFSR), test pattern generation (TPG)
26	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A highly regular multi-phase reseeding technique for scan-based BIST.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	scan-based schemes, built-in self-test, linear feedback shift registers, reseeding
26	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST.	ISQED	2002	DBLP DOI BibTeX RDF	Test-per-Clock Schemes, Reseeding Techniques, Built-In Self-Test, Linear Feedback Shift Registers, Test Pattern Generation
26	Rajagopalan Srinivasan, Sandeep K. Gupta 0001, Melvin A. Breuer	Novel Test Pattern Generators for Pseudoexhaustive Testing.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	linear feedback shift registers, Test pattern generators, pseudoexhaustive testing
26	Lijian Li, Yinghua Min	An efficient BIST design using LFSR-ROM architecture.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	read-only storage, BIST design, LFSR-ROM architecture, built-in self test, logic design, automatic test pattern generation, test pattern generation, integrated circuit design, shift registers, hardware overhead, ROM, integrated circuit economics
26	Yin-He Su, Ching-Hwa Cheng, Shih-Chieh Chang	Novel techniques for improving testability analysis.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	closed-form formulation, implication reasoning, TAIR, tree-structured circuit, logic testing, logic testing, controllability, controllability, built-in self test, automatic test pattern generation, BIST, observability, observability, stuck-at fault, shift registers, testability analysis, test patterns
26	Andrzej Hlawiczka, Michal Kopec	Design and testing of fast and cost effective serial seeding TPGs based on one-dimensional linear hybrid cellular automata.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	serial seeding, linear hybrid cellular automata, n-cell CA register, p CdSR registers, cellular automata quasi shift register, PCASR, n-bit input sequence, logic testing, cellular automata, integrated circuit testing, automatic test pattern generation, application specific integrated circuits, polynomials, polynomial, logic CAD, cost, TPG, flip-flops, flip-flops, shift registers, pattern generators, integrated circuit economics
26	Nirmal R. Saxena, Edward J. McCluskey	Parallel Signatur Analysis Design with Bounds on Aliasing.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF	aliasing probability bounds, parallel signature designs, multiple input signature registers (MISR), linear feedback shift registers, random testing, Signature analysis
26	Zahari M. Darus, Iftekhar Ahmed 0003, Liakot Ali	A test processor chip implementing multiple seed, multiple polynomial linear feedback shift register.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	test processor chip, multiple polynomial linear feedback shift register, ASIC chip, scan-path testing, external IC tester, simulation, fault coverage, shift registers, pattern generator, multiple seed
26	Jovan Dj. Golic	Linear Models for Keystream Generators.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF	Clock-controlled shift registers, cryptography, correlation coefficients, linear models, keystream generators
26	Janusz Rajski, Jerzy Tyszer	On Linear Dependencies in Subspaces of LFSR-Generated Sequences.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF	linear dependencies, Built-in self-test, linear feedback shift registers, scan designs, primitive polynomials
26	Egor S. Sogomonyan, Michael Gössel	Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems.	VTS	1996	DBLP DOI BibTeX RDF	circuit feedback, concurrently self-testing embedded checker, ultra-reliable fault-tolerant system, parity codes, design, monitoring, built-in self test, integrated circuit testing, linear feedback shift register, error detection codes, error detection code, shift registers, arithmetic codes, Berger codes, duplication codes, integrated circuit reliability, corrector
26	Mody Lempel, Sandeep K. Gupta	Zero Aliasing for Modeled Faults.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF	zero-aliasing, Built-in self-test, linear feedback shift registers, signature analysis, response compaction
26	Seiken Yano	Unified scan design with scannable memory arrays.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	unified scan design, scannable memory arrays, single scan path, scan operation time, scannable register file, fault diagnosis, design for testability, design-for-testability, automatic testing, logic CAD, flip-flops, flip-flops, arrays, shift registers, integrated memory circuits
26	Manoj Franklin	Fast computation of C-MISR signatures.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	C-MISR signatures, built-in self-test applications, good circuit signature, faulty circuit signatures, cellular automata-based multi-input signature registers, equivalent single input circuit, VLSI, logic testing, built-in self test, cellular automata, integrated circuit testing, sequential circuits, shift registers, test responses, signature analyzers, equivalent circuits
26	Meng-Lieh Sheu, Chung-Len Lee 0001	A programmable multiple-sequence generator for BIST applications.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	programmable multiple-sequence generator, BIST applications, two-dimension-like feedback shift register, deterministic sequence, pseudo-random vectors, sequence segmentation method, stuck-open fault testing, logic testing, delays, built-in self test, sequential circuits, shift registers, delay fault testing, binary sequences, sequential circuit testing, regular structure, MCM testing
26	Sukumar Nandi, Parimal Pal Chaudhuri	Theory and applications of cellular automata for synthesis of easily testable combinational logic.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	testable combinational logic, combinational logic blocks, test machine, data path synthesis phase, autonomous mode, aliasing error probability, associated lines, test application overheads, test parallelism, simultaneous testing, multiple combinational modules, graph theory, fault diagnosis, logic testing, high level synthesis, test generation, cellular automata, cellular automata, design for testability, combinational circuits, logic CAD, stuck-at faults, shift registers, cost effectiveness, registers, test vectors, test responses, state transition graph
26	Jacob Savir	Generator choices for delay test.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	BIST based delay test, generator choices, delay test vector generator, nonscan designs, transition test, skewed-load delay test, shift dependency, digital logic circuits, performance, VLSI, fault diagnosis, logic testing, delays, built-in self test, integrated circuit testing, ATPG, automatic testing, flexibility, linear feedback shift register, cost, shift registers, scan designs, boundary scan testing, test vectors, timing requirement, pseudo-random test
26	Janusz Rzeszut, Bozena Kaminska, Yvon Savaria	A new method for testing mixed analog and digital circuits.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	charge-coupled device circuits, mixed analog and digital circuits, analog test points, simultaneous observation, analog multiplexer, signal path, analog shift register, input voltage, integrated circuit testing, shift registers, mixed analogue-digital integrated circuits, charge coupled device, analogue processing circuits
26	C. P. Ravikumar, Gurjeet S. Saund, Nidhi Agrawal	A STAFAN-like functional testability measure for register-level circuits.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	functional testability measure, register-level circuits, testability analysis programs, SCOAP, gate-level digital circuits, testability-driven synthesis, busses, F-STAFAN, Sun/SPARC workstation, performance evaluation, fault diagnosis, logic testing, high-level synthesis, statistical analysis, design for testability, fault simulation, fault coverage, circuit analysis computing, adders, multipliers, multiplexers, digital circuit, shift registers, logic gates, reliability theory, stuck-at fault model
26	Mitrajit Chatterjee, Dhiraj K. Pradhan	A novel pattern generator for near-perfect fault-coverage.	VTS	1995	DBLP DOI BibTeX RDF	near-perfect fault-coverage, onchip BIST, GLFSR, logic mapping technique, weighted pattern technique, logic testing, built-in self test, integrated circuit testing, design methodology, combinational circuits, automatic testing, integrated logic circuits, shift registers, combinational logic, digital integrated circuits, pattern generator, single stuck-at fault
26	Jacob Savir	On shrinking wide compressors.	VTS	1995	DBLP DOI BibTeX RDF	wiring overhead, detection probability loss, test length penalty, fault coverage degradation, fault diagnosis, logic testing, built-in self test, built-in self-test, integrated circuit testing, shift registers, pseudo-random test, MISRs, parity, multiple-input signature registers
26	Nadime Zacharia, Janusz Rajski, Jerzy Tyszer	Decompression of test data using variable-length seed LFSRs.	VTS	1995	DBLP DOI BibTeX RDF	test data decompression, variable-length seed LFSRs, deterministic test vectors, scan circuits, multiple polynomial LFSR, encoding efficiency, logic testing, built-in self test, integrated circuit testing, encoding, automatic testing, polynomials, linear feedback shift register, shift registers, modular design, digital integrated circuits
26	Shridhar K. Mukund, Edward J. McCluskey, T. R. N. Rao	An apparatus for pseudo-deterministic testing.	VTS	1995	DBLP DOI BibTeX RDF	pseudo-deterministic testing, deterministic patterns, at-speed BIST, arbitrary length shift register, care bits, tap configurations, test segments, don't care bits, random pattern resistant faults, interconnected logic blocks, logic testing, built-in self test, integrated circuit testing, LFSR, shift registers, computational efficiency, test vector, pseudo-random sequences
26	Albrecht P. Stroele	Signature analysis and aliasing for sequential circuits.	VTS	1995	DBLP DOI BibTeX RDF	built-in self-test techniques, test registers, subcircuits, irreducible characteristic polynomial, limiting value, fault diagnosis, logic testing, built-in self test, integrated circuit testing, sequential circuits, sequential circuits, aliasing, signature analysis, shift registers, test lengths
26	Manoj Franklin, Kewal K. Saluja, Kyuchull Kim	Fast computation of MISR signatures.	VLSI Design	1995	DBLP DOI BibTeX RDF	MISR signatures, fast computation, test response compression, multi-input signature registers, equivalent single input circuit, logic testing, design for testability, logic design, table lookup, table lookups, shift registers, binary sequences, speedup technique, signature analyzers
26	Alice M. Tokarnia	Identifying Minimal Shift Counters: A Search Technique.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	minimal shift counters, feedback function, shift register properties, feedback, shift registers, binary sequences, search technique
26	Thomas R. Cain, Alan T. Sherman	How to Break Gifford's Cipher (extended abstract).	CCS	1994	DBLP DOI BibTeX RDF	Boston Community Information System, Gifford's cipher, algorithms over finite fields, linear algebra over GF(2), primary rational canonical form, similar matrices, cryptography, cryptanalysis, stream ciphers, linear feedback shift registers, correlation attack, matrix decompositions, cryptology, similarity transformations, filter generators